gfx/angle/src/libGLESv2/renderer/shaders/compiled/clearmultiple11ps.h

Sat, 03 Jan 2015 20:18:00 +0100

author
Michael Schloh von Bennewitz <michael@schloh.com>
date
Sat, 03 Jan 2015 20:18:00 +0100
branch
TOR_BUG_3246
changeset 7
129ffea94266
permissions
-rw-r--r--

Conditionally enable double key logic according to:
private browsing mode or privacy.thirdparty.isolate preference and
implement in GetCookieStringCommon and FindCookie where it counts...
With some reservations of how to convince FindCookie users to test
condition and pass a nullptr when disabling double key logic.

michael@0 1 #if 0
michael@0 2 //
michael@0 3 // Generated by Microsoft (R) HLSL Shader Compiler 9.29.952.3111
michael@0 4 //
michael@0 5 //
michael@0 6 // fxc /E PS_ClearMultiple /T ps_4_0 /Fh compiled/clearmultiple11ps.h
michael@0 7 // Clear11.hlsl
michael@0 8 //
michael@0 9 //
michael@0 10 //
michael@0 11 // Input signature:
michael@0 12 //
michael@0 13 // Name Index Mask Register SysValue Format Used
michael@0 14 // -------------------- ----- ------ -------- -------- ------ ------
michael@0 15 // SV_POSITION 0 xyzw 0 POS float
michael@0 16 // COLOR 0 xyzw 1 NONE float xyzw
michael@0 17 //
michael@0 18 //
michael@0 19 // Output signature:
michael@0 20 //
michael@0 21 // Name Index Mask Register SysValue Format Used
michael@0 22 // -------------------- ----- ------ -------- -------- ------ ------
michael@0 23 // SV_TARGET 0 xyzw 0 TARGET float xyzw
michael@0 24 // SV_TARGET 1 xyzw 1 TARGET float xyzw
michael@0 25 // SV_TARGET 2 xyzw 2 TARGET float xyzw
michael@0 26 // SV_TARGET 3 xyzw 3 TARGET float xyzw
michael@0 27 // SV_TARGET 4 xyzw 4 TARGET float xyzw
michael@0 28 // SV_TARGET 5 xyzw 5 TARGET float xyzw
michael@0 29 // SV_TARGET 6 xyzw 6 TARGET float xyzw
michael@0 30 // SV_TARGET 7 xyzw 7 TARGET float xyzw
michael@0 31 //
michael@0 32 ps_4_0
michael@0 33 dcl_input_ps linear v1.xyzw
michael@0 34 dcl_output o0.xyzw
michael@0 35 dcl_output o1.xyzw
michael@0 36 dcl_output o2.xyzw
michael@0 37 dcl_output o3.xyzw
michael@0 38 dcl_output o4.xyzw
michael@0 39 dcl_output o5.xyzw
michael@0 40 dcl_output o6.xyzw
michael@0 41 dcl_output o7.xyzw
michael@0 42 mov o0.xyzw, v1.xyzw
michael@0 43 mov o1.xyzw, v1.xyzw
michael@0 44 mov o2.xyzw, v1.xyzw
michael@0 45 mov o3.xyzw, v1.xyzw
michael@0 46 mov o4.xyzw, v1.xyzw
michael@0 47 mov o5.xyzw, v1.xyzw
michael@0 48 mov o6.xyzw, v1.xyzw
michael@0 49 mov o7.xyzw, v1.xyzw
michael@0 50 ret
michael@0 51 // Approximately 9 instruction slots used
michael@0 52 #endif
michael@0 53
michael@0 54 const BYTE g_PS_ClearMultiple[] =
michael@0 55 {
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michael@0 57 236, 240, 50, 40, 87, 55,
michael@0 58 73, 140, 251, 200, 8, 22,
michael@0 59 173, 117, 1, 0, 0, 0,
michael@0 60 88, 3, 0, 0, 5, 0,
michael@0 61 0, 0, 52, 0, 0, 0,
michael@0 62 140, 0, 0, 0, 224, 0,
michael@0 63 0, 0, 188, 1, 0, 0,
michael@0 64 220, 2, 0, 0, 82, 68,
michael@0 65 69, 70, 80, 0, 0, 0,
michael@0 66 0, 0, 0, 0, 0, 0,
michael@0 67 0, 0, 0, 0, 0, 0,
michael@0 68 28, 0, 0, 0, 0, 4,
michael@0 69 255, 255, 0, 1, 0, 0,
michael@0 70 28, 0, 0, 0, 77, 105,
michael@0 71 99, 114, 111, 115, 111, 102,
michael@0 72 116, 32, 40, 82, 41, 32,
michael@0 73 72, 76, 83, 76, 32, 83,
michael@0 74 104, 97, 100, 101, 114, 32,
michael@0 75 67, 111, 109, 112, 105, 108,
michael@0 76 101, 114, 32, 57, 46, 50,
michael@0 77 57, 46, 57, 53, 50, 46,
michael@0 78 51, 49, 49, 49, 0, 171,
michael@0 79 171, 171, 73, 83, 71, 78,
michael@0 80 76, 0, 0, 0, 2, 0,
michael@0 81 0, 0, 8, 0, 0, 0,
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michael@0 83 0, 0, 1, 0, 0, 0,
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michael@0 85 0, 0, 15, 0, 0, 0,
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michael@0 87 0, 0, 0, 0, 0, 0,
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michael@0 91 73, 84, 73, 79, 78, 0,
michael@0 92 67, 79, 76, 79, 82, 0,
michael@0 93 171, 171, 79, 83, 71, 78,
michael@0 94 212, 0, 0, 0, 8, 0,
michael@0 95 0, 0, 8, 0, 0, 0,
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michael@0 97 0, 0, 0, 0, 0, 0,
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michael@0 99 0, 0, 15, 0, 0, 0,
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michael@0 101 0, 0, 0, 0, 0, 0,
michael@0 102 3, 0, 0, 0, 1, 0,
michael@0 103 0, 0, 15, 0, 0, 0,
michael@0 104 200, 0, 0, 0, 2, 0,
michael@0 105 0, 0, 0, 0, 0, 0,
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michael@0 150 7, 0, 0, 0, 54, 0,
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michael@0 152 0, 0, 0, 0, 70, 30,
michael@0 153 16, 0, 1, 0, 0, 0,
michael@0 154 54, 0, 0, 5, 242, 32,
michael@0 155 16, 0, 1, 0, 0, 0,
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michael@0 157 0, 0, 54, 0, 0, 5,
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michael@0 159 0, 0, 70, 30, 16, 0,
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michael@0 162 3, 0, 0, 0, 70, 30,
michael@0 163 16, 0, 1, 0, 0, 0,
michael@0 164 54, 0, 0, 5, 242, 32,
michael@0 165 16, 0, 4, 0, 0, 0,
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michael@0 167 0, 0, 54, 0, 0, 5,
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michael@0 173 16, 0, 1, 0, 0, 0,
michael@0 174 54, 0, 0, 5, 242, 32,
michael@0 175 16, 0, 7, 0, 0, 0,
michael@0 176 70, 30, 16, 0, 1, 0,
michael@0 177 0, 0, 62, 0, 0, 1,
michael@0 178 83, 84, 65, 84, 116, 0,
michael@0 179 0, 0, 9, 0, 0, 0,
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michael@0 190 0, 0, 0, 0, 0, 0,
michael@0 191 0, 0, 0, 0, 0, 0,
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michael@0 197 0, 0, 0, 0, 0, 0,
michael@0 198 0, 0, 0, 0
michael@0 199 };

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