gfx/skia/trunk/src/opts/memset.arm.S@129ffea94266 (annotated)
gfx/skia/trunk/src/opts/memset.arm.S
Sat, 03 Jan 2015 20:18:00 +0100
- author
- Michael Schloh von Bennewitz <michael@schloh.com>
- date
- Sat, 03 Jan 2015 20:18:00 +0100
- branch
- TOR_BUG_3246
- changeset 7
- 129ffea94266
- permissions
- -rw-r--r--
Conditionally enable double key logic according to:
private browsing mode or privacy.thirdparty.isolate preference and
implement in GetCookieStringCommon and FindCookie where it counts...
With some reservations of how to convince FindCookie users to test
condition and pass a nullptr when disabling double key logic.
| michael@0 | 1 | /* |
| michael@0 | 2 | * Copyright 2010 The Android Open Source Project |
| michael@0 | 3 | * |
| michael@0 | 4 | * Use of this source code is governed by a BSD-style license that can be |
| michael@0 | 5 | * found in the LICENSE file. |
| michael@0 | 6 | */ |
| michael@0 | 7 | |
| michael@0 | 8 | /* Changes: |
| michael@0 | 9 | * 2010-08-11 Steve McIntyre <steve.mcintyre@arm.com> |
| michael@0 | 10 | * Added small changes to the two functions to make them work on the |
| michael@0 | 11 | * specified number of 16- or 32-bit values rather than the original |
| michael@0 | 12 | * code which was specified as a count of bytes. More verbose comments |
| michael@0 | 13 | * to aid future maintenance. |
| michael@0 | 14 | */ |
| michael@0 | 15 | |
| michael@0 | 16 | .text |
| michael@0 | 17 | .align 4 |
| michael@0 | 18 | .syntax unified |
| michael@0 | 19 | |
| michael@0 | 20 | .global arm_memset32 |
| michael@0 | 21 | .type arm_memset32, %function |
| michael@0 | 22 | .global arm_memset16 |
| michael@0 | 23 | .type arm_memset16, %function |
| michael@0 | 24 | |
| michael@0 | 25 | /* |
| michael@0 | 26 | * Optimized memset functions for ARM. |
| michael@0 | 27 | * |
| michael@0 | 28 | * void arm_memset16(uint16_t* dst, uint16_t value, int count); |
| michael@0 | 29 | * void arm_memset32(uint32_t* dst, uint32_t value, int count); |
| michael@0 | 30 | * |
| michael@0 | 31 | */ |
| michael@0 | 32 | arm_memset16: |
| michael@0 | 33 | .fnstart |
| michael@0 | 34 | push {lr} |
| michael@0 | 35 | |
| michael@0 | 36 | /* if count is equal to zero then abort */ |
| michael@0 | 37 | teq r2, #0 |
| michael@0 | 38 | ble .Lfinish |
| michael@0 | 39 | |
| michael@0 | 40 | /* Multiply count by 2 - go from the number of 16-bit shorts |
| michael@0 | 41 | * to the number of bytes desired. */ |
| michael@0 | 42 | mov r2, r2, lsl #1 |
| michael@0 | 43 | |
| michael@0 | 44 | /* expand the data to 32 bits */ |
| michael@0 | 45 | orr r1, r1, r1, lsl #16 |
| michael@0 | 46 | |
| michael@0 | 47 | /* align to 32 bits */ |
| michael@0 | 48 | tst r0, #2 |
| michael@0 | 49 | strhne r1, [r0], #2 |
| michael@0 | 50 | subne r2, r2, #2 |
| michael@0 | 51 | |
| michael@0 | 52 | /* Now jump into the main loop below. */ |
| michael@0 | 53 | b .Lwork_32 |
| michael@0 | 54 | .fnend |
| michael@0 | 55 | |
| michael@0 | 56 | arm_memset32: |
| michael@0 | 57 | .fnstart |
| michael@0 | 58 | push {lr} |
| michael@0 | 59 | |
| michael@0 | 60 | /* if count is equal to zero then abort */ |
| michael@0 | 61 | teq r2, #0 |
| michael@0 | 62 | ble .Lfinish |
| michael@0 | 63 | |
| michael@0 | 64 | /* Multiply count by 4 - go from the number of 32-bit words to |
| michael@0 | 65 | * the number of bytes desired. */ |
| michael@0 | 66 | mov r2, r2, lsl #2 |
| michael@0 | 67 | |
| michael@0 | 68 | .Lwork_32: |
| michael@0 | 69 | /* Set up registers ready for writing them out. */ |
| michael@0 | 70 | mov ip, r1 |
| michael@0 | 71 | mov lr, r1 |
| michael@0 | 72 | |
| michael@0 | 73 | /* Try to align the destination to a cache line. Assume 32 |
| michael@0 | 74 | * byte (8 word) cache lines, it's the common case. */ |
| michael@0 | 75 | rsb r3, r0, #0 |
| michael@0 | 76 | ands r3, r3, #0x1C |
| michael@0 | 77 | beq .Laligned32 |
| michael@0 | 78 | cmp r3, r2 |
| michael@0 | 79 | andhi r3, r2, #0x1C |
| michael@0 | 80 | sub r2, r2, r3 |
| michael@0 | 81 | |
| michael@0 | 82 | /* (Optionally) write any unaligned leading bytes. |
| michael@0 | 83 | * (0-28 bytes, length in r3) */ |
| michael@0 | 84 | movs r3, r3, lsl #28 |
| michael@0 | 85 | stmiacs r0!, {r1, lr} |
| michael@0 | 86 | stmiacs r0!, {r1, lr} |
| michael@0 | 87 | stmiami r0!, {r1, lr} |
| michael@0 | 88 | movs r3, r3, lsl #2 |
| michael@0 | 89 | strcs r1, [r0], #4 |
| michael@0 | 90 | |
| michael@0 | 91 | /* Now quickly loop through the cache-aligned data. */ |
| michael@0 | 92 | .Laligned32: |
| michael@0 | 93 | mov r3, r1 |
| michael@0 | 94 | 1: subs r2, r2, #32 |
| michael@0 | 95 | stmiahs r0!, {r1,r3,ip,lr} |
| michael@0 | 96 | stmiahs r0!, {r1,r3,ip,lr} |
| michael@0 | 97 | bhs 1b |
| michael@0 | 98 | add r2, r2, #32 |
| michael@0 | 99 | |
| michael@0 | 100 | /* (Optionally) store any remaining trailing bytes. |
| michael@0 | 101 | * (0-30 bytes, length in r2) */ |
| michael@0 | 102 | movs r2, r2, lsl #28 |
| michael@0 | 103 | stmiacs r0!, {r1,r3,ip,lr} |
| michael@0 | 104 | stmiami r0!, {r1,lr} |
| michael@0 | 105 | movs r2, r2, lsl #2 |
| michael@0 | 106 | strcs r1, [r0], #4 |
| michael@0 | 107 | strhmi lr, [r0], #2 |
| michael@0 | 108 | |
| michael@0 | 109 | .Lfinish: |
| michael@0 | 110 | pop {pc} |
| michael@0 | 111 | .fnend |
