gfx/skia/trunk/src/opts/memset32_neon.S

Sat, 03 Jan 2015 20:18:00 +0100

author
Michael Schloh von Bennewitz <michael@schloh.com>
date
Sat, 03 Jan 2015 20:18:00 +0100
branch
TOR_BUG_3246
changeset 7
129ffea94266
permissions
-rw-r--r--

Conditionally enable double key logic according to:
private browsing mode or privacy.thirdparty.isolate preference and
implement in GetCookieStringCommon and FindCookie where it counts...
With some reservations of how to convince FindCookie users to test
condition and pass a nullptr when disabling double key logic.

michael@0 1 /***************************************************************************
michael@0 2 * Copyright (c) 2009,2010, Code Aurora Forum. All rights reserved.
michael@0 3 *
michael@0 4 * Use of this source code is governed by a BSD-style license that can be
michael@0 5 * found in the LICENSE file.
michael@0 6 ***************************************************************************/
michael@0 7
michael@0 8 .code 32
michael@0 9 .fpu neon
michael@0 10 .align 4
michael@0 11 .globl memset32_neon
michael@0 12 .func
michael@0 13
michael@0 14 /* r0 = buffer, r1 = value, r2 = times to write */
michael@0 15 memset32_neon:
michael@0 16 cmp r2, #1
michael@0 17 streq r1, [r0], #4
michael@0 18 bxeq lr
michael@0 19
michael@0 20 cmp r2, #4
michael@0 21 bgt memset32_neon_start
michael@0 22 cmp r2, #0
michael@0 23 bxeq lr
michael@0 24 memset32_neon_small:
michael@0 25 str r1, [r0], #4
michael@0 26 subs r2, r2, #1
michael@0 27 bne memset32_neon_small
michael@0 28 bx lr
michael@0 29 memset32_neon_start:
michael@0 30 cmp r2, #16
michael@0 31 blt memset32_dropthru
michael@0 32 vdup.32 q0, r1
michael@0 33 vmov q1, q0
michael@0 34 cmp r2, #32
michael@0 35 blt memset32_16
michael@0 36 cmp r2, #64
michael@0 37 blt memset32_32
michael@0 38 cmp r2, #128
michael@0 39 blt memset32_64
michael@0 40 memset32_128:
michael@0 41 movs r12, r2, lsr #7
michael@0 42 memset32_loop128:
michael@0 43 subs r12, r12, #1
michael@0 44 vst1.64 {q0, q1}, [r0]!
michael@0 45 vst1.64 {q0, q1}, [r0]!
michael@0 46 vst1.64 {q0, q1}, [r0]!
michael@0 47 vst1.64 {q0, q1}, [r0]!
michael@0 48 vst1.64 {q0, q1}, [r0]!
michael@0 49 vst1.64 {q0, q1}, [r0]!
michael@0 50 vst1.64 {q0, q1}, [r0]!
michael@0 51 vst1.64 {q0, q1}, [r0]!
michael@0 52 vst1.64 {q0, q1}, [r0]!
michael@0 53 vst1.64 {q0, q1}, [r0]!
michael@0 54 vst1.64 {q0, q1}, [r0]!
michael@0 55 vst1.64 {q0, q1}, [r0]!
michael@0 56 vst1.64 {q0, q1}, [r0]!
michael@0 57 vst1.64 {q0, q1}, [r0]!
michael@0 58 vst1.64 {q0, q1}, [r0]!
michael@0 59 vst1.64 {q0, q1}, [r0]!
michael@0 60 bne memset32_loop128
michael@0 61 ands r2, r2, #0x7f
michael@0 62 bxeq lr
michael@0 63 memset32_64:
michael@0 64 movs r12, r2, lsr #6
michael@0 65 beq memset32_32
michael@0 66 vst1.64 {q0, q1}, [r0]!
michael@0 67 vst1.64 {q0, q1}, [r0]!
michael@0 68 vst1.64 {q0, q1}, [r0]!
michael@0 69 vst1.64 {q0, q1}, [r0]!
michael@0 70 vst1.64 {q0, q1}, [r0]!
michael@0 71 vst1.64 {q0, q1}, [r0]!
michael@0 72 vst1.64 {q0, q1}, [r0]!
michael@0 73 vst1.64 {q0, q1}, [r0]!
michael@0 74 ands r2, r2, #0x3f
michael@0 75 bxeq lr
michael@0 76 memset32_32:
michael@0 77 movs r12, r2, lsr #5
michael@0 78 beq memset32_16
michael@0 79 vst1.64 {q0, q1}, [r0]!
michael@0 80 vst1.64 {q0, q1}, [r0]!
michael@0 81 vst1.64 {q0, q1}, [r0]!
michael@0 82 vst1.64 {q0, q1}, [r0]!
michael@0 83 ands r2, r2, #0x1f
michael@0 84 bxeq lr
michael@0 85 memset32_16:
michael@0 86 movs r12, r2, lsr #4
michael@0 87 beq memset32_dropthru
michael@0 88 and r2, r2, #0xf
michael@0 89 vst1.64 {q0, q1}, [r0]!
michael@0 90 vst1.64 {q0, q1}, [r0]!
michael@0 91 memset32_dropthru:
michael@0 92 rsb r2, r2, #15
michael@0 93 add pc, pc, r2, lsl #2
michael@0 94 nop
michael@0 95 str r1, [r0, #56]
michael@0 96 str r1, [r0, #52]
michael@0 97 str r1, [r0, #48]
michael@0 98 str r1, [r0, #44]
michael@0 99 str r1, [r0, #40]
michael@0 100 str r1, [r0, #36]
michael@0 101 str r1, [r0, #32]
michael@0 102 str r1, [r0, #28]
michael@0 103 str r1, [r0, #24]
michael@0 104 str r1, [r0, #20]
michael@0 105 str r1, [r0, #16]
michael@0 106 str r1, [r0, #12]
michael@0 107 str r1, [r0, #8]
michael@0 108 str r1, [r0, #4]
michael@0 109 str r1, [r0, #0]
michael@0 110 bx lr
michael@0 111
michael@0 112 .endfunc
michael@0 113 .end

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