js/src/jit/arm/BaselineRegisters-arm.h@129ffea94266 (annotated)
js/src/jit/arm/BaselineRegisters-arm.h
Sat, 03 Jan 2015 20:18:00 +0100
- author
- Michael Schloh von Bennewitz <michael@schloh.com>
- date
- Sat, 03 Jan 2015 20:18:00 +0100
- branch
- TOR_BUG_3246
- changeset 7
- 129ffea94266
- permissions
- -rw-r--r--
Conditionally enable double key logic according to:
private browsing mode or privacy.thirdparty.isolate preference and
implement in GetCookieStringCommon and FindCookie where it counts...
With some reservations of how to convince FindCookie users to test
condition and pass a nullptr when disabling double key logic.
| michael@0 | 1 | /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*- |
| michael@0 | 2 | * vim: set ts=8 sts=4 et sw=4 tw=99: |
| michael@0 | 3 | * This Source Code Form is subject to the terms of the Mozilla Public |
| michael@0 | 4 | * License, v. 2.0. If a copy of the MPL was not distributed with this |
| michael@0 | 5 | * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ |
| michael@0 | 6 | |
| michael@0 | 7 | #ifndef jit_arm_BaselineRegisters_arm_h |
| michael@0 | 8 | #define jit_arm_BaselineRegisters_arm_h |
| michael@0 | 9 | |
| michael@0 | 10 | #ifdef JS_ION |
| michael@0 | 11 | |
| michael@0 | 12 | #include "jit/IonMacroAssembler.h" |
| michael@0 | 13 | |
| michael@0 | 14 | namespace js { |
| michael@0 | 15 | namespace jit { |
| michael@0 | 16 | |
| michael@0 | 17 | // r15 = program-counter |
| michael@0 | 18 | // r14 = link-register |
| michael@0 | 19 | |
| michael@0 | 20 | // r13 = stack-pointer |
| michael@0 | 21 | // r11 = frame-pointer |
| michael@0 | 22 | static MOZ_CONSTEXPR_VAR Register BaselineFrameReg = r11; |
| michael@0 | 23 | static MOZ_CONSTEXPR_VAR Register BaselineStackReg = sp; |
| michael@0 | 24 | |
| michael@0 | 25 | // ValueOperands R0, R1, and R2. |
| michael@0 | 26 | // R0 == JSReturnReg, and R2 uses registers not |
| michael@0 | 27 | // preserved across calls. R1 value should be |
| michael@0 | 28 | // preserved across calls. |
| michael@0 | 29 | static MOZ_CONSTEXPR_VAR ValueOperand R0(r3, r2); |
| michael@0 | 30 | static MOZ_CONSTEXPR_VAR ValueOperand R1(r5, r4); |
| michael@0 | 31 | static MOZ_CONSTEXPR_VAR ValueOperand R2(r1, r0); |
| michael@0 | 32 | |
| michael@0 | 33 | // BaselineTailCallReg and BaselineStubReg |
| michael@0 | 34 | // These use registers that are not preserved across |
| michael@0 | 35 | // calls. |
| michael@0 | 36 | static MOZ_CONSTEXPR_VAR Register BaselineTailCallReg = r14; |
| michael@0 | 37 | static MOZ_CONSTEXPR_VAR Register BaselineStubReg = r9; |
| michael@0 | 38 | |
| michael@0 | 39 | static MOZ_CONSTEXPR_VAR Register ExtractTemp0 = InvalidReg; |
| michael@0 | 40 | static MOZ_CONSTEXPR_VAR Register ExtractTemp1 = InvalidReg; |
| michael@0 | 41 | |
| michael@0 | 42 | // Register used internally by MacroAssemblerARM. |
| michael@0 | 43 | static MOZ_CONSTEXPR_VAR Register BaselineSecondScratchReg = r6; |
| michael@0 | 44 | |
| michael@0 | 45 | // R7 - R9 are generally available for use within stubcode. |
| michael@0 | 46 | |
| michael@0 | 47 | // Note that BaselineTailCallReg is actually just the link |
| michael@0 | 48 | // register. In ARM code emission, we do not clobber BaselineTailCallReg |
| michael@0 | 49 | // since we keep the return address for calls there. |
| michael@0 | 50 | |
| michael@0 | 51 | // FloatReg0 must be equal to ReturnFloatReg. |
| michael@0 | 52 | static MOZ_CONSTEXPR_VAR FloatRegister FloatReg0 = d0; |
| michael@0 | 53 | static MOZ_CONSTEXPR_VAR FloatRegister FloatReg1 = d1; |
| michael@0 | 54 | |
| michael@0 | 55 | } // namespace jit |
| michael@0 | 56 | } // namespace js |
| michael@0 | 57 | |
| michael@0 | 58 | #endif // JS_ION |
| michael@0 | 59 | |
| michael@0 | 60 | #endif /* jit_arm_BaselineRegisters_arm_h */ |
