Sat, 03 Jan 2015 20:18:00 +0100
Conditionally enable double key logic according to:
private browsing mode or privacy.thirdparty.isolate preference and
implement in GetCookieStringCommon and FindCookie where it counts...
With some reservations of how to convince FindCookie users to test
condition and pass a nullptr when disabling double key logic.
michael@0 | 1 | /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*- |
michael@0 | 2 | * vim: set ts=8 sts=4 et sw=4 tw=99: |
michael@0 | 3 | * This Source Code Form is subject to the terms of the Mozilla Public |
michael@0 | 4 | * License, v. 2.0. If a copy of the MPL was not distributed with this |
michael@0 | 5 | * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ |
michael@0 | 6 | |
michael@0 | 7 | #ifndef jit_arm_Lowering_arm_h |
michael@0 | 8 | #define jit_arm_Lowering_arm_h |
michael@0 | 9 | |
michael@0 | 10 | #include "jit/shared/Lowering-shared.h" |
michael@0 | 11 | |
michael@0 | 12 | namespace js { |
michael@0 | 13 | namespace jit { |
michael@0 | 14 | |
michael@0 | 15 | class LIRGeneratorARM : public LIRGeneratorShared |
michael@0 | 16 | { |
michael@0 | 17 | public: |
michael@0 | 18 | LIRGeneratorARM(MIRGenerator *gen, MIRGraph &graph, LIRGraph &lirGraph) |
michael@0 | 19 | : LIRGeneratorShared(gen, graph, lirGraph) |
michael@0 | 20 | { } |
michael@0 | 21 | |
michael@0 | 22 | protected: |
michael@0 | 23 | // Adds a box input to an instruction, setting operand |n| to the type and |
michael@0 | 24 | // |n+1| to the payload. |
michael@0 | 25 | bool useBox(LInstruction *lir, size_t n, MDefinition *mir, |
michael@0 | 26 | LUse::Policy policy = LUse::REGISTER, bool useAtStart = false); |
michael@0 | 27 | bool useBoxFixed(LInstruction *lir, size_t n, MDefinition *mir, Register reg1, Register reg2); |
michael@0 | 28 | |
michael@0 | 29 | // x86 has constraints on what registers can be formatted for 1-byte |
michael@0 | 30 | // stores and loads; on ARM all registers are okay. |
michael@0 | 31 | LAllocation useByteOpRegister(MDefinition *mir); |
michael@0 | 32 | LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition *mir); |
michael@0 | 33 | |
michael@0 | 34 | inline LDefinition tempToUnbox() { |
michael@0 | 35 | return LDefinition::BogusTemp(); |
michael@0 | 36 | } |
michael@0 | 37 | |
michael@0 | 38 | bool needTempForPostBarrier() { return false; } |
michael@0 | 39 | |
michael@0 | 40 | // x64 has a scratch register, so no need for another temp for dispatch |
michael@0 | 41 | // ICs. |
michael@0 | 42 | LDefinition tempForDispatchCache(MIRType outputType = MIRType_None) { |
michael@0 | 43 | return LDefinition::BogusTemp(); |
michael@0 | 44 | } |
michael@0 | 45 | |
michael@0 | 46 | void lowerUntypedPhiInput(MPhi *phi, uint32_t inputPosition, LBlock *block, size_t lirIndex); |
michael@0 | 47 | bool defineUntypedPhi(MPhi *phi, size_t lirIndex); |
michael@0 | 48 | bool lowerForShift(LInstructionHelper<1, 2, 0> *ins, MDefinition *mir, MDefinition *lhs, |
michael@0 | 49 | MDefinition *rhs); |
michael@0 | 50 | bool lowerUrshD(MUrsh *mir); |
michael@0 | 51 | |
michael@0 | 52 | bool lowerForALU(LInstructionHelper<1, 1, 0> *ins, MDefinition *mir, |
michael@0 | 53 | MDefinition *input); |
michael@0 | 54 | bool lowerForALU(LInstructionHelper<1, 2, 0> *ins, MDefinition *mir, |
michael@0 | 55 | MDefinition *lhs, MDefinition *rhs); |
michael@0 | 56 | |
michael@0 | 57 | bool lowerForFPU(LInstructionHelper<1, 1, 0> *ins, MDefinition *mir, |
michael@0 | 58 | MDefinition *src); |
michael@0 | 59 | bool lowerForFPU(LInstructionHelper<1, 2, 0> *ins, MDefinition *mir, |
michael@0 | 60 | MDefinition *lhs, MDefinition *rhs); |
michael@0 | 61 | bool lowerForBitAndAndBranch(LBitAndAndBranch *baab, MInstruction *mir, |
michael@0 | 62 | MDefinition *lhs, MDefinition *rhs); |
michael@0 | 63 | bool lowerConstantDouble(double d, MInstruction *ins); |
michael@0 | 64 | bool lowerConstantFloat32(float d, MInstruction *ins); |
michael@0 | 65 | bool lowerTruncateDToInt32(MTruncateToInt32 *ins); |
michael@0 | 66 | bool lowerTruncateFToInt32(MTruncateToInt32 *ins); |
michael@0 | 67 | bool lowerDivI(MDiv *div); |
michael@0 | 68 | bool lowerModI(MMod *mod); |
michael@0 | 69 | bool lowerMulI(MMul *mul, MDefinition *lhs, MDefinition *rhs); |
michael@0 | 70 | bool lowerUDiv(MDiv *div); |
michael@0 | 71 | bool lowerUMod(MMod *mod); |
michael@0 | 72 | bool visitPowHalf(MPowHalf *ins); |
michael@0 | 73 | bool visitAsmJSNeg(MAsmJSNeg *ins); |
michael@0 | 74 | |
michael@0 | 75 | LTableSwitch *newLTableSwitch(const LAllocation &in, const LDefinition &inputCopy, |
michael@0 | 76 | MTableSwitch *ins); |
michael@0 | 77 | LTableSwitchV *newLTableSwitchV(MTableSwitch *ins); |
michael@0 | 78 | |
michael@0 | 79 | public: |
michael@0 | 80 | bool visitConstant(MConstant *ins); |
michael@0 | 81 | bool visitBox(MBox *box); |
michael@0 | 82 | bool visitUnbox(MUnbox *unbox); |
michael@0 | 83 | bool visitReturn(MReturn *ret); |
michael@0 | 84 | bool lowerPhi(MPhi *phi); |
michael@0 | 85 | bool visitGuardShape(MGuardShape *ins); |
michael@0 | 86 | bool visitGuardObjectType(MGuardObjectType *ins); |
michael@0 | 87 | bool visitAsmJSUnsignedToDouble(MAsmJSUnsignedToDouble *ins); |
michael@0 | 88 | bool visitAsmJSUnsignedToFloat32(MAsmJSUnsignedToFloat32 *ins); |
michael@0 | 89 | bool visitAsmJSLoadHeap(MAsmJSLoadHeap *ins); |
michael@0 | 90 | bool visitAsmJSStoreHeap(MAsmJSStoreHeap *ins); |
michael@0 | 91 | bool visitAsmJSLoadFuncPtr(MAsmJSLoadFuncPtr *ins); |
michael@0 | 92 | bool visitStoreTypedArrayElementStatic(MStoreTypedArrayElementStatic *ins); |
michael@0 | 93 | bool visitForkJoinGetSlice(MForkJoinGetSlice *ins); |
michael@0 | 94 | |
michael@0 | 95 | static bool allowFloat32Optimizations() { |
michael@0 | 96 | return true; |
michael@0 | 97 | } |
michael@0 | 98 | }; |
michael@0 | 99 | |
michael@0 | 100 | typedef LIRGeneratorARM LIRGeneratorSpecific; |
michael@0 | 101 | |
michael@0 | 102 | } // namespace jit |
michael@0 | 103 | } // namespace js |
michael@0 | 104 | |
michael@0 | 105 | #endif /* jit_arm_Lowering_arm_h */ |