xpcom/reflect/xptcall/src/md/unix/xptcstubs_asm_ipf32.s@129ffea94266 (annotated)
xpcom/reflect/xptcall/src/md/unix/xptcstubs_asm_ipf32.s
Sat, 03 Jan 2015 20:18:00 +0100
- author
- Michael Schloh von Bennewitz <michael@schloh.com>
- date
- Sat, 03 Jan 2015 20:18:00 +0100
- branch
- TOR_BUG_3246
- changeset 7
- 129ffea94266
- permissions
- -rw-r--r--
Conditionally enable double key logic according to:
private browsing mode or privacy.thirdparty.isolate preference and
implement in GetCookieStringCommon and FindCookie where it counts...
With some reservations of how to convince FindCookie users to test
condition and pass a nullptr when disabling double key logic.
| michael@0 | 1 | |
| michael@0 | 2 | // Select C numeric constant |
| michael@0 | 3 | .radix C |
| michael@0 | 4 | .psr abi32 |
| michael@0 | 5 | .psr msb |
| michael@0 | 6 | // Section has executable code |
| michael@0 | 7 | .section .text, "ax","progbits" |
| michael@0 | 8 | // procedure named 'SharedStub' |
| michael@0 | 9 | .proc SharedStub |
| michael@0 | 10 | // manual bundling |
| michael@0 | 11 | .explicit |
| michael@0 | 12 | |
| michael@0 | 13 | .global PrepareAndDispatch |
| michael@0 | 14 | // .exclass PrepareAndDispatch, @fullyvisible |
| michael@0 | 15 | .type PrepareAndDispatch,@function |
| michael@0 | 16 | |
| michael@0 | 17 | SharedStub:: |
| michael@0 | 18 | // 10 arguments, first 8 are the input arguments of previous |
| michael@0 | 19 | // function call. The 9th one is methodIndex and the 10th is the |
| michael@0 | 20 | // pointer to the remaining input arguments. The last two arguments |
| michael@0 | 21 | // are passed in memory. |
| michael@0 | 22 | .prologue |
| michael@0 | 23 | .save ar.pfs , r41 |
| michael@0 | 24 | // allocate 8 input args, 4 local args, and 5 output args |
| michael@0 | 25 | alloc r41 = ar.pfs, 8, 4, 5, 0 // M |
| michael@0 | 26 | .save rp, r40 |
| michael@0 | 27 | mov r40 = rp // I |
| michael@0 | 28 | addp4 out4 = 28, sp ;; // I |
| michael@0 | 29 | |
| michael@0 | 30 | .save ar.unat, r42 |
| michael@0 | 31 | mov r42 = ar.unat // M |
| michael@0 | 32 | .fframe 144 |
| michael@0 | 33 | add sp = -144, sp // A |
| michael@0 | 34 | // unwind table already knows gp, don't need to specify anything |
| michael@0 | 35 | add r43 = 0, gp ;; // A |
| michael@0 | 36 | |
| michael@0 | 37 | // We have possible 8 integer registers and 8 float registers that could |
| michael@0 | 38 | // be arguments. We also have a stack region from the previous |
| michael@0 | 39 | // stack frame that may hold some stack arguments. |
| michael@0 | 40 | // We need to write the integer registers to a memory region, write |
| michael@0 | 41 | // the float registers to a memory region (making sure we don't step |
| michael@0 | 42 | // on NAT while touching the registers). We also mark the memory |
| michael@0 | 43 | // address of the stack arguments. |
| michael@0 | 44 | // We then call PrepareAndDispatch() specifying the three memory |
| michael@0 | 45 | // region pointers. |
| michael@0 | 46 | |
| michael@0 | 47 | |
| michael@0 | 48 | .body |
| michael@0 | 49 | add out0 = 0, in0 // A move self ptr |
| michael@0 | 50 | // 144 bytes = 16 byte stack header + 64 byte int space + 64 byte float space |
| michael@0 | 51 | // methodIndex is at 144 + 16 bytes away from current sp |
| michael@0 | 52 | // (current frame + previous frame header) |
| michael@0 | 53 | ld4 out4 = [out4] // A restarg address |
| michael@0 | 54 | add r11 = 160, sp ;; // A address of methodIndex |
| michael@0 | 55 | |
| michael@0 | 56 | ld8 out1 = [r11] // M load methodIndex |
| michael@0 | 57 | // sp + 16 is the start of intargs |
| michael@0 | 58 | add out2 = 16, sp // A address of intargs |
| michael@0 | 59 | // the intargs take up 64 bytes, so sp + 16 + 64 is the start of floatargs |
| michael@0 | 60 | add out3 = 80, sp ;; // A address of floatargs |
| michael@0 | 61 | |
| michael@0 | 62 | add r11 = 0, out2 ;; // A |
| michael@0 | 63 | st8.spill [r11] = in1, 8 // M |
| michael@0 | 64 | add r10 = 0, out3 ;; // A |
| michael@0 | 65 | |
| michael@0 | 66 | st8.spill [r11] = in2, 8 ;; // M |
| michael@0 | 67 | st8.spill [r11] = in3, 8 // M |
| michael@0 | 68 | nop.i 0 ;; // I |
| michael@0 | 69 | |
| michael@0 | 70 | st8.spill [r11] = in4, 8 ;; // M |
| michael@0 | 71 | st8.spill [r11] = in5, 8 // M |
| michael@0 | 72 | nop.i 0 ;; // I |
| michael@0 | 73 | |
| michael@0 | 74 | st8.spill [r11] = in6, 8 ;; // M |
| michael@0 | 75 | st8.spill [r11] = in7 // M |
| michael@0 | 76 | fclass.nm p14,p15 = f8,@nat ;; // F |
| michael@0 | 77 | |
| michael@0 | 78 | (p14) stfd [r10] = f8, 8 // M |
| michael@0 | 79 | (p15) add r10 = 8, r10 // A |
| michael@0 | 80 | fclass.nm p12,p13 = f9,@nat ;; // F |
| michael@0 | 81 | |
| michael@0 | 82 | (p12) stfd [r10] = f9, 8 // M |
| michael@0 | 83 | (p13) add r10 = 8, r10 // A |
| michael@0 | 84 | fclass.nm p14,p15 =f10,@nat ;; // F |
| michael@0 | 85 | |
| michael@0 | 86 | (p14) stfd [r10] = f10, 8 // M |
| michael@0 | 87 | (p15) add r10 = 8, r10 // A |
| michael@0 | 88 | fclass.nm p12,p13 =f11,@nat ;; // F |
| michael@0 | 89 | |
| michael@0 | 90 | (p12) stfd [r10] = f11, 8 // M |
| michael@0 | 91 | (p13) add r10 = 8, r10 // A |
| michael@0 | 92 | fclass.nm p14,p15 =f12,@nat ;; // F |
| michael@0 | 93 | |
| michael@0 | 94 | (p14) stfd [r10] = f12, 8 // M |
| michael@0 | 95 | (p15) add r10 = 8, r10 // A |
| michael@0 | 96 | fclass.nm p12,p13 =f13,@nat ;; // F |
| michael@0 | 97 | |
| michael@0 | 98 | (p12) stfd [r10] = f13, 8 // M |
| michael@0 | 99 | (p13) add r10 = 8, r10 // A |
| michael@0 | 100 | fclass.nm p14,p15 =f14,@nat ;; // F |
| michael@0 | 101 | |
| michael@0 | 102 | (p14) stfd [r10] = f14, 8 // M |
| michael@0 | 103 | (p15) add r10 = 8, r10 // A |
| michael@0 | 104 | fclass.nm p12,p13 =f15,@nat ;; // F |
| michael@0 | 105 | |
| michael@0 | 106 | (p12) stfd [r10] = f15, 8 // M |
| michael@0 | 107 | (p13) add r10 = 8, r10 // A |
| michael@0 | 108 | |
| michael@0 | 109 | // branch to PrepareAndDispatch |
| michael@0 | 110 | br.call.dptk.few rp = PrepareAndDispatch ;; // B |
| michael@0 | 111 | |
| michael@0 | 112 | // epilog |
| michael@0 | 113 | mov ar.unat = r42 // M |
| michael@0 | 114 | mov ar.pfs = r41 // I |
| michael@0 | 115 | mov rp = r40 ;; // I |
| michael@0 | 116 | |
| michael@0 | 117 | add gp = 0, r43 // A |
| michael@0 | 118 | add sp = 144, sp // A |
| michael@0 | 119 | br.ret.dptk.few rp ;; // B |
| michael@0 | 120 | |
| michael@0 | 121 | .endp |
| michael@0 | 122 | |
| michael@0 | 123 |
