Thu, 22 Jan 2015 13:21:57 +0100
Incorporate requested changes from Mozilla in review:
https://bugzilla.mozilla.org/show_bug.cgi?id=1123480#c6
michael@0 | 1 | ; |
michael@0 | 2 | ; Copyright (c) 2010 The WebM project authors. All Rights Reserved. |
michael@0 | 3 | ; |
michael@0 | 4 | ; Use of this source code is governed by a BSD-style license |
michael@0 | 5 | ; that can be found in the LICENSE file in the root of the source |
michael@0 | 6 | ; tree. An additional intellectual property rights grant can be found |
michael@0 | 7 | ; in the file PATENTS. All contributing project authors may |
michael@0 | 8 | ; be found in the AUTHORS file in the root of the source tree. |
michael@0 | 9 | ; |
michael@0 | 10 | |
michael@0 | 11 | |
michael@0 | 12 | EXPORT |vp8_short_walsh4x4_neon| |
michael@0 | 13 | |
michael@0 | 14 | ARM |
michael@0 | 15 | REQUIRE8 |
michael@0 | 16 | PRESERVE8 |
michael@0 | 17 | |
michael@0 | 18 | AREA ||.text||, CODE, READONLY, ALIGN=2 |
michael@0 | 19 | ;void vp8_short_walsh4x4_neon(short *input, short *output, int pitch) |
michael@0 | 20 | ; r0 short *input, |
michael@0 | 21 | ; r1 short *output, |
michael@0 | 22 | ; r2 int pitch |
michael@0 | 23 | |vp8_short_walsh4x4_neon| PROC |
michael@0 | 24 | |
michael@0 | 25 | vld1.16 {d0}, [r0@64], r2 ; load input |
michael@0 | 26 | vld1.16 {d1}, [r0@64], r2 |
michael@0 | 27 | vld1.16 {d2}, [r0@64], r2 |
michael@0 | 28 | vld1.16 {d3}, [r0@64] |
michael@0 | 29 | |
michael@0 | 30 | ;First for-loop |
michael@0 | 31 | ;transpose d0, d1, d2, d3. Then, d0=ip[0], d1=ip[1], d2=ip[2], d3=ip[3] |
michael@0 | 32 | vtrn.32 d0, d2 |
michael@0 | 33 | vtrn.32 d1, d3 |
michael@0 | 34 | |
michael@0 | 35 | vmov.s32 q15, #3 ; add 3 to all values |
michael@0 | 36 | |
michael@0 | 37 | vtrn.16 d0, d1 |
michael@0 | 38 | vtrn.16 d2, d3 |
michael@0 | 39 | |
michael@0 | 40 | vadd.s16 d4, d0, d2 ; ip[0] + ip[2] |
michael@0 | 41 | vadd.s16 d5, d1, d3 ; ip[1] + ip[3] |
michael@0 | 42 | vsub.s16 d6, d1, d3 ; ip[1] - ip[3] |
michael@0 | 43 | vsub.s16 d7, d0, d2 ; ip[0] - ip[2] |
michael@0 | 44 | |
michael@0 | 45 | vshl.s16 d4, d4, #2 ; a1 = (ip[0] + ip[2]) << 2 |
michael@0 | 46 | vshl.s16 d5, d5, #2 ; d1 = (ip[1] + ip[3]) << 2 |
michael@0 | 47 | vshl.s16 d6, d6, #2 ; c1 = (ip[1] - ip[3]) << 2 |
michael@0 | 48 | vceq.s16 d16, d4, #0 ; a1 == 0 |
michael@0 | 49 | vshl.s16 d7, d7, #2 ; b1 = (ip[0] - ip[2]) << 2 |
michael@0 | 50 | |
michael@0 | 51 | vadd.s16 d0, d4, d5 ; a1 + d1 |
michael@0 | 52 | vmvn d16, d16 ; a1 != 0 |
michael@0 | 53 | vsub.s16 d3, d4, d5 ; op[3] = a1 - d1 |
michael@0 | 54 | vadd.s16 d1, d7, d6 ; op[1] = b1 + c1 |
michael@0 | 55 | vsub.s16 d2, d7, d6 ; op[2] = b1 - c1 |
michael@0 | 56 | vsub.s16 d0, d0, d16 ; op[0] = a1 + d1 + (a1 != 0) |
michael@0 | 57 | |
michael@0 | 58 | ;Second for-loop |
michael@0 | 59 | ;transpose d0, d1, d2, d3, Then, d0=ip[0], d1=ip[4], d2=ip[8], d3=ip[12] |
michael@0 | 60 | vtrn.32 d1, d3 |
michael@0 | 61 | vtrn.32 d0, d2 |
michael@0 | 62 | vtrn.16 d2, d3 |
michael@0 | 63 | vtrn.16 d0, d1 |
michael@0 | 64 | |
michael@0 | 65 | vaddl.s16 q8, d0, d2 ; a1 = ip[0]+ip[8] |
michael@0 | 66 | vaddl.s16 q9, d1, d3 ; d1 = ip[4]+ip[12] |
michael@0 | 67 | vsubl.s16 q10, d1, d3 ; c1 = ip[4]-ip[12] |
michael@0 | 68 | vsubl.s16 q11, d0, d2 ; b1 = ip[0]-ip[8] |
michael@0 | 69 | |
michael@0 | 70 | vadd.s32 q0, q8, q9 ; a2 = a1 + d1 |
michael@0 | 71 | vadd.s32 q1, q11, q10 ; b2 = b1 + c1 |
michael@0 | 72 | vsub.s32 q2, q11, q10 ; c2 = b1 - c1 |
michael@0 | 73 | vsub.s32 q3, q8, q9 ; d2 = a1 - d1 |
michael@0 | 74 | |
michael@0 | 75 | vclt.s32 q8, q0, #0 |
michael@0 | 76 | vclt.s32 q9, q1, #0 |
michael@0 | 77 | vclt.s32 q10, q2, #0 |
michael@0 | 78 | vclt.s32 q11, q3, #0 |
michael@0 | 79 | |
michael@0 | 80 | ; subtract -1 (or 0) |
michael@0 | 81 | vsub.s32 q0, q0, q8 ; a2 += a2 < 0 |
michael@0 | 82 | vsub.s32 q1, q1, q9 ; b2 += b2 < 0 |
michael@0 | 83 | vsub.s32 q2, q2, q10 ; c2 += c2 < 0 |
michael@0 | 84 | vsub.s32 q3, q3, q11 ; d2 += d2 < 0 |
michael@0 | 85 | |
michael@0 | 86 | vadd.s32 q8, q0, q15 ; a2 + 3 |
michael@0 | 87 | vadd.s32 q9, q1, q15 ; b2 + 3 |
michael@0 | 88 | vadd.s32 q10, q2, q15 ; c2 + 3 |
michael@0 | 89 | vadd.s32 q11, q3, q15 ; d2 + 3 |
michael@0 | 90 | |
michael@0 | 91 | ; vrshrn? would add 1 << 3-1 = 2 |
michael@0 | 92 | vshrn.s32 d0, q8, #3 |
michael@0 | 93 | vshrn.s32 d1, q9, #3 |
michael@0 | 94 | vshrn.s32 d2, q10, #3 |
michael@0 | 95 | vshrn.s32 d3, q11, #3 |
michael@0 | 96 | |
michael@0 | 97 | vst1.16 {q0, q1}, [r1@128] |
michael@0 | 98 | |
michael@0 | 99 | bx lr |
michael@0 | 100 | |
michael@0 | 101 | ENDP |
michael@0 | 102 | |
michael@0 | 103 | END |