Wed, 31 Dec 2014 06:55:46 +0100
Added tag TORBROWSER_REPLICA for changeset 6474c204b198
michael@0 | 1 | ; |
michael@0 | 2 | ; jsimdcpu.asm - SIMD instruction support check |
michael@0 | 3 | ; |
michael@0 | 4 | ; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB |
michael@0 | 5 | ; |
michael@0 | 6 | ; Based on |
michael@0 | 7 | ; x86 SIMD extension for IJG JPEG library |
michael@0 | 8 | ; Copyright (C) 1999-2006, MIYASAKA Masaru. |
michael@0 | 9 | ; For conditions of distribution and use, see copyright notice in jsimdext.inc |
michael@0 | 10 | ; |
michael@0 | 11 | ; This file should be assembled with NASM (Netwide Assembler), |
michael@0 | 12 | ; can *not* be assembled with Microsoft's MASM or any compatible |
michael@0 | 13 | ; assembler (including Borland's Turbo Assembler). |
michael@0 | 14 | ; NASM is available from http://nasm.sourceforge.net/ or |
michael@0 | 15 | ; http://sourceforge.net/project/showfiles.php?group_id=6208 |
michael@0 | 16 | ; |
michael@0 | 17 | ; [TAB8] |
michael@0 | 18 | |
michael@0 | 19 | %include "jsimdext.inc" |
michael@0 | 20 | |
michael@0 | 21 | ; -------------------------------------------------------------------------- |
michael@0 | 22 | SECTION SEG_TEXT |
michael@0 | 23 | BITS 32 |
michael@0 | 24 | ; |
michael@0 | 25 | ; Check if the CPU supports SIMD instructions |
michael@0 | 26 | ; |
michael@0 | 27 | ; GLOBAL(unsigned int) |
michael@0 | 28 | ; jpeg_simd_cpu_support (void) |
michael@0 | 29 | ; |
michael@0 | 30 | |
michael@0 | 31 | align 16 |
michael@0 | 32 | global EXTN(jpeg_simd_cpu_support) |
michael@0 | 33 | |
michael@0 | 34 | EXTN(jpeg_simd_cpu_support): |
michael@0 | 35 | push ebx |
michael@0 | 36 | ; push ecx ; need not be preserved |
michael@0 | 37 | ; push edx ; need not be preserved |
michael@0 | 38 | ; push esi ; unused |
michael@0 | 39 | push edi |
michael@0 | 40 | |
michael@0 | 41 | xor edi,edi ; simd support flag |
michael@0 | 42 | |
michael@0 | 43 | pushfd |
michael@0 | 44 | pop eax |
michael@0 | 45 | mov edx,eax |
michael@0 | 46 | xor eax, 1<<21 ; flip ID bit in EFLAGS |
michael@0 | 47 | push eax |
michael@0 | 48 | popfd |
michael@0 | 49 | pushfd |
michael@0 | 50 | pop eax |
michael@0 | 51 | xor eax,edx |
michael@0 | 52 | jz short .return ; CPUID is not supported |
michael@0 | 53 | |
michael@0 | 54 | ; Check for MMX instruction support |
michael@0 | 55 | xor eax,eax |
michael@0 | 56 | cpuid |
michael@0 | 57 | test eax,eax |
michael@0 | 58 | jz short .return |
michael@0 | 59 | |
michael@0 | 60 | xor eax,eax |
michael@0 | 61 | inc eax |
michael@0 | 62 | cpuid |
michael@0 | 63 | mov eax,edx ; eax = Standard feature flags |
michael@0 | 64 | |
michael@0 | 65 | test eax, 1<<23 ; bit23:MMX |
michael@0 | 66 | jz short .no_mmx |
michael@0 | 67 | or edi, byte JSIMD_MMX |
michael@0 | 68 | .no_mmx: |
michael@0 | 69 | test eax, 1<<25 ; bit25:SSE |
michael@0 | 70 | jz short .no_sse |
michael@0 | 71 | or edi, byte JSIMD_SSE |
michael@0 | 72 | .no_sse: |
michael@0 | 73 | test eax, 1<<26 ; bit26:SSE2 |
michael@0 | 74 | jz short .no_sse2 |
michael@0 | 75 | or edi, byte JSIMD_SSE2 |
michael@0 | 76 | .no_sse2: |
michael@0 | 77 | |
michael@0 | 78 | ; Check for 3DNow! instruction support |
michael@0 | 79 | mov eax, 0x80000000 |
michael@0 | 80 | cpuid |
michael@0 | 81 | cmp eax, 0x80000000 |
michael@0 | 82 | jbe short .return |
michael@0 | 83 | |
michael@0 | 84 | mov eax, 0x80000001 |
michael@0 | 85 | cpuid |
michael@0 | 86 | mov eax,edx ; eax = Extended feature flags |
michael@0 | 87 | |
michael@0 | 88 | test eax, 1<<31 ; bit31:3DNow!(vendor independent) |
michael@0 | 89 | jz short .no_3dnow |
michael@0 | 90 | or edi, byte JSIMD_3DNOW |
michael@0 | 91 | .no_3dnow: |
michael@0 | 92 | |
michael@0 | 93 | .return: |
michael@0 | 94 | mov eax,edi |
michael@0 | 95 | |
michael@0 | 96 | pop edi |
michael@0 | 97 | ; pop esi ; unused |
michael@0 | 98 | ; pop edx ; need not be preserved |
michael@0 | 99 | ; pop ecx ; need not be preserved |
michael@0 | 100 | pop ebx |
michael@0 | 101 | ret |
michael@0 | 102 | |
michael@0 | 103 | ; For some reason, the OS X linker does not honor the request to align the |
michael@0 | 104 | ; segment unless we do this. |
michael@0 | 105 | align 16 |