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comparison: security/nss/lib/freebl/mpi/vis_64.il
security/nss/lib/freebl/mpi/vis_64.il
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| -1:000000000000 | 0:bb759d4d7626 |
|---|---|
| 1 ! | |
| 2 ! This Source Code Form is subject to the terms of the Mozilla Public | |
| 3 ! License, v. 2.0. If a copy of the MPL was not distributed with this | |
| 4 ! file, You can obtain one at http://mozilla.org/MPL/2.0/. | |
| 5 | |
| 6 ! This file is to be used in place of vis.il in 64-bit builds. | |
| 7 | |
| 8 !-------------------------------------------------------------------- | |
| 9 ! Pure edge handling instructions | |
| 10 ! | |
| 11 ! int vis_edge8(void */*frs1*/, void */*frs2*/); | |
| 12 ! | |
| 13 .inline vis_edge8,16 | |
| 14 edge8 %o0,%o1,%o0 | |
| 15 .end | |
| 16 ! | |
| 17 ! int vis_edge8l(void */*frs1*/, void */*frs2*/); | |
| 18 ! | |
| 19 .inline vis_edge8l,16 | |
| 20 edge8l %o0,%o1,%o0 | |
| 21 .end | |
| 22 ! | |
| 23 ! int vis_edge16(void */*frs1*/, void */*frs2*/); | |
| 24 ! | |
| 25 .inline vis_edge16,16 | |
| 26 edge16 %o0,%o1,%o0 | |
| 27 .end | |
| 28 ! | |
| 29 ! int vis_edge16l(void */*frs1*/, void */*frs2*/); | |
| 30 ! | |
| 31 .inline vis_edge16l,16 | |
| 32 edge16l %o0,%o1,%o0 | |
| 33 .end | |
| 34 ! | |
| 35 ! int vis_edge32(void */*frs1*/, void */*frs2*/); | |
| 36 ! | |
| 37 .inline vis_edge32,16 | |
| 38 edge32 %o0,%o1,%o0 | |
| 39 .end | |
| 40 ! | |
| 41 ! int vis_edge32l(void */*frs1*/, void */*frs2*/); | |
| 42 ! | |
| 43 .inline vis_edge32l,16 | |
| 44 edge32l %o0,%o1,%o0 | |
| 45 .end | |
| 46 | |
| 47 !-------------------------------------------------------------------- | |
| 48 ! Edge handling instructions with negative return values if cc set | |
| 49 ! | |
| 50 ! int vis_edge8cc(void */*frs1*/, void */*frs2*/); | |
| 51 ! | |
| 52 .inline vis_edge8cc,16 | |
| 53 edge8 %o0,%o1,%o0 | |
| 54 mov 0,%o1 | |
| 55 movgu %xcc,-1024,%o1 | |
| 56 or %o1,%o0,%o0 | |
| 57 .end | |
| 58 ! | |
| 59 ! int vis_edge8lcc(void */*frs1*/, void */*frs2*/); | |
| 60 ! | |
| 61 .inline vis_edge8lcc,16 | |
| 62 edge8l %o0,%o1,%o0 | |
| 63 mov 0,%o1 | |
| 64 movgu %xcc,-1024,%o1 | |
| 65 or %o1,%o0,%o0 | |
| 66 .end | |
| 67 ! | |
| 68 ! int vis_edge16cc(void */*frs1*/, void */*frs2*/); | |
| 69 ! | |
| 70 .inline vis_edge16cc,16 | |
| 71 edge16 %o0,%o1,%o0 | |
| 72 mov 0,%o1 | |
| 73 movgu %xcc,-1024,%o1 | |
| 74 or %o1,%o0,%o0 | |
| 75 .end | |
| 76 ! | |
| 77 ! int vis_edge16lcc(void */*frs1*/, void */*frs2*/); | |
| 78 ! | |
| 79 .inline vis_edge16lcc,16 | |
| 80 edge16l %o0,%o1,%o0 | |
| 81 mov 0,%o1 | |
| 82 movgu %xcc,-1024,%o1 | |
| 83 or %o1,%o0,%o0 | |
| 84 .end | |
| 85 ! | |
| 86 ! int vis_edge32cc(void */*frs1*/, void */*frs2*/); | |
| 87 ! | |
| 88 .inline vis_edge32cc,16 | |
| 89 edge32 %o0,%o1,%o0 | |
| 90 mov 0,%o1 | |
| 91 movgu %xcc,-1024,%o1 | |
| 92 or %o1,%o0,%o0 | |
| 93 .end | |
| 94 ! | |
| 95 ! int vis_edge32lcc(void */*frs1*/, void */*frs2*/); | |
| 96 ! | |
| 97 .inline vis_edge32lcc,16 | |
| 98 edge32l %o0,%o1,%o0 | |
| 99 mov 0,%o1 | |
| 100 movgu %xcc,-1024,%o1 | |
| 101 or %o1,%o0,%o0 | |
| 102 .end | |
| 103 | |
| 104 !-------------------------------------------------------------------- | |
| 105 ! Alignment instructions | |
| 106 ! | |
| 107 ! void *vis_alignaddr(void */*rs1*/, int /*rs2*/); | |
| 108 ! | |
| 109 .inline vis_alignaddr,12 | |
| 110 alignaddr %o0,%o1,%o0 | |
| 111 .end | |
| 112 ! | |
| 113 ! void *vis_alignaddrl(void */*rs1*/, int /*rs2*/); | |
| 114 ! | |
| 115 .inline vis_alignaddrl,12 | |
| 116 alignaddrl %o0,%o1,%o0 | |
| 117 .end | |
| 118 ! | |
| 119 ! double vis_faligndata(double /*frs1*/, double /*frs2*/); | |
| 120 ! | |
| 121 .inline vis_faligndata,16 | |
| 122 faligndata %f0,%f2,%f0 | |
| 123 .end | |
| 124 | |
| 125 !-------------------------------------------------------------------- | |
| 126 ! Partitioned comparison instructions | |
| 127 ! | |
| 128 ! int vis_fcmple16(double /*frs1*/, double /*frs2*/); | |
| 129 ! | |
| 130 .inline vis_fcmple16,16 | |
| 131 fcmple16 %f0,%f2,%o0 | |
| 132 .end | |
| 133 ! | |
| 134 ! int vis_fcmpne16(double /*frs1*/, double /*frs2*/); | |
| 135 ! | |
| 136 .inline vis_fcmpne16,16 | |
| 137 fcmpne16 %f0,%f2,%o0 | |
| 138 .end | |
| 139 ! | |
| 140 ! int vis_fcmple32(double /*frs1*/, double /*frs2*/); | |
| 141 ! | |
| 142 .inline vis_fcmple32,16 | |
| 143 fcmple32 %f0,%f2,%o0 | |
| 144 .end | |
| 145 ! | |
| 146 ! int vis_fcmpne32(double /*frs1*/, double /*frs2*/); | |
| 147 ! | |
| 148 .inline vis_fcmpne32,16 | |
| 149 fcmpne32 %f0,%f2,%o0 | |
| 150 .end | |
| 151 ! | |
| 152 ! int vis_fcmpgt16(double /*frs1*/, double /*frs2*/); | |
| 153 ! | |
| 154 .inline vis_fcmpgt16,16 | |
| 155 fcmpgt16 %f0,%f2,%o0 | |
| 156 .end | |
| 157 ! | |
| 158 ! int vis_fcmpeq16(double /*frs1*/, double /*frs2*/); | |
| 159 ! | |
| 160 .inline vis_fcmpeq16,16 | |
| 161 fcmpeq16 %f0,%f2,%o0 | |
| 162 .end | |
| 163 ! | |
| 164 ! int vis_fcmpgt32(double /*frs1*/, double /*frs2*/); | |
| 165 ! | |
| 166 .inline vis_fcmpgt32,16 | |
| 167 fcmpgt32 %f0,%f2,%o0 | |
| 168 .end | |
| 169 ! | |
| 170 ! int vis_fcmpeq32(double /*frs1*/, double /*frs2*/); | |
| 171 ! | |
| 172 .inline vis_fcmpeq32,16 | |
| 173 fcmpeq32 %f0,%f2,%o0 | |
| 174 .end | |
| 175 | |
| 176 !-------------------------------------------------------------------- | |
| 177 ! Partitioned arithmetic | |
| 178 ! | |
| 179 ! double vis_fmul8x16(float /*frs1*/, double /*frs2*/); | |
| 180 ! | |
| 181 .inline vis_fmul8x16,12 | |
| 182 fmul8x16 %f1,%f2,%f0 | |
| 183 .end | |
| 184 ! | |
| 185 ! double vis_fmul8x16_dummy(float /*frs1*/, int /*dummy*/, double /*frs2*/); | |
| 186 ! | |
| 187 .inline vis_fmul8x16_dummy,16 | |
| 188 fmul8x16 %f1,%f4,%f0 | |
| 189 .end | |
| 190 ! | |
| 191 ! double vis_fmul8x16au(float /*frs1*/, float /*frs2*/); | |
| 192 ! | |
| 193 .inline vis_fmul8x16au,8 | |
| 194 fmul8x16au %f1,%f3,%f0 | |
| 195 .end | |
| 196 ! | |
| 197 ! double vis_fmul8x16al(float /*frs1*/, float /*frs2*/); | |
| 198 ! | |
| 199 .inline vis_fmul8x16al,8 | |
| 200 fmul8x16al %f1,%f3,%f0 | |
| 201 .end | |
| 202 ! | |
| 203 ! double vis_fmul8sux16(double /*frs1*/, double /*frs2*/); | |
| 204 ! | |
| 205 .inline vis_fmul8sux16,16 | |
| 206 fmul8sux16 %f0,%f2,%f0 | |
| 207 .end | |
| 208 ! | |
| 209 ! double vis_fmul8ulx16(double /*frs1*/, double /*frs2*/); | |
| 210 ! | |
| 211 .inline vis_fmul8ulx16,16 | |
| 212 fmul8ulx16 %f0,%f2,%f0 | |
| 213 .end | |
| 214 ! | |
| 215 ! double vis_fmuld8sux16(float /*frs1*/, float /*frs2*/); | |
| 216 ! | |
| 217 .inline vis_fmuld8sux16,8 | |
| 218 fmuld8sux16 %f1,%f3,%f0 | |
| 219 .end | |
| 220 ! | |
| 221 ! double vis_fmuld8ulx16(float /*frs1*/, float /*frs2*/); | |
| 222 ! | |
| 223 .inline vis_fmuld8ulx16,8 | |
| 224 fmuld8ulx16 %f1,%f3,%f0 | |
| 225 .end | |
| 226 ! | |
| 227 ! double vis_fpadd16(double /*frs1*/, double /*frs2*/); | |
| 228 ! | |
| 229 .inline vis_fpadd16,16 | |
| 230 fpadd16 %f0,%f2,%f0 | |
| 231 .end | |
| 232 ! | |
| 233 ! float vis_fpadd16s(float /*frs1*/, float /*frs2*/); | |
| 234 ! | |
| 235 .inline vis_fpadd16s,8 | |
| 236 fpadd16s %f1,%f3,%f0 | |
| 237 .end | |
| 238 ! | |
| 239 ! double vis_fpadd32(double /*frs1*/, double /*frs2*/); | |
| 240 ! | |
| 241 .inline vis_fpadd32,16 | |
| 242 fpadd32 %f0,%f2,%f0 | |
| 243 .end | |
| 244 ! | |
| 245 ! float vis_fpadd32s(float /*frs1*/, float /*frs2*/); | |
| 246 ! | |
| 247 .inline vis_fpadd32s,8 | |
| 248 fpadd32s %f1,%f3,%f0 | |
| 249 .end | |
| 250 ! | |
| 251 ! double vis_fpsub16(double /*frs1*/, double /*frs2*/); | |
| 252 ! | |
| 253 .inline vis_fpsub16,16 | |
| 254 fpsub16 %f0,%f2,%f0 | |
| 255 .end | |
| 256 ! | |
| 257 ! float vis_fpsub16s(float /*frs1*/, float /*frs2*/); | |
| 258 ! | |
| 259 .inline vis_fpsub16s,8 | |
| 260 fpsub16s %f1,%f3,%f0 | |
| 261 .end | |
| 262 ! | |
| 263 ! double vis_fpsub32(double /*frs1*/, double /*frs2*/); | |
| 264 ! | |
| 265 .inline vis_fpsub32,16 | |
| 266 fpsub32 %f0,%f2,%f0 | |
| 267 .end | |
| 268 ! | |
| 269 ! float vis_fpsub32s(float /*frs1*/, float /*frs2*/); | |
| 270 ! | |
| 271 .inline vis_fpsub32s,8 | |
| 272 fpsub32s %f1,%f3,%f0 | |
| 273 .end | |
| 274 | |
| 275 !-------------------------------------------------------------------- | |
| 276 ! Pixel packing | |
| 277 ! | |
| 278 ! float vis_fpack16(double /*frs2*/); | |
| 279 ! | |
| 280 .inline vis_fpack16,8 | |
| 281 fpack16 %f0,%f0 | |
| 282 .end | |
| 283 ! | |
| 284 ! double vis_fpack16_pair(double /*frs2*/, double /*frs2*/); | |
| 285 ! | |
| 286 .inline vis_fpack16_pair,16 | |
| 287 fpack16 %f0,%f0 | |
| 288 fpack16 %f2,%f1 | |
| 289 .end | |
| 290 ! | |
| 291 ! void vis_st2_fpack16(double, double, double *) | |
| 292 ! | |
| 293 .inline vis_st2_fpack16,24 | |
| 294 fpack16 %f0,%f0 | |
| 295 fpack16 %f2,%f1 | |
| 296 st %f0,[%o2+0] | |
| 297 st %f1,[%o2+4] | |
| 298 .end | |
| 299 ! | |
| 300 ! void vis_std_fpack16(double, double, double *) | |
| 301 ! | |
| 302 .inline vis_std_fpack16,24 | |
| 303 fpack16 %f0,%f0 | |
| 304 fpack16 %f2,%f1 | |
| 305 std %f0,[%o2] | |
| 306 .end | |
| 307 ! | |
| 308 ! void vis_st2_fpackfix(double, double, double *) | |
| 309 ! | |
| 310 .inline vis_st2_fpackfix,24 | |
| 311 fpackfix %f0,%f0 | |
| 312 fpackfix %f2,%f1 | |
| 313 st %f0,[%o2+0] | |
| 314 st %f1,[%o2+4] | |
| 315 .end | |
| 316 ! | |
| 317 ! double vis_fpack16_to_hi(double /*frs1*/, double /*frs2*/); | |
| 318 ! | |
| 319 .inline vis_fpack16_to_hi,16 | |
| 320 fpack16 %f2,%f0 | |
| 321 .end | |
| 322 | |
| 323 ! double vis_fpack16_to_lo(double /*frs1*/, double /*frs2*/); | |
| 324 ! | |
| 325 .inline vis_fpack16_to_lo,16 | |
| 326 fpack16 %f2,%f3 | |
| 327 fmovs %f3,%f1 /* without this, optimizer goes wrong */ | |
| 328 .end | |
| 329 | |
| 330 ! | |
| 331 ! double vis_fpack32(double /*frs1*/, double /*frs2*/); | |
| 332 ! | |
| 333 .inline vis_fpack32,16 | |
| 334 fpack32 %f0,%f2,%f0 | |
| 335 .end | |
| 336 ! | |
| 337 ! float vis_fpackfix(double /*frs2*/); | |
| 338 ! | |
| 339 .inline vis_fpackfix,8 | |
| 340 fpackfix %f0,%f0 | |
| 341 .end | |
| 342 ! | |
| 343 ! double vis_fpackfix_pair(double /*frs2*/, double /*frs2*/); | |
| 344 ! | |
| 345 .inline vis_fpackfix_pair,16 | |
| 346 fpackfix %f0,%f0 | |
| 347 fpackfix %f2,%f1 | |
| 348 .end | |
| 349 | |
| 350 !-------------------------------------------------------------------- | |
| 351 ! Motion estimation | |
| 352 ! | |
| 353 ! double vis_pxldist64(double accum /*frd*/, double pxls1 /*frs1*/, | |
| 354 ! double pxls2 /*frs2*/); | |
| 355 ! | |
| 356 .inline vis_pxldist64,24 | |
| 357 pdist %f2,%f4,%f0 | |
| 358 .end | |
| 359 | |
| 360 !-------------------------------------------------------------------- | |
| 361 ! Channel merging | |
| 362 ! | |
| 363 ! double vis_fpmerge(float /*frs1*/, float /*frs2*/); | |
| 364 ! | |
| 365 .inline vis_fpmerge,8 | |
| 366 fpmerge %f1,%f3,%f0 | |
| 367 .end | |
| 368 | |
| 369 !-------------------------------------------------------------------- | |
| 370 ! Pixel expansion | |
| 371 ! | |
| 372 ! double vis_fexpand(float /*frs2*/); | |
| 373 ! | |
| 374 .inline vis_fexpand,4 | |
| 375 fexpand %f1,%f0 | |
| 376 .end | |
| 377 | |
| 378 ! double vis_fexpand_hi(double /*frs2*/); | |
| 379 ! | |
| 380 .inline vis_fexpand_hi,8 | |
| 381 fexpand %f0,%f0 | |
| 382 .end | |
| 383 | |
| 384 ! double vis_fexpand_lo(double /*frs2*/); | |
| 385 ! | |
| 386 .inline vis_fexpand_lo,8 | |
| 387 fexpand %f1,%f0 | |
| 388 .end | |
| 389 | |
| 390 !-------------------------------------------------------------------- | |
| 391 ! Bitwise logical operations | |
| 392 ! | |
| 393 ! double vis_fnor(double /*frs1*/, double /*frs2*/); | |
| 394 ! | |
| 395 .inline vis_fnor,16 | |
| 396 fnor %f0,%f2,%f0 | |
| 397 .end | |
| 398 ! | |
| 399 ! float vis_fnors(float /*frs1*/, float /*frs2*/); | |
| 400 ! | |
| 401 .inline vis_fnors,8 | |
| 402 fnors %f1,%f3,%f0 | |
| 403 .end | |
| 404 ! | |
| 405 ! double vis_fandnot(double /*frs1*/, double /*frs2*/); | |
| 406 ! | |
| 407 .inline vis_fandnot,16 | |
| 408 fandnot1 %f0,%f2,%f0 | |
| 409 .end | |
| 410 ! | |
| 411 ! float vis_fandnots(float /*frs1*/, float /*frs2*/); | |
| 412 ! | |
| 413 .inline vis_fandnots,8 | |
| 414 fandnot1s %f1,%f3,%f0 | |
| 415 .end | |
| 416 ! | |
| 417 ! double vis_fnot(double /*frs1*/); | |
| 418 ! | |
| 419 .inline vis_fnot,8 | |
| 420 fnot1 %f0,%f0 | |
| 421 .end | |
| 422 ! | |
| 423 ! float vis_fnots(float /*frs1*/); | |
| 424 ! | |
| 425 .inline vis_fnots,4 | |
| 426 fnot1s %f1,%f0 | |
| 427 .end | |
| 428 ! | |
| 429 ! double vis_fxor(double /*frs1*/, double /*frs2*/); | |
| 430 ! | |
| 431 .inline vis_fxor,16 | |
| 432 fxor %f0,%f2,%f0 | |
| 433 .end | |
| 434 ! | |
| 435 ! float vis_fxors(float /*frs1*/, float /*frs2*/); | |
| 436 ! | |
| 437 .inline vis_fxors,8 | |
| 438 fxors %f1,%f3,%f0 | |
| 439 .end | |
| 440 ! | |
| 441 ! double vis_fnand(double /*frs1*/, double /*frs2*/); | |
| 442 ! | |
| 443 .inline vis_fnand,16 | |
| 444 fnand %f0,%f2,%f0 | |
| 445 .end | |
| 446 ! | |
| 447 ! float vis_fnands(float /*frs1*/, float /*frs2*/); | |
| 448 ! | |
| 449 .inline vis_fnands,8 | |
| 450 fnands %f1,%f3,%f0 | |
| 451 .end | |
| 452 ! | |
| 453 ! double vis_fand(double /*frs1*/, double /*frs2*/); | |
| 454 ! | |
| 455 .inline vis_fand,16 | |
| 456 fand %f0,%f2,%f0 | |
| 457 .end | |
| 458 ! | |
| 459 ! float vis_fands(float /*frs1*/, float /*frs2*/); | |
| 460 ! | |
| 461 .inline vis_fands,8 | |
| 462 fands %f1,%f3,%f0 | |
| 463 .end | |
| 464 ! | |
| 465 ! double vis_fxnor(double /*frs1*/, double /*frs2*/); | |
| 466 ! | |
| 467 .inline vis_fxnor,16 | |
| 468 fxnor %f0,%f2,%f0 | |
| 469 .end | |
| 470 ! | |
| 471 ! float vis_fxnors(float /*frs1*/, float /*frs2*/); | |
| 472 ! | |
| 473 .inline vis_fxnors,8 | |
| 474 fxnors %f1,%f3,%f0 | |
| 475 .end | |
| 476 ! | |
| 477 ! double vis_fsrc(double /*frs1*/); | |
| 478 ! | |
| 479 .inline vis_fsrc,8 | |
| 480 fsrc1 %f0,%f0 | |
| 481 .end | |
| 482 ! | |
| 483 ! float vis_fsrcs(float /*frs1*/); | |
| 484 ! | |
| 485 .inline vis_fsrcs,4 | |
| 486 fsrc1s %f1,%f0 | |
| 487 .end | |
| 488 ! | |
| 489 ! double vis_fornot(double /*frs1*/, double /*frs2*/); | |
| 490 ! | |
| 491 .inline vis_fornot,16 | |
| 492 fornot1 %f0,%f2,%f0 | |
| 493 .end | |
| 494 ! | |
| 495 ! float vis_fornots(float /*frs1*/, float /*frs2*/); | |
| 496 ! | |
| 497 .inline vis_fornots,8 | |
| 498 fornot1s %f1,%f3,%f0 | |
| 499 .end | |
| 500 ! | |
| 501 ! double vis_for(double /*frs1*/, double /*frs2*/); | |
| 502 ! | |
| 503 .inline vis_for,16 | |
| 504 for %f0,%f2,%f0 | |
| 505 .end | |
| 506 ! | |
| 507 ! float vis_fors(float /*frs1*/, float /*frs2*/); | |
| 508 ! | |
| 509 .inline vis_fors,8 | |
| 510 fors %f1,%f3,%f0 | |
| 511 .end | |
| 512 ! | |
| 513 ! double vis_fzero(/* void */) | |
| 514 ! | |
| 515 .inline vis_fzero,0 | |
| 516 fzero %f0 | |
| 517 .end | |
| 518 ! | |
| 519 ! float vis_fzeros(/* void */) | |
| 520 ! | |
| 521 .inline vis_fzeros,0 | |
| 522 fzeros %f0 | |
| 523 .end | |
| 524 ! | |
| 525 ! double vis_fone(/* void */) | |
| 526 ! | |
| 527 .inline vis_fone,0 | |
| 528 fone %f0 | |
| 529 .end | |
| 530 ! | |
| 531 ! float vis_fones(/* void */) | |
| 532 ! | |
| 533 .inline vis_fones,0 | |
| 534 fones %f0 | |
| 535 .end | |
| 536 | |
| 537 !-------------------------------------------------------------------- | |
| 538 ! Partial store instructions | |
| 539 ! | |
| 540 ! vis_stdfa_ASI_PST8P(double frd, void *rs1, int rmask) | |
| 541 ! | |
| 542 .inline vis_stdfa_ASI_PST8P,20 | |
| 543 stda %f0,[%o1]%o2,0xc0 ! ASI_PST8_P | |
| 544 .end | |
| 545 ! | |
| 546 ! vis_stdfa_ASI_PST8PL(double frd, void *rs1, int rmask) | |
| 547 ! | |
| 548 .inline vis_stdfa_ASI_PST8PL,20 | |
| 549 stda %f0,[%o1]%o2,0xc8 ! ASI_PST8_PL | |
| 550 .end | |
| 551 ! | |
| 552 ! vis_stdfa_ASI_PST8P_int_pair(void *rs1, void *rs2, void *rs3, int rmask); | |
| 553 ! | |
| 554 .inline vis_stdfa_ASI_PST8P_int_pair,28 | |
| 555 ld [%o0],%f4 | |
| 556 ld [%o1],%f5 | |
| 557 stda %f4,[%o2]%o3,0xc0 ! ASI_PST8_P | |
| 558 .end | |
| 559 ! | |
| 560 ! vis_stdfa_ASI_PST8S(double frd, void *rs1, int rmask) | |
| 561 ! | |
| 562 .inline vis_stdfa_ASI_PST8S,20 | |
| 563 stda %f0,[%o1]%o2,0xc1 ! ASI_PST8_S | |
| 564 .end | |
| 565 ! | |
| 566 ! vis_stdfa_ASI_PST16P(double frd, void *rs1, int rmask) | |
| 567 ! | |
| 568 .inline vis_stdfa_ASI_PST16P,20 | |
| 569 stda %f0,[%o1]%o2,0xc2 ! ASI_PST16_P | |
| 570 .end | |
| 571 ! | |
| 572 ! vis_stdfa_ASI_PST16S(double frd, void *rs1, int rmask) | |
| 573 ! | |
| 574 .inline vis_stdfa_ASI_PST16S,20 | |
| 575 stda %f0,[%o1]%o2,0xc3 ! ASI_PST16_S | |
| 576 .end | |
| 577 ! | |
| 578 ! vis_stdfa_ASI_PST32P(double frd, void *rs1, int rmask) | |
| 579 ! | |
| 580 .inline vis_stdfa_ASI_PST32P,20 | |
| 581 stda %f0,[%o1]%o2,0xc4 ! ASI_PST32_P | |
| 582 .end | |
| 583 ! | |
| 584 ! vis_stdfa_ASI_PST32S(double frd, void *rs1, int rmask) | |
| 585 ! | |
| 586 .inline vis_stdfa_ASI_PST32S,20 | |
| 587 stda %f0,[%o1]%o2,0xc5 ! ASI_PST32_S | |
| 588 .end | |
| 589 | |
| 590 !-------------------------------------------------------------------- | |
| 591 ! Short store instructions | |
| 592 ! | |
| 593 ! vis_stdfa_ASI_FL8P(double frd, void *rs1) | |
| 594 ! | |
| 595 .inline vis_stdfa_ASI_FL8P,16 | |
| 596 stda %f0,[%o1]0xd0 ! ASI_FL8_P | |
| 597 .end | |
| 598 ! | |
| 599 ! vis_stdfa_ASI_FL8P_index(double frd, void *rs1, long index) | |
| 600 ! | |
| 601 .inline vis_stdfa_ASI_FL8P_index,24 | |
| 602 stda %f0,[%o1+%o2]0xd0 ! ASI_FL8_P | |
| 603 .end | |
| 604 ! | |
| 605 ! vis_stdfa_ASI_FL8S(double frd, void *rs1) | |
| 606 ! | |
| 607 .inline vis_stdfa_ASI_FL8S,16 | |
| 608 stda %f0,[%o1]0xd1 ! ASI_FL8_S | |
| 609 .end | |
| 610 ! | |
| 611 ! vis_stdfa_ASI_FL16P(double frd, void *rs1) | |
| 612 ! | |
| 613 .inline vis_stdfa_ASI_FL16P,16 | |
| 614 stda %f0,[%o1]0xd2 ! ASI_FL16_P | |
| 615 .end | |
| 616 ! | |
| 617 ! vis_stdfa_ASI_FL16P_index(double frd, void *rs1, long index) | |
| 618 ! | |
| 619 .inline vis_stdfa_ASI_FL16P_index,24 | |
| 620 stda %f0,[%o1+%o2]0xd2 ! ASI_FL16_P | |
| 621 .end | |
| 622 ! | |
| 623 ! vis_stdfa_ASI_FL16S(double frd, void *rs1) | |
| 624 ! | |
| 625 .inline vis_stdfa_ASI_FL16S,16 | |
| 626 stda %f0,[%o1]0xd3 ! ASI_FL16_S | |
| 627 .end | |
| 628 ! | |
| 629 ! vis_stdfa_ASI_FL8PL(double frd, void *rs1) | |
| 630 ! | |
| 631 .inline vis_stdfa_ASI_FL8PL,16 | |
| 632 stda %f0,[%o1]0xd8 ! ASI_FL8_PL | |
| 633 .end | |
| 634 ! | |
| 635 ! vis_stdfa_ASI_FL8SL(double frd, void *rs1) | |
| 636 ! | |
| 637 .inline vis_stdfa_ASI_FL8SL,16 | |
| 638 stda %f0,[%o1]0xd9 ! ASI_FL8_SL | |
| 639 .end | |
| 640 ! | |
| 641 ! vis_stdfa_ASI_FL16PL(double frd, void *rs1) | |
| 642 ! | |
| 643 .inline vis_stdfa_ASI_FL16PL,16 | |
| 644 stda %f0,[%o1]0xda ! ASI_FL16_PL | |
| 645 .end | |
| 646 ! | |
| 647 ! vis_stdfa_ASI_FL16SL(double frd, void *rs1) | |
| 648 ! | |
| 649 .inline vis_stdfa_ASI_FL16SL,16 | |
| 650 stda %f0,[%o1]0xdb ! ASI_FL16_SL | |
| 651 .end | |
| 652 | |
| 653 !-------------------------------------------------------------------- | |
| 654 ! Short load instructions | |
| 655 ! | |
| 656 ! double vis_lddfa_ASI_FL8P(void *rs1) | |
| 657 ! | |
| 658 .inline vis_lddfa_ASI_FL8P,8 | |
| 659 ldda [%o0]0xd0,%f4 ! ASI_FL8_P | |
| 660 fmovd %f4,%f0 ! Compiler can clean this up | |
| 661 .end | |
| 662 ! | |
| 663 ! double vis_lddfa_ASI_FL8P_index(void *rs1, long index) | |
| 664 ! | |
| 665 .inline vis_lddfa_ASI_FL8P_index,16 | |
| 666 ldda [%o0+%o1]0xd0,%f4 | |
| 667 fmovd %f4,%f0 | |
| 668 .end | |
| 669 ! | |
| 670 ! double vis_lddfa_ASI_FL8P_hi(void *rs1, unsigned int index) | |
| 671 ! | |
| 672 .inline vis_lddfa_ASI_FL8P_hi,12 | |
| 673 sra %o1,16,%o1 | |
| 674 ldda [%o0+%o1]0xd0,%f4 | |
| 675 fmovd %f4,%f0 | |
| 676 .end | |
| 677 ! | |
| 678 ! double vis_lddfa_ASI_FL8P_lo(void *rs1, unsigned int index) | |
| 679 ! | |
| 680 .inline vis_lddfa_ASI_FL8P_lo,12 | |
| 681 sll %o1,16,%o1 | |
| 682 sra %o1,16,%o1 | |
| 683 ldda [%o0+%o1]0xd0,%f4 | |
| 684 fmovd %f4,%f0 | |
| 685 .end | |
| 686 ! | |
| 687 ! double vis_lddfa_ASI_FL8S(void *rs1) | |
| 688 ! | |
| 689 .inline vis_lddfa_ASI_FL8S,8 | |
| 690 ldda [%o0]0xd1,%f4 ! ASI_FL8_S | |
| 691 fmovd %f4,%f0 | |
| 692 .end | |
| 693 ! | |
| 694 ! double vis_lddfa_ASI_FL16P(void *rs1) | |
| 695 ! | |
| 696 .inline vis_lddfa_ASI_FL16P,8 | |
| 697 ldda [%o0]0xd2,%f4 ! ASI_FL16_P | |
| 698 fmovd %f4,%f0 | |
| 699 .end | |
| 700 ! | |
| 701 ! double vis_lddfa_ASI_FL16P_index(void *rs1, long index) | |
| 702 ! | |
| 703 .inline vis_lddfa_ASI_FL16P_index,16 | |
| 704 ldda [%o0+%o1]0xd2,%f4 ! ASI_FL16_P | |
| 705 fmovd %f4,%f0 | |
| 706 .end | |
| 707 ! | |
| 708 ! double vis_lddfa_ASI_FL16S(void *rs1) | |
| 709 ! | |
| 710 .inline vis_lddfa_ASI_FL16S,8 | |
| 711 ldda [%o0]0xd3,%f4 ! ASI_FL16_S | |
| 712 fmovd %f4,%f0 | |
| 713 .end | |
| 714 ! | |
| 715 ! double vis_lddfa_ASI_FL8PL(void *rs1) | |
| 716 ! | |
| 717 .inline vis_lddfa_ASI_FL8PL,8 | |
| 718 ldda [%o0]0xd8,%f4 ! ASI_FL8_PL | |
| 719 fmovd %f4,%f0 | |
| 720 .end | |
| 721 ! | |
| 722 ! double vis_lddfa_ASI_FL8PL_index(void *rs1, long index) | |
| 723 ! | |
| 724 .inline vis_lddfa_ASI_FL8PL_index,16 | |
| 725 ldda [%o0+%o1]0xd8,%f4 ! ASI_FL8_PL | |
| 726 fmovd %f4,%f0 | |
| 727 .end | |
| 728 ! | |
| 729 ! double vis_lddfa_ASI_FL8SL(void *rs1) | |
| 730 ! | |
| 731 .inline vis_lddfa_ASI_FL8SL,8 | |
| 732 ldda [%o0]0xd9,%f4 ! ASI_FL8_SL | |
| 733 fmovd %f4,%f0 | |
| 734 .end | |
| 735 ! | |
| 736 ! double vis_lddfa_ASI_FL16PL(void *rs1) | |
| 737 ! | |
| 738 .inline vis_lddfa_ASI_FL16PL,8 | |
| 739 ldda [%o0]0xda,%f4 ! ASI_FL16_PL | |
| 740 fmovd %f4,%f0 | |
| 741 .end | |
| 742 ! | |
| 743 ! double vis_lddfa_ASI_FL16PL_index(void *rs1, long index) | |
| 744 ! | |
| 745 .inline vis_lddfa_ASI_FL16PL_index,16 | |
| 746 ldda [%o0+%o1]0xda,%f4 ! ASI_FL16_PL | |
| 747 fmovd %f4,%f0 | |
| 748 .end | |
| 749 ! | |
| 750 ! double vis_lddfa_ASI_FL16SL(void *rs1) | |
| 751 ! | |
| 752 .inline vis_lddfa_ASI_FL16SL,8 | |
| 753 ldda [%o0]0xdb,%f4 ! ASI_FL16_SL | |
| 754 fmovd %f4,%f0 | |
| 755 .end | |
| 756 | |
| 757 !-------------------------------------------------------------------- | |
| 758 ! Graphics status register | |
| 759 ! | |
| 760 ! unsigned int vis_read_gsr(void) | |
| 761 ! | |
| 762 .inline vis_read_gsr,0 | |
| 763 rd %gsr,%o0 | |
| 764 .end | |
| 765 ! | |
| 766 ! void vis_write_gsr(unsigned int /* GSR */) | |
| 767 ! | |
| 768 .inline vis_write_gsr,4 | |
| 769 wr %g0,%o0,%gsr | |
| 770 .end | |
| 771 | |
| 772 !-------------------------------------------------------------------- | |
| 773 ! Voxel texture mapping | |
| 774 ! | |
| 775 ! unsigned long vis_array8(unsigned long long /*rs1 */, int /*rs2*/) | |
| 776 ! | |
| 777 .inline vis_array8,12 | |
| 778 array8 %o0,%o1,%o0 | |
| 779 .end | |
| 780 ! | |
| 781 ! unsigned long vis_array16(unsigned long long /*rs1*/, int /*rs2*/) | |
| 782 ! | |
| 783 .inline vis_array16,12 | |
| 784 array16 %o0,%o1,%o0 | |
| 785 .end | |
| 786 ! | |
| 787 ! unsigned long vis_array32(unsigned long long /*rs1*/, int /*rs2*/) | |
| 788 ! | |
| 789 .inline vis_array32,12 | |
| 790 array32 %o0,%o1,%o0 | |
| 791 .end | |
| 792 | |
| 793 !-------------------------------------------------------------------- | |
| 794 ! Register aliasing and type casts | |
| 795 ! | |
| 796 ! float vis_read_hi(double /* frs1 */); | |
| 797 ! | |
| 798 .inline vis_read_hi,8 | |
| 799 fmovs %f0,%f0 | |
| 800 .end | |
| 801 ! | |
| 802 ! float vis_read_lo(double /* frs1 */); | |
| 803 ! | |
| 804 .inline vis_read_lo,8 | |
| 805 fmovs %f1,%f0 ! %f0 = low word (frs1); return %f0; | |
| 806 .end | |
| 807 ! | |
| 808 ! double vis_write_hi(double /* frs1 */, float /* frs2 */); | |
| 809 ! | |
| 810 .inline vis_write_hi,12 | |
| 811 fmovs %f3,%f0 ! %f3 = float frs2; return %f0:f1; | |
| 812 .end | |
| 813 ! | |
| 814 ! double vis_write_lo(double /* frs1 */, float /* frs2 */); | |
| 815 ! | |
| 816 .inline vis_write_lo,12 | |
| 817 fmovs %f3,%f1 ! %f3 = float frs2; return %f0:f1; | |
| 818 .end | |
| 819 ! | |
| 820 ! double vis_freg_pair(float /* frs1 */, float /* frs2 */); | |
| 821 ! | |
| 822 .inline vis_freg_pair,8 | |
| 823 fmovs %f1,%f0 ! %f1 = float frs1; put in hi; | |
| 824 fmovs %f3,%f1 ! %f3 = float frs2; put in lo; return %f0:f1; | |
| 825 .end | |
| 826 ! | |
| 827 ! float vis_to_float(unsigned int /*value*/); | |
| 828 ! | |
| 829 .inline vis_to_float,4 | |
| 830 st %o0,[%sp+2183] | |
| 831 ld [%sp+2183],%f0 | |
| 832 .end | |
| 833 ! | |
| 834 ! double vis_to_double(unsigned int /*value1*/, unsigned int /*value2*/); | |
| 835 ! | |
| 836 .inline vis_to_double,8 | |
| 837 st %o0,[%sp+2183] | |
| 838 ld [%sp+2183],%f0 | |
| 839 st %o1,[%sp+2183] | |
| 840 ld [%sp+2183],%f1 | |
| 841 .end | |
| 842 ! | |
| 843 ! double vis_to_double_dup(unsigned int /*value*/); | |
| 844 ! | |
| 845 .inline vis_to_double_dup,4 | |
| 846 st %o0,[%sp+2183] | |
| 847 ld [%sp+2183],%f1 | |
| 848 fmovs %f1,%f0 ! duplicate value | |
| 849 .end | |
| 850 ! | |
| 851 ! double vis_ll_to_double(unsigned long long /*value*/); | |
| 852 ! | |
| 853 .inline vis_ll_to_double,8 | |
| 854 stx %o0,[%sp+2183] | |
| 855 ldd [%sp+2183],%f0 | |
| 856 .end | |
| 857 | |
| 858 !-------------------------------------------------------------------- | |
| 859 ! Address space identifier (ASI) register | |
| 860 ! | |
| 861 ! unsigned int vis_read_asi(void) | |
| 862 ! | |
| 863 .inline vis_read_asi,0 | |
| 864 rd %asi,%o0 | |
| 865 .end | |
| 866 ! | |
| 867 ! void vis_write_asi(unsigned int /* ASI */) | |
| 868 ! | |
| 869 .inline vis_write_asi,4 | |
| 870 wr %g0,%o0,%asi | |
| 871 .end | |
| 872 | |
| 873 !-------------------------------------------------------------------- | |
| 874 ! Load/store from/into alternate space | |
| 875 ! | |
| 876 ! float vis_ldfa_ASI_REG(void *rs1) | |
| 877 ! | |
| 878 .inline vis_ldfa_ASI_REG,8 | |
| 879 lda [%o0+0]%asi,%f4 | |
| 880 fmovs %f4,%f0 ! Compiler can clean this up | |
| 881 .end | |
| 882 ! | |
| 883 ! float vis_ldfa_ASI_P(void *rs1) | |
| 884 ! | |
| 885 .inline vis_ldfa_ASI_P,8 | |
| 886 lda [%o0]0x80,%f4 ! ASI_P | |
| 887 fmovs %f4,%f0 ! Compiler can clean this up | |
| 888 .end | |
| 889 ! | |
| 890 ! float vis_ldfa_ASI_PL(void *rs1) | |
| 891 ! | |
| 892 .inline vis_ldfa_ASI_PL,8 | |
| 893 lda [%o0]0x88,%f4 ! ASI_PL | |
| 894 fmovs %f4,%f0 ! Compiler can clean this up | |
| 895 .end | |
| 896 ! | |
| 897 ! double vis_lddfa_ASI_REG(void *rs1) | |
| 898 ! | |
| 899 .inline vis_lddfa_ASI_REG,8 | |
| 900 ldda [%o0+0]%asi,%f4 | |
| 901 fmovd %f4,%f0 ! Compiler can clean this up | |
| 902 .end | |
| 903 ! | |
| 904 ! double vis_lddfa_ASI_P(void *rs1) | |
| 905 ! | |
| 906 .inline vis_lddfa_ASI_P,8 | |
| 907 ldda [%o0]0x80,%f4 ! ASI_P | |
| 908 fmovd %f4,%f0 ! Compiler can clean this up | |
| 909 .end | |
| 910 ! | |
| 911 ! double vis_lddfa_ASI_PL(void *rs1) | |
| 912 ! | |
| 913 .inline vis_lddfa_ASI_PL,8 | |
| 914 ldda [%o0]0x88,%f4 ! ASI_PL | |
| 915 fmovd %f4,%f0 ! Compiler can clean this up | |
| 916 .end | |
| 917 ! | |
| 918 ! vis_stfa_ASI_REG(float frs, void *rs1) | |
| 919 ! | |
| 920 .inline vis_stfa_ASI_REG,12 | |
| 921 sta %f1,[%o1+0]%asi | |
| 922 .end | |
| 923 ! | |
| 924 ! vis_stfa_ASI_P(float frs, void *rs1) | |
| 925 ! | |
| 926 .inline vis_stfa_ASI_P,12 | |
| 927 sta %f1,[%o1]0x80 ! ASI_P | |
| 928 .end | |
| 929 ! | |
| 930 ! vis_stfa_ASI_PL(float frs, void *rs1) | |
| 931 ! | |
| 932 .inline vis_stfa_ASI_PL,12 | |
| 933 sta %f1,[%o1]0x88 ! ASI_PL | |
| 934 .end | |
| 935 ! | |
| 936 ! vis_stdfa_ASI_REG(double frd, void *rs1) | |
| 937 ! | |
| 938 .inline vis_stdfa_ASI_REG,16 | |
| 939 stda %f0,[%o1+0]%asi | |
| 940 .end | |
| 941 ! | |
| 942 ! vis_stdfa_ASI_P(double frd, void *rs1) | |
| 943 ! | |
| 944 .inline vis_stdfa_ASI_P,16 | |
| 945 stda %f0,[%o1]0x80 ! ASI_P | |
| 946 .end | |
| 947 ! | |
| 948 ! vis_stdfa_ASI_PL(double frd, void *rs1) | |
| 949 ! | |
| 950 .inline vis_stdfa_ASI_PL,16 | |
| 951 stda %f0,[%o1]0x88 ! ASI_PL | |
| 952 .end | |
| 953 ! | |
| 954 ! unsigned short vis_lduha_ASI_REG(void *rs1) | |
| 955 ! | |
| 956 .inline vis_lduha_ASI_REG,8 | |
| 957 lduha [%o0+0]%asi,%o0 | |
| 958 .end | |
| 959 ! | |
| 960 ! unsigned short vis_lduha_ASI_P(void *rs1) | |
| 961 ! | |
| 962 .inline vis_lduha_ASI_P,8 | |
| 963 lduha [%o0]0x80,%o0 ! ASI_P | |
| 964 .end | |
| 965 ! | |
| 966 ! unsigned short vis_lduha_ASI_PL(void *rs1) | |
| 967 ! | |
| 968 .inline vis_lduha_ASI_PL,8 | |
| 969 lduha [%o0]0x88,%o0 ! ASI_PL | |
| 970 .end | |
| 971 ! | |
| 972 ! unsigned short vis_lduha_ASI_P_index(void *rs1, long index) | |
| 973 ! | |
| 974 .inline vis_lduha_ASI_P_index,16 | |
| 975 lduha [%o0+%o1]0x80,%o0 ! ASI_P | |
| 976 .end | |
| 977 ! | |
| 978 ! unsigned short vis_lduha_ASI_PL_index(void *rs1, long index) | |
| 979 ! | |
| 980 .inline vis_lduha_ASI_PL_index,16 | |
| 981 lduha [%o0+%o1]0x88,%o0 ! ASI_PL | |
| 982 .end | |
| 983 | |
| 984 !-------------------------------------------------------------------- | |
| 985 ! Prefetch | |
| 986 ! | |
| 987 ! void vis_prefetch_read(void * /*address*/); | |
| 988 ! | |
| 989 .inline vis_prefetch_read,8 | |
| 990 prefetch [%o0+0],0 | |
| 991 .end | |
| 992 ! | |
| 993 ! void vis_prefetch_write(void * /*address*/); | |
| 994 ! | |
| 995 .inline vis_prefetch_write,8 | |
| 996 prefetch [%o0+0],2 | |
| 997 .end |
