1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/hal/gonk/tavarua.h Wed Dec 31 06:09:35 2014 +0100
1.3 @@ -0,0 +1,484 @@
1.4 +#ifndef __LINUX_TAVARUA_H
1.5 +#define __LINUX_TAVARUA_H
1.6 +
1.7 +/* This is a Linux header generated by "make headers_install" */
1.8 +
1.9 +#include <stdint.h>
1.10 +#include <linux/ioctl.h>
1.11 +#include <linux/videodev2.h>
1.12 +
1.13 +
1.14 +#undef FM_DEBUG
1.15 +
1.16 +/* constants */
1.17 +#define RDS_BLOCKS_NUM (4)
1.18 +#define BYTES_PER_BLOCK (3)
1.19 +#define MAX_PS_LENGTH (96)
1.20 +#define MAX_RT_LENGTH (64)
1.21 +
1.22 +#define XFRDAT0 (0x20)
1.23 +#define XFRDAT1 (0x21)
1.24 +#define XFRDAT2 (0x22)
1.25 +
1.26 +#define INTDET_PEEK_MSB (0x88)
1.27 +#define INTDET_PEEK_LSB (0x26)
1.28 +
1.29 +#define RMSSI_PEEK_MSB (0x88)
1.30 +#define RMSSI_PEEK_LSB (0xA8)
1.31 +
1.32 +#define MPX_DCC_BYPASS_POKE_MSB (0x88)
1.33 +#define MPX_DCC_BYPASS_POKE_LSB (0xC0)
1.34 +
1.35 +#define MPX_DCC_PEEK_MSB_REG1 (0x88)
1.36 +#define MPX_DCC_PEEK_LSB_REG1 (0xC2)
1.37 +
1.38 +#define MPX_DCC_PEEK_MSB_REG2 (0x88)
1.39 +#define MPX_DCC_PEEK_LSB_REG2 (0xC3)
1.40 +
1.41 +#define MPX_DCC_PEEK_MSB_REG3 (0x88)
1.42 +#define MPX_DCC_PEEK_LSB_REG3 (0xC4)
1.43 +
1.44 +#define ON_CHANNEL_TH_MSB (0x0B)
1.45 +#define ON_CHANNEL_TH_LSB (0xA8)
1.46 +
1.47 +#define OFF_CHANNEL_TH_MSB (0x0B)
1.48 +#define OFF_CHANNEL_TH_LSB (0xAC)
1.49 +
1.50 +#define ENF_200Khz (1)
1.51 +#define SRCH200KHZ_OFFSET (7)
1.52 +#define SRCH_MASK (1 << SRCH200KHZ_OFFSET)
1.53 +
1.54 +/* Standard buffer size */
1.55 +#define STD_BUF_SIZE (128)
1.56 +/* Search direction */
1.57 +#define SRCH_DIR_UP (0)
1.58 +#define SRCH_DIR_DOWN (1)
1.59 +
1.60 +/* control options */
1.61 +#define CTRL_ON (1)
1.62 +#define CTRL_OFF (0)
1.63 +
1.64 +#define US_LOW_BAND (87.5)
1.65 +#define US_HIGH_BAND (108)
1.66 +
1.67 +/* constant for Tx */
1.68 +
1.69 +#define MASK_PI (0x0000FFFF)
1.70 +#define MASK_PI_MSB (0x0000FF00)
1.71 +#define MASK_PI_LSB (0x000000FF)
1.72 +#define MASK_PTY (0x0000001F)
1.73 +#define MASK_TXREPCOUNT (0x0000000F)
1.74 +
1.75 +#undef FMDBG
1.76 +#ifdef FM_DEBUG
1.77 + #define FMDBG(fmt, args...) printk(KERN_INFO "tavarua_radio: " fmt, ##args)
1.78 +#else
1.79 + #define FMDBG(fmt, args...)
1.80 +#endif
1.81 +
1.82 +#undef FMDERR
1.83 +#define FMDERR(fmt, args...) printk(KERN_INFO "tavarua_radio: " fmt, ##args)
1.84 +
1.85 +#undef FMDBG_I2C
1.86 +#ifdef FM_DEBUG_I2C
1.87 + #define FMDBG_I2C(fmt, args...) printk(KERN_INFO "fm_i2c: " fmt, ##args)
1.88 +#else
1.89 + #define FMDBG_I2C(fmt, args...)
1.90 +#endif
1.91 +
1.92 +/* function declarations */
1.93 +/* FM Core audio paths. */
1.94 +#define TAVARUA_AUDIO_OUT_ANALOG_OFF (0)
1.95 +#define TAVARUA_AUDIO_OUT_ANALOG_ON (1)
1.96 +#define TAVARUA_AUDIO_OUT_DIGITAL_OFF (0)
1.97 +#define TAVARUA_AUDIO_OUT_DIGITAL_ON (1)
1.98 +
1.99 +int tavarua_set_audio_path(int digital_on, int analog_on);
1.100 +
1.101 +/* defines and enums*/
1.102 +
1.103 +#define MARIMBA_A0 0x01010013
1.104 +#define MARIMBA_2_1 0x02010204
1.105 +#define BAHAMA_1_0 0x0302010A
1.106 +#define BAHAMA_2_0 0x04020205
1.107 +#define WAIT_TIMEOUT 2000
1.108 +#define RADIO_INIT_TIME 15
1.109 +#define TAVARUA_DELAY 10
1.110 +/*
1.111 + * The frequency is set in units of 62.5 Hz when using V4L2_TUNER_CAP_LOW,
1.112 + * 62.5 kHz otherwise.
1.113 + * The tuner is able to have a channel spacing of 50, 100 or 200 kHz.
1.114 + * tuner->capability is therefore set to V4L2_TUNER_CAP_LOW
1.115 + * The FREQ_MUL is then: 1 MHz / 62.5 Hz = 16000
1.116 + */
1.117 +#define FREQ_MUL (1000000 / 62.5)
1.118 +
1.119 +enum v4l2_cid_private_tavarua_t {
1.120 + V4L2_CID_PRIVATE_TAVARUA_SRCHMODE = (V4L2_CID_PRIVATE_BASE + 1),
1.121 + V4L2_CID_PRIVATE_TAVARUA_SCANDWELL,
1.122 + V4L2_CID_PRIVATE_TAVARUA_SRCHON,
1.123 + V4L2_CID_PRIVATE_TAVARUA_STATE,
1.124 + V4L2_CID_PRIVATE_TAVARUA_TRANSMIT_MODE,
1.125 + V4L2_CID_PRIVATE_TAVARUA_RDSGROUP_MASK,
1.126 + V4L2_CID_PRIVATE_TAVARUA_REGION,
1.127 + V4L2_CID_PRIVATE_TAVARUA_SIGNAL_TH,
1.128 + V4L2_CID_PRIVATE_TAVARUA_SRCH_PTY,
1.129 + V4L2_CID_PRIVATE_TAVARUA_SRCH_PI,
1.130 + V4L2_CID_PRIVATE_TAVARUA_SRCH_CNT,
1.131 + V4L2_CID_PRIVATE_TAVARUA_EMPHASIS,
1.132 + V4L2_CID_PRIVATE_TAVARUA_RDS_STD,
1.133 + V4L2_CID_PRIVATE_TAVARUA_SPACING,
1.134 + V4L2_CID_PRIVATE_TAVARUA_RDSON,
1.135 + V4L2_CID_PRIVATE_TAVARUA_RDSGROUP_PROC,
1.136 + V4L2_CID_PRIVATE_TAVARUA_LP_MODE,
1.137 + V4L2_CID_PRIVATE_TAVARUA_ANTENNA,
1.138 + V4L2_CID_PRIVATE_TAVARUA_RDSD_BUF,
1.139 + V4L2_CID_PRIVATE_TAVARUA_PSALL,
1.140 + /*v4l2 Tx controls*/
1.141 + V4L2_CID_PRIVATE_TAVARUA_TX_SETPSREPEATCOUNT,
1.142 + V4L2_CID_PRIVATE_TAVARUA_STOP_RDS_TX_PS_NAME,
1.143 + V4L2_CID_PRIVATE_TAVARUA_STOP_RDS_TX_RT,
1.144 + V4L2_CID_PRIVATE_TAVARUA_IOVERC,
1.145 + V4L2_CID_PRIVATE_TAVARUA_INTDET,
1.146 + V4L2_CID_PRIVATE_TAVARUA_MPX_DCC,
1.147 + V4L2_CID_PRIVATE_TAVARUA_AF_JUMP,
1.148 + V4L2_CID_PRIVATE_TAVARUA_RSSI_DELTA,
1.149 + V4L2_CID_PRIVATE_TAVARUA_HLSI,
1.150 +
1.151 + /*
1.152 + * Here we have IOCTl's that are specific to IRIS
1.153 + * (V4L2_CID_PRIVATE_BASE + 0x1E to V4L2_CID_PRIVATE_BASE + 0x28)
1.154 + */
1.155 + V4L2_CID_PRIVATE_SOFT_MUTE,/* 0x800001E*/
1.156 + V4L2_CID_PRIVATE_RIVA_ACCS_ADDR,
1.157 + V4L2_CID_PRIVATE_RIVA_ACCS_LEN,
1.158 + V4L2_CID_PRIVATE_RIVA_PEEK,
1.159 + V4L2_CID_PRIVATE_RIVA_POKE,
1.160 + V4L2_CID_PRIVATE_SSBI_ACCS_ADDR,
1.161 + V4L2_CID_PRIVATE_SSBI_PEEK,
1.162 + V4L2_CID_PRIVATE_SSBI_POKE,
1.163 + V4L2_CID_PRIVATE_TX_TONE,
1.164 + V4L2_CID_PRIVATE_RDS_GRP_COUNTERS,
1.165 + V4L2_CID_PRIVATE_SET_NOTCH_FILTER,/* 0x8000028 */
1.166 +
1.167 + V4L2_CID_PRIVATE_TAVARUA_SET_AUDIO_PATH,/* 0x8000029 */
1.168 + V4L2_CID_PRIVATE_TAVARUA_DO_CALIBRATION,/* 0x800002A : IRIS */
1.169 + V4L2_CID_PRIVATE_TAVARUA_SRCH_ALGORITHM,/* 0x800002B */
1.170 + V4L2_CID_PRIVATE_IRIS_GET_SINR, /* 0x800002C : IRIS */
1.171 + V4L2_CID_PRIVATE_INTF_LOW_THRESHOLD, /* 0x800002D */
1.172 + V4L2_CID_PRIVATE_INTF_HIGH_THRESHOLD, /* 0x800002E */
1.173 + V4L2_CID_PRIVATE_SINR_THRESHOLD, /* 0x800002F : IRIS */
1.174 + V4L2_CID_PRIVATE_SINR_SAMPLES, /* 0x8000030 : IRIS */
1.175 +
1.176 +};
1.177 +
1.178 +enum tavarua_buf_t {
1.179 + TAVARUA_BUF_SRCH_LIST,
1.180 + TAVARUA_BUF_EVENTS,
1.181 + TAVARUA_BUF_RT_RDS,
1.182 + TAVARUA_BUF_PS_RDS,
1.183 + TAVARUA_BUF_RAW_RDS,
1.184 + TAVARUA_BUF_AF_LIST,
1.185 + TAVARUA_BUF_MAX
1.186 +};
1.187 +
1.188 +enum tavarua_xfr_t {
1.189 + TAVARUA_XFR_SYNC,
1.190 + TAVARUA_XFR_ERROR,
1.191 + TAVARUA_XFR_SRCH_LIST,
1.192 + TAVARUA_XFR_RT_RDS,
1.193 + TAVARUA_XFR_PS_RDS,
1.194 + TAVARUA_XFR_AF_LIST,
1.195 + TAVARUA_XFR_MAX
1.196 +};
1.197 +
1.198 +enum channel_spacing {
1.199 + FM_CH_SPACE_200KHZ,
1.200 + FM_CH_SPACE_100KHZ,
1.201 + FM_CH_SPACE_50KHZ
1.202 +};
1.203 +
1.204 +enum step_size {
1.205 + NO_SRCH200khz,
1.206 + ENF_SRCH200khz
1.207 +};
1.208 +
1.209 +enum emphasis {
1.210 + EMP_75,
1.211 + EMP_50
1.212 +};
1.213 +
1.214 +enum rds_std {
1.215 + RBDS_STD,
1.216 + RDS_STD
1.217 +};
1.218 +
1.219 +/* offsets */
1.220 +#define RAW_RDS 0x0F
1.221 +#define RDS_BLOCK 3
1.222 +
1.223 +/* registers*/
1.224 +#define MARIMBA_XO_BUFF_CNTRL 0x07
1.225 +#define RADIO_REGISTERS 0x30
1.226 +#define XFR_REG_NUM 16
1.227 +#define STATUS_REG_NUM 3
1.228 +
1.229 +/* TX constants */
1.230 +#define HEADER_SIZE 4
1.231 +#define TX_ON 0x80
1.232 +#define TAVARUA_TX_RT RDS_RT_0
1.233 +#define TAVARUA_TX_PS RDS_PS_0
1.234 +
1.235 +enum register_t {
1.236 + STATUS_REG1 = 0,
1.237 + STATUS_REG2,
1.238 + STATUS_REG3,
1.239 + RDCTRL,
1.240 + FREQ,
1.241 + TUNECTRL,
1.242 + SRCHRDS1,
1.243 + SRCHRDS2,
1.244 + SRCHCTRL,
1.245 + IOCTRL,
1.246 + RDSCTRL,
1.247 + ADVCTRL,
1.248 + AUDIOCTRL,
1.249 + RMSSI,
1.250 + IOVERC,
1.251 + AUDIOIND = 0x1E,
1.252 + XFRCTRL,
1.253 + FM_CTL0 = 0xFF,
1.254 + LEAKAGE_CNTRL = 0xFE,
1.255 +};
1.256 +#define BAHAMA_RBIAS_CTL1 0x07
1.257 +#define BAHAMA_FM_MODE_REG 0xFD
1.258 +#define BAHAMA_FM_CTL1_REG 0xFE
1.259 +#define BAHAMA_FM_CTL0_REG 0xFF
1.260 +#define BAHAMA_FM_MODE_NORMAL 0x00
1.261 +#define BAHAMA_LDO_DREG_CTL0 0xF0
1.262 +#define BAHAMA_LDO_AREG_CTL0 0xF4
1.263 +
1.264 +/* Radio Control */
1.265 +#define RDCTRL_STATE_OFFSET 0
1.266 +#define RDCTRL_STATE_MASK (3 << RDCTRL_STATE_OFFSET)
1.267 +#define RDCTRL_BAND_OFFSET 2
1.268 +#define RDCTRL_BAND_MASK (1 << RDCTRL_BAND_OFFSET)
1.269 +#define RDCTRL_CHSPACE_OFFSET 3
1.270 +#define RDCTRL_CHSPACE_MASK (3 << RDCTRL_CHSPACE_OFFSET)
1.271 +#define RDCTRL_DEEMPHASIS_OFFSET 5
1.272 +#define RDCTRL_DEEMPHASIS_MASK (1 << RDCTRL_DEEMPHASIS_OFFSET)
1.273 +#define RDCTRL_HLSI_OFFSET 6
1.274 +#define RDCTRL_HLSI_MASK (3 << RDCTRL_HLSI_OFFSET)
1.275 +#define RDSAF_OFFSET 6
1.276 +#define RDSAF_MASK (1 << RDSAF_OFFSET)
1.277 +
1.278 +/* Tune Control */
1.279 +#define TUNE_STATION 0x01
1.280 +#define ADD_OFFSET (1 << 1)
1.281 +#define SIGSTATE (1 << 5)
1.282 +#define MOSTSTATE (1 << 6)
1.283 +#define RDSSYNC (1 << 7)
1.284 +/* Search Control */
1.285 +#define SRCH_MODE_OFFSET 0
1.286 +#define SRCH_MODE_MASK (7 << SRCH_MODE_OFFSET)
1.287 +#define SRCH_DIR_OFFSET 3
1.288 +#define SRCH_DIR_MASK (1 << SRCH_DIR_OFFSET)
1.289 +#define SRCH_DWELL_OFFSET 4
1.290 +#define SRCH_DWELL_MASK (7 << SRCH_DWELL_OFFSET)
1.291 +#define SRCH_STATE_OFFSET 7
1.292 +#define SRCH_STATE_MASK (1 << SRCH_STATE_OFFSET)
1.293 +
1.294 +/* I/O Control */
1.295 +#define IOC_HRD_MUTE 0x03
1.296 +#define IOC_SFT_MUTE (1 << 2)
1.297 +#define IOC_MON_STR (1 << 3)
1.298 +#define IOC_SIG_BLND (1 << 4)
1.299 +#define IOC_INTF_BLND (1 << 5)
1.300 +#define IOC_ANTENNA (1 << 6)
1.301 +#define IOC_ANTENNA_OFFSET 6
1.302 +#define IOC_ANTENNA_MASK (1 << IOC_ANTENNA_OFFSET)
1.303 +
1.304 +/* RDS Control */
1.305 +#define RDS_ON 0x01
1.306 +#define RDSCTRL_STANDARD_OFFSET 1
1.307 +#define RDSCTRL_STANDARD_MASK (1 << RDSCTRL_STANDARD_OFFSET)
1.308 +
1.309 +/* Advanced features controls */
1.310 +#define RDSRTEN (1 << 3)
1.311 +#define RDSPSEN (1 << 4)
1.312 +
1.313 +/* Audio path control */
1.314 +#define AUDIORX_ANALOG_OFFSET 0
1.315 +#define AUDIORX_ANALOG_MASK (1 << AUDIORX_ANALOG_OFFSET)
1.316 +#define AUDIORX_DIGITAL_OFFSET 1
1.317 +#define AUDIORX_DIGITAL_MASK (1 << AUDIORX_DIGITAL_OFFSET)
1.318 +#define AUDIOTX_OFFSET 2
1.319 +#define AUDIOTX_MASK (1 << AUDIOTX_OFFSET)
1.320 +#define I2SCTRL_OFFSET 3
1.321 +#define I2SCTRL_MASK (1 << I2SCTRL_OFFSET)
1.322 +
1.323 +/* Search options */
1.324 +enum search_t {
1.325 + SEEK,
1.326 + SCAN,
1.327 + SCAN_FOR_STRONG,
1.328 + SCAN_FOR_WEAK,
1.329 + RDS_SEEK_PTY,
1.330 + RDS_SCAN_PTY,
1.331 + RDS_SEEK_PI,
1.332 + RDS_AF_JUMP,
1.333 +};
1.334 +
1.335 +enum audio_path {
1.336 + FM_DIGITAL_PATH,
1.337 + FM_ANALOG_PATH
1.338 +};
1.339 +#define SRCH_MODE 0x07
1.340 +#define SRCH_DIR 0x08 /* 0-up 1-down */
1.341 +#define SCAN_DWELL 0x70
1.342 +#define SRCH_ON 0x80
1.343 +
1.344 +/* RDS CONFIG */
1.345 +#define RDS_CONFIG_PSALL 0x01
1.346 +
1.347 +#define FM_ENABLE 0x22
1.348 +#define SET_REG_FIELD(reg, val, offset, mask) \
1.349 + (reg = (reg & ~mask) | (((val) << offset) & mask))
1.350 +#define GET_REG_FIELD(reg, offset, mask) ((reg & mask) >> offset)
1.351 +#define RSH_DATA(val, offset) ((val) >> (offset))
1.352 +#define LSH_DATA(val, offset) ((val) << (offset))
1.353 +#define GET_ABS_VAL(val) ((val) & (0xFF))
1.354 +
1.355 +enum radio_state_t {
1.356 + FM_OFF,
1.357 + FM_RECV,
1.358 + FM_TRANS,
1.359 + FM_RESET,
1.360 +};
1.361 +
1.362 +#define XFRCTRL_WRITE (1 << 7)
1.363 +
1.364 +/* Interrupt status */
1.365 +
1.366 +/* interrupt register 1 */
1.367 +#define READY (1 << 0) /* Radio ready after powerup or reset */
1.368 +#define TUNE (1 << 1) /* Tune completed */
1.369 +#define SEARCH (1 << 2) /* Search completed (read FREQ) */
1.370 +#define SCANNEXT (1 << 3) /* Scanning for next station */
1.371 +#define SIGNAL (1 << 4) /* Signal indicator change (read SIGSTATE) */
1.372 +#define INTF (1 << 5) /* Interference cnt has fallen outside range */
1.373 +#define SYNC (1 << 6) /* RDS sync state change (read RDSSYNC) */
1.374 +#define AUDIO (1 << 7) /* Audio Control indicator (read AUDIOIND) */
1.375 +
1.376 +/* interrupt register 2 */
1.377 +#define RDSDAT (1 << 0) /* New unread RDS data group available */
1.378 +#define BLOCKB (1 << 1) /* Block-B match condition exists */
1.379 +#define PROGID (1 << 2) /* Block-A or Block-C matched stored PI value*/
1.380 +#define RDSPS (1 << 3) /* New RDS Program Service Table available */
1.381 +#define RDSRT (1 << 4) /* New RDS Radio Text available */
1.382 +#define RDSAF (1 << 5) /* New RDS AF List available */
1.383 +#define TXRDSDAT (1 << 6) /* Transmitted an RDS group */
1.384 +#define TXRDSDONE (1 << 7) /* RDS raw group one-shot transmit completed */
1.385 +
1.386 +/* interrupt register 3 */
1.387 +#define TRANSFER (1 << 0) /* Data transfer (XFR) completed */
1.388 +#define RDSPROC (1 << 1) /* Dynamic RDS Processing complete */
1.389 +#define ERROR (1 << 7) /* Err occurred.Read code to determine cause */
1.390 +
1.391 +
1.392 +#define FM_TX_PWR_LVL_0 0 /* Lowest power lvl that can be set for Tx */
1.393 +#define FM_TX_PWR_LVL_MAX 7 /* Max power lvl for Tx */
1.394 +/* Transfer */
1.395 +enum tavarua_xfr_ctrl_t {
1.396 + RDS_PS_0 = 0x01,
1.397 + RDS_PS_1,
1.398 + RDS_PS_2,
1.399 + RDS_PS_3,
1.400 + RDS_PS_4,
1.401 + RDS_PS_5,
1.402 + RDS_PS_6,
1.403 + RDS_RT_0,
1.404 + RDS_RT_1,
1.405 + RDS_RT_2,
1.406 + RDS_RT_3,
1.407 + RDS_RT_4,
1.408 + RDS_AF_0,
1.409 + RDS_AF_1,
1.410 + RDS_CONFIG,
1.411 + RDS_TX_GROUPS,
1.412 + RDS_COUNT_0,
1.413 + RDS_COUNT_1,
1.414 + RDS_COUNT_2,
1.415 + RADIO_CONFIG,
1.416 + RX_CONFIG,
1.417 + RX_TIMERS,
1.418 + RX_STATIONS_0,
1.419 + RX_STATIONS_1,
1.420 + INT_CTRL,
1.421 + ERROR_CODE,
1.422 + CHIPID,
1.423 + CAL_DAT_0 = 0x20,
1.424 + CAL_DAT_1,
1.425 + CAL_DAT_2,
1.426 + CAL_DAT_3,
1.427 + CAL_CFG_0,
1.428 + CAL_CFG_1,
1.429 + DIG_INTF_0,
1.430 + DIG_INTF_1,
1.431 + DIG_AGC_0,
1.432 + DIG_AGC_1,
1.433 + DIG_AGC_2,
1.434 + DIG_AUDIO_0,
1.435 + DIG_AUDIO_1,
1.436 + DIG_AUDIO_2,
1.437 + DIG_AUDIO_3,
1.438 + DIG_AUDIO_4,
1.439 + DIG_RXRDS,
1.440 + DIG_DCC,
1.441 + DIG_SPUR,
1.442 + DIG_MPXDCC,
1.443 + DIG_PILOT,
1.444 + DIG_DEMOD,
1.445 + DIG_MOST,
1.446 + DIG_TX_0,
1.447 + DIG_TX_1,
1.448 + PHY_TXGAIN = 0x3B,
1.449 + PHY_CONFIG,
1.450 + PHY_TXBLOCK,
1.451 + PHY_TCB,
1.452 + XFR_PEEK_MODE = 0x40,
1.453 + XFR_POKE_MODE = 0xC0,
1.454 + TAVARUA_XFR_CTRL_MAX
1.455 +};
1.456 +
1.457 +enum tavarua_evt_t {
1.458 + TAVARUA_EVT_RADIO_READY,
1.459 + TAVARUA_EVT_TUNE_SUCC,
1.460 + TAVARUA_EVT_SEEK_COMPLETE,
1.461 + TAVARUA_EVT_SCAN_NEXT,
1.462 + TAVARUA_EVT_NEW_RAW_RDS,
1.463 + TAVARUA_EVT_NEW_RT_RDS,
1.464 + TAVARUA_EVT_NEW_PS_RDS,
1.465 + TAVARUA_EVT_ERROR,
1.466 + TAVARUA_EVT_BELOW_TH,
1.467 + TAVARUA_EVT_ABOVE_TH,
1.468 + TAVARUA_EVT_STEREO,
1.469 + TAVARUA_EVT_MONO,
1.470 + TAVARUA_EVT_RDS_AVAIL,
1.471 + TAVARUA_EVT_RDS_NOT_AVAIL,
1.472 + TAVARUA_EVT_NEW_SRCH_LIST,
1.473 + TAVARUA_EVT_NEW_AF_LIST,
1.474 + TAVARUA_EVT_TXRDSDAT,
1.475 + TAVARUA_EVT_TXRDSDONE,
1.476 + TAVARUA_EVT_RADIO_DISABLED
1.477 +};
1.478 +
1.479 +enum tavarua_region_t {
1.480 + TAVARUA_REGION_US,
1.481 + TAVARUA_REGION_EU,
1.482 + TAVARUA_REGION_JAPAN,
1.483 + TAVARUA_REGION_JAPAN_WIDE,
1.484 + TAVARUA_REGION_OTHER
1.485 +};
1.486 +
1.487 +#endif /* __LINUX_TAVARUA_H */
