1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/js/src/jit/mips/BaselineRegisters-mips.h Wed Dec 31 06:09:35 2014 +0100
1.3 @@ -0,0 +1,49 @@
1.4 +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
1.5 + * vim: set ts=8 sts=4 et sw=4 tw=99:
1.6 + * This Source Code Form is subject to the terms of the Mozilla Public
1.7 + * License, v. 2.0. If a copy of the MPL was not distributed with this
1.8 + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
1.9 +
1.10 +#ifndef jit_mips_BaselineRegisters_mips_h
1.11 +#define jit_mips_BaselineRegisters_mips_h
1.12 +
1.13 +#ifdef JS_ION
1.14 +
1.15 +#include "jit/IonMacroAssembler.h"
1.16 +
1.17 +namespace js {
1.18 +namespace jit {
1.19 +
1.20 +static MOZ_CONSTEXPR_VAR Register BaselineFrameReg = s5;
1.21 +static MOZ_CONSTEXPR_VAR Register BaselineStackReg = sp;
1.22 +
1.23 +static MOZ_CONSTEXPR_VAR ValueOperand R0(v1, v0);
1.24 +static MOZ_CONSTEXPR_VAR ValueOperand R1(s7, s6);
1.25 +static MOZ_CONSTEXPR_VAR ValueOperand R2(t7, t6);
1.26 +
1.27 +// BaselineTailCallReg and BaselineStubReg
1.28 +// These use registers that are not preserved across calls.
1.29 +static MOZ_CONSTEXPR_VAR Register BaselineTailCallReg = ra;
1.30 +static MOZ_CONSTEXPR_VAR Register BaselineStubReg = t5;
1.31 +
1.32 +static MOZ_CONSTEXPR_VAR Register ExtractTemp0 = InvalidReg;
1.33 +static MOZ_CONSTEXPR_VAR Register ExtractTemp1 = InvalidReg;
1.34 +
1.35 +// Register used internally by MacroAssemblerMIPS.
1.36 +static MOZ_CONSTEXPR_VAR Register BaselineSecondScratchReg = SecondScratchReg;
1.37 +
1.38 +// Note that BaselineTailCallReg is actually just the link register.
1.39 +// In MIPS code emission, we do not clobber BaselineTailCallReg since we keep
1.40 +// the return address for calls there.
1.41 +
1.42 +// FloatReg0 must be equal to ReturnFloatReg.
1.43 +static MOZ_CONSTEXPR_VAR FloatRegister FloatReg0 = f0;
1.44 +static MOZ_CONSTEXPR_VAR FloatRegister FloatReg1 = f2;
1.45 +
1.46 +} // namespace jit
1.47 +} // namespace js
1.48 +
1.49 +#endif // JS_ION
1.50 +
1.51 +#endif /* jit_mips_BaselineRegisters_mips_h */
1.52 +
