media/libjpeg/simd/jsimdcpu.asm

changeset 0
6474c204b198
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/media/libjpeg/simd/jsimdcpu.asm	Wed Dec 31 06:09:35 2014 +0100
     1.3 @@ -0,0 +1,105 @@
     1.4 +;
     1.5 +; jsimdcpu.asm - SIMD instruction support check
     1.6 +;
     1.7 +; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
     1.8 +;
     1.9 +; Based on
    1.10 +; x86 SIMD extension for IJG JPEG library
    1.11 +; Copyright (C) 1999-2006, MIYASAKA Masaru.
    1.12 +; For conditions of distribution and use, see copyright notice in jsimdext.inc
    1.13 +;
    1.14 +; This file should be assembled with NASM (Netwide Assembler),
    1.15 +; can *not* be assembled with Microsoft's MASM or any compatible
    1.16 +; assembler (including Borland's Turbo Assembler).
    1.17 +; NASM is available from http://nasm.sourceforge.net/ or
    1.18 +; http://sourceforge.net/project/showfiles.php?group_id=6208
    1.19 +;
    1.20 +; [TAB8]
    1.21 +
    1.22 +%include "jsimdext.inc"
    1.23 +
    1.24 +; --------------------------------------------------------------------------
    1.25 +	SECTION	SEG_TEXT
    1.26 +	BITS	32
    1.27 +;
    1.28 +; Check if the CPU supports SIMD instructions
    1.29 +;
    1.30 +; GLOBAL(unsigned int)
    1.31 +; jpeg_simd_cpu_support (void)
    1.32 +;
    1.33 +
    1.34 +	align	16
    1.35 +	global	EXTN(jpeg_simd_cpu_support)
    1.36 +
    1.37 +EXTN(jpeg_simd_cpu_support):
    1.38 +	push	ebx
    1.39 +;	push	ecx		; need not be preserved
    1.40 +;	push	edx		; need not be preserved
    1.41 +;	push	esi		; unused
    1.42 +	push	edi
    1.43 +
    1.44 +	xor	edi,edi			; simd support flag
    1.45 +
    1.46 +	pushfd
    1.47 +	pop	eax
    1.48 +	mov	edx,eax
    1.49 +	xor	eax, 1<<21		; flip ID bit in EFLAGS
    1.50 +	push	eax
    1.51 +	popfd
    1.52 +	pushfd
    1.53 +	pop	eax
    1.54 +	xor	eax,edx
    1.55 +	jz	short .return		; CPUID is not supported
    1.56 +
    1.57 +	; Check for MMX instruction support
    1.58 +	xor	eax,eax
    1.59 +	cpuid
    1.60 +	test	eax,eax
    1.61 +	jz	short .return
    1.62 +
    1.63 +	xor	eax,eax
    1.64 +	inc	eax
    1.65 +	cpuid
    1.66 +	mov	eax,edx			; eax = Standard feature flags
    1.67 +
    1.68 +	test	eax, 1<<23		; bit23:MMX
    1.69 +	jz	short .no_mmx
    1.70 +	or	edi, byte JSIMD_MMX
    1.71 +.no_mmx:
    1.72 +	test	eax, 1<<25		; bit25:SSE
    1.73 +	jz	short .no_sse
    1.74 +	or	edi, byte JSIMD_SSE
    1.75 +.no_sse:
    1.76 +	test	eax, 1<<26		; bit26:SSE2
    1.77 +	jz	short .no_sse2
    1.78 +	or	edi, byte JSIMD_SSE2
    1.79 +.no_sse2:
    1.80 +
    1.81 +	; Check for 3DNow! instruction support
    1.82 +	mov	eax, 0x80000000
    1.83 +	cpuid
    1.84 +	cmp	eax, 0x80000000
    1.85 +	jbe	short .return
    1.86 +
    1.87 +	mov	eax, 0x80000001
    1.88 +	cpuid
    1.89 +	mov	eax,edx			; eax = Extended feature flags
    1.90 +
    1.91 +	test	eax, 1<<31		; bit31:3DNow!(vendor independent)
    1.92 +	jz	short .no_3dnow
    1.93 +	or	edi, byte JSIMD_3DNOW
    1.94 +.no_3dnow:
    1.95 +
    1.96 +.return:
    1.97 +	mov	eax,edi
    1.98 +
    1.99 +	pop	edi
   1.100 +;	pop	esi		; unused
   1.101 +;	pop	edx		; need not be preserved
   1.102 +;	pop	ecx		; need not be preserved
   1.103 +	pop	ebx
   1.104 +	ret
   1.105 +
   1.106 +; For some reason, the OS X linker does not honor the request to align the
   1.107 +; segment unless we do this.
   1.108 +	align	16

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