1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/security/sandbox/chromium/base/cpu.cc Wed Dec 31 06:09:35 2014 +0100
1.3 @@ -0,0 +1,162 @@
1.4 +// Copyright (c) 2012 The Chromium Authors. All rights reserved.
1.5 +// Use of this source code is governed by a BSD-style license that can be
1.6 +// found in the LICENSE file.
1.7 +
1.8 +#include "base/cpu.h"
1.9 +
1.10 +#include <string.h>
1.11 +
1.12 +#include <algorithm>
1.13 +
1.14 +#include "build/build_config.h"
1.15 +
1.16 +#if defined(ARCH_CPU_X86_FAMILY)
1.17 +#if defined(_MSC_VER)
1.18 +#include <intrin.h>
1.19 +#endif
1.20 +#endif
1.21 +
1.22 +namespace base {
1.23 +
1.24 +CPU::CPU()
1.25 + : signature_(0),
1.26 + type_(0),
1.27 + family_(0),
1.28 + model_(0),
1.29 + stepping_(0),
1.30 + ext_model_(0),
1.31 + ext_family_(0),
1.32 + has_mmx_(false),
1.33 + has_sse_(false),
1.34 + has_sse2_(false),
1.35 + has_sse3_(false),
1.36 + has_ssse3_(false),
1.37 + has_sse41_(false),
1.38 + has_sse42_(false),
1.39 + has_non_stop_time_stamp_counter_(false),
1.40 + cpu_vendor_("unknown") {
1.41 + Initialize();
1.42 +}
1.43 +
1.44 +#if defined(ARCH_CPU_X86_FAMILY)
1.45 +#ifndef _MSC_VER
1.46 +
1.47 +#if defined(__pic__) && defined(__i386__)
1.48 +
1.49 +void __cpuid(int cpu_info[4], int info_type) {
1.50 + __asm__ volatile (
1.51 + "mov %%ebx, %%edi\n"
1.52 + "cpuid\n"
1.53 + "xchg %%edi, %%ebx\n"
1.54 + : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
1.55 + : "a"(info_type)
1.56 + );
1.57 +}
1.58 +
1.59 +void __cpuidex(int cpu_info[4], int info_type, int info_index) {
1.60 + __asm__ volatile (
1.61 + "mov %%ebx, %%edi\n"
1.62 + "cpuid\n"
1.63 + "xchg %%edi, %%ebx\n"
1.64 + : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
1.65 + : "a"(info_type), "c"(info_index)
1.66 + );
1.67 +}
1.68 +
1.69 +#else
1.70 +
1.71 +void __cpuid(int cpu_info[4], int info_type) {
1.72 + __asm__ volatile (
1.73 + "cpuid \n\t"
1.74 + : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
1.75 + : "a"(info_type)
1.76 + );
1.77 +}
1.78 +
1.79 +void __cpuidex(int cpu_info[4], int info_type, int info_index) {
1.80 + __asm__ volatile (
1.81 + "cpuid \n\t"
1.82 + : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
1.83 + : "a"(info_type), "c"(info_index)
1.84 + );
1.85 +}
1.86 +
1.87 +#endif
1.88 +#endif // _MSC_VER
1.89 +#endif // ARCH_CPU_X86_FAMILY
1.90 +
1.91 +void CPU::Initialize() {
1.92 +#if defined(ARCH_CPU_X86_FAMILY)
1.93 + int cpu_info[4] = {-1};
1.94 + char cpu_string[48];
1.95 +
1.96 + // __cpuid with an InfoType argument of 0 returns the number of
1.97 + // valid Ids in CPUInfo[0] and the CPU identification string in
1.98 + // the other three array elements. The CPU identification string is
1.99 + // not in linear order. The code below arranges the information
1.100 + // in a human readable form. The human readable order is CPUInfo[1] |
1.101 + // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
1.102 + // before using memcpy to copy these three array elements to cpu_string.
1.103 + __cpuid(cpu_info, 0);
1.104 + int num_ids = cpu_info[0];
1.105 + std::swap(cpu_info[2], cpu_info[3]);
1.106 + memcpy(cpu_string, &cpu_info[1], 3 * sizeof(cpu_info[1]));
1.107 + cpu_vendor_.assign(cpu_string, 3 * sizeof(cpu_info[1]));
1.108 +
1.109 + // Interpret CPU feature information.
1.110 + if (num_ids > 0) {
1.111 + __cpuid(cpu_info, 1);
1.112 + signature_ = cpu_info[0];
1.113 + stepping_ = cpu_info[0] & 0xf;
1.114 + model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0);
1.115 + family_ = (cpu_info[0] >> 8) & 0xf;
1.116 + type_ = (cpu_info[0] >> 12) & 0x3;
1.117 + ext_model_ = (cpu_info[0] >> 16) & 0xf;
1.118 + ext_family_ = (cpu_info[0] >> 20) & 0xff;
1.119 + has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
1.120 + has_sse_ = (cpu_info[3] & 0x02000000) != 0;
1.121 + has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
1.122 + has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
1.123 + has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
1.124 + has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
1.125 + has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
1.126 + has_avx_ = (cpu_info[2] & 0x10000000) != 0;
1.127 + }
1.128 +
1.129 + // Get the brand string of the cpu.
1.130 + __cpuid(cpu_info, 0x80000000);
1.131 + const int parameter_end = 0x80000004;
1.132 + int max_parameter = cpu_info[0];
1.133 +
1.134 + if (cpu_info[0] >= parameter_end) {
1.135 + char* cpu_string_ptr = cpu_string;
1.136 +
1.137 + for (int parameter = 0x80000002; parameter <= parameter_end &&
1.138 + cpu_string_ptr < &cpu_string[sizeof(cpu_string)]; parameter++) {
1.139 + __cpuid(cpu_info, parameter);
1.140 + memcpy(cpu_string_ptr, cpu_info, sizeof(cpu_info));
1.141 + cpu_string_ptr += sizeof(cpu_info);
1.142 + }
1.143 + cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string);
1.144 + }
1.145 +
1.146 + const int parameter_containing_non_stop_time_stamp_counter = 0x80000007;
1.147 + if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) {
1.148 + __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter);
1.149 + has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0;
1.150 + }
1.151 +#endif
1.152 +}
1.153 +
1.154 +CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const {
1.155 + if (has_avx()) return AVX;
1.156 + if (has_sse42()) return SSE42;
1.157 + if (has_sse41()) return SSE41;
1.158 + if (has_ssse3()) return SSSE3;
1.159 + if (has_sse3()) return SSE3;
1.160 + if (has_sse2()) return SSE2;
1.161 + if (has_sse()) return SSE;
1.162 + return PENTIUM;
1.163 +}
1.164 +
1.165 +} // namespace base
