1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/toolkit/crashreporter/google-breakpad/src/third_party/libdisasm/ia32_modrm.c Wed Dec 31 06:09:35 2014 +0100
1.3 @@ -0,0 +1,310 @@
1.4 +#include "ia32_modrm.h"
1.5 +#include "ia32_reg.h"
1.6 +#include "x86_imm.h"
1.7 +
1.8 +/* NOTE: when decoding ModR/M and SIB, we have to add 1 to all register
1.9 + * values obtained from decoding the ModR/M or SIB byte, since they
1.10 + * are encoded with eAX = 0 and the tables in ia32_reg.c use eAX = 1.
1.11 + * ADDENDUM: this is only the case when the register value is used
1.12 + * directly as an index into the register table, not when it is added to
1.13 + * a genregs offset. */
1.14 +
1.15 +/* -------------------------------- ModR/M, SIB */
1.16 +/* ModR/M flags */
1.17 +#define MODRM_RM_SIB 0x04 /* R/M == 100 */
1.18 +#define MODRM_RM_NOREG 0x05 /* R/B == 101 */
1.19 +
1.20 +/* if (MODRM.MOD_NODISP && MODRM.RM_NOREG) then just disp32 */
1.21 +#define MODRM_MOD_NODISP 0x00 /* mod == 00 */
1.22 +#define MODRM_MOD_DISP8 0x01 /* mod == 01 */
1.23 +#define MODRM_MOD_DISP32 0x02 /* mod == 10 */
1.24 +#define MODRM_MOD_NOEA 0x03 /* mod == 11 */
1.25 +
1.26 +/* 16-bit modrm flags */
1.27 +#define MOD16_MOD_NODISP 0
1.28 +#define MOD16_MOD_DISP8 1
1.29 +#define MOD16_MOD_DISP16 2
1.30 +#define MOD16_MOD_REG 3
1.31 +
1.32 +#define MOD16_RM_BXSI 0
1.33 +#define MOD16_RM_BXDI 1
1.34 +#define MOD16_RM_BPSI 2
1.35 +#define MOD16_RM_BPDI 3
1.36 +#define MOD16_RM_SI 4
1.37 +#define MOD16_RM_DI 5
1.38 +#define MOD16_RM_BP 6
1.39 +#define MOD16_RM_BX 7
1.40 +
1.41 +/* SIB flags */
1.42 +#define SIB_INDEX_NONE 0x04
1.43 +#define SIB_BASE_EBP 0x05
1.44 +#define SIB_SCALE_NOBASE 0x00
1.45 +
1.46 +/* Convenience struct for modR/M bitfield */
1.47 +struct modRM_byte {
1.48 + unsigned int mod : 2;
1.49 + unsigned int reg : 3;
1.50 + unsigned int rm : 3;
1.51 +};
1.52 +
1.53 +/* Convenience struct for SIB bitfield */
1.54 +struct SIB_byte {
1.55 + unsigned int scale : 2;
1.56 + unsigned int index : 3;
1.57 + unsigned int base : 3;
1.58 +};
1.59 +
1.60 +
1.61 +#if 0
1.62 +int modrm_rm[] = {0,1,2,3,MODRM_RM_SIB,MODRM_MOD_DISP32,6,7};
1.63 +int modrm_reg[] = {0, 1, 2, 3, 4, 5, 6, 7};
1.64 +int modrm_mod[] = {0, MODRM_MOD_DISP8, MODRM_MOD_DISP32, MODRM_MOD_NOEA};
1.65 +int sib_scl[] = {0, 2, 4, 8};
1.66 +int sib_idx[] = {0, 1, 2, 3, SIB_INDEX_NONE, 5, 6, 7 };
1.67 +int sib_bas[] = {0, 1, 2, 3, 4, SIB_SCALE_NOBASE, 6, 7 };
1.68 +#endif
1.69 +
1.70 +/* this is needed to replace x86_imm_signsized() which does not sign-extend
1.71 + * to dest */
1.72 +static unsigned int imm32_signsized( unsigned char *buf, size_t buf_len,
1.73 + int32_t *dest, unsigned int size ) {
1.74 + if ( size > buf_len ) {
1.75 + return 0;
1.76 + }
1.77 +
1.78 + switch (size) {
1.79 + case 1:
1.80 + *dest = *((signed char *) buf);
1.81 + break;
1.82 + case 2:
1.83 + *dest = *((signed short *) buf);
1.84 + break;
1.85 + case 4:
1.86 + default:
1.87 + *dest = *((signed int *) buf);
1.88 + break;
1.89 + }
1.90 +
1.91 + return size;
1.92 +}
1.93 +
1.94 +
1.95 +
1.96 +static void byte_decode(unsigned char b, struct modRM_byte *modrm) {
1.97 + /* generic bitfield-packing routine */
1.98 +
1.99 + modrm->mod = b >> 6; /* top 2 bits */
1.100 + modrm->reg = (b & 56) >> 3; /* middle 3 bits */
1.101 + modrm->rm = b & 7; /* bottom 3 bits */
1.102 +}
1.103 +
1.104 +
1.105 +static size_t sib_decode( unsigned char *buf, size_t buf_len, x86_ea_t *ea,
1.106 + unsigned int mod ) {
1.107 + /* set Address Expression fields (scale, index, base, disp)
1.108 + * according to the contents of the SIB byte.
1.109 + * b points to the SIB byte in the instruction-stream buffer; the
1.110 + * byte after b[0] is therefore the byte after the SIB
1.111 + * returns number of bytes 'used', including the SIB byte */
1.112 + size_t size = 1; /* start at 1 for SIB byte */
1.113 + struct SIB_byte sib;
1.114 +
1.115 + if ( buf_len < 1 ) {
1.116 + return 0;
1.117 + }
1.118 +
1.119 + byte_decode( *buf, (struct modRM_byte *)(void*)&sib ); /* get bit-fields */
1.120 +
1.121 + if ( sib.base == SIB_BASE_EBP && ! mod ) { /* if base == 101 (ebp) */
1.122 + /* IF BASE == EBP, deal with exception */
1.123 + /* IF (ModR/M did not create a Disp */
1.124 + /* ... create a 32-bit Displacement */
1.125 + imm32_signsized( &buf[1], buf_len, &ea->disp, sizeof(int32_t));
1.126 + ea->disp_size = sizeof(int32_t);
1.127 + ea->disp_sign = (ea->disp < 0) ? 1 : 0;
1.128 + size += 4; /* add sizeof disp to count */
1.129 +
1.130 + } else {
1.131 + /* ELSE BASE refers to a General Register */
1.132 + ia32_handle_register( &ea->base, sib.base + 1 );
1.133 + }
1.134 +
1.135 + /* set scale to 1, 2, 4, 8 */
1.136 + ea->scale = 1 << sib.scale;
1.137 +
1.138 + if (sib.index != SIB_INDEX_NONE) {
1.139 + /* IF INDEX is not 'ESP' (100) */
1.140 + ia32_handle_register( &ea->index, sib.index + 1 );
1.141 + }
1.142 +
1.143 + return (size); /* return number of bytes processed */
1.144 +}
1.145 +
1.146 +static size_t modrm_decode16( unsigned char *buf, unsigned int buf_len,
1.147 + x86_op_t *op, struct modRM_byte *modrm ) {
1.148 + /* 16-bit mode: hackish, but not as hackish as 32-bit mode ;) */
1.149 + size_t size = 1; /* # of bytes decoded [1 for modR/M byte] */
1.150 + x86_ea_t * ea = &op->data.expression;
1.151 +
1.152 + switch( modrm->rm ) {
1.153 + case MOD16_RM_BXSI:
1.154 + ia32_handle_register(&ea->base, REG_WORD_OFFSET + 3);
1.155 + ia32_handle_register(&ea->index, REG_WORD_OFFSET + 6);
1.156 + break;
1.157 + case MOD16_RM_BXDI:
1.158 + ia32_handle_register(&ea->base, REG_WORD_OFFSET + 3);
1.159 + ia32_handle_register(&ea->index, REG_WORD_OFFSET + 7);
1.160 + case MOD16_RM_BPSI:
1.161 + op->flags |= op_ss_seg;
1.162 + ia32_handle_register(&ea->base, REG_WORD_OFFSET + 5);
1.163 + ia32_handle_register(&ea->index, REG_WORD_OFFSET + 6);
1.164 + break;
1.165 + case MOD16_RM_BPDI:
1.166 + op->flags |= op_ss_seg;
1.167 + ia32_handle_register(&ea->base, REG_WORD_OFFSET + 5);
1.168 + ia32_handle_register(&ea->index, REG_WORD_OFFSET + 7);
1.169 + break;
1.170 + case MOD16_RM_SI:
1.171 + ia32_handle_register(&ea->base, REG_WORD_OFFSET + 6);
1.172 + break;
1.173 + case MOD16_RM_DI:
1.174 + ia32_handle_register(&ea->base, REG_WORD_OFFSET + 7);
1.175 + break;
1.176 + case MOD16_RM_BP:
1.177 + if ( modrm->mod != MOD16_MOD_NODISP ) {
1.178 + op->flags |= op_ss_seg;
1.179 + ia32_handle_register(&ea->base,
1.180 + REG_WORD_OFFSET + 5);
1.181 + }
1.182 + break;
1.183 + case MOD16_RM_BX:
1.184 + ia32_handle_register(&ea->base, REG_WORD_OFFSET + 3);
1.185 + break;
1.186 + }
1.187 +
1.188 + /* move to byte after ModR/M */
1.189 + ++buf;
1.190 + --buf_len;
1.191 +
1.192 + if ( modrm->mod == MOD16_MOD_DISP8 ) {
1.193 + imm32_signsized( buf, buf_len, &ea->disp, sizeof(char) );
1.194 + ea->disp_sign = (ea->disp < 0) ? 1 : 0;
1.195 + ea->disp_size = sizeof(char);
1.196 + size += sizeof(char);
1.197 + } else if ( modrm->mod == MOD16_MOD_DISP16 ) {
1.198 + imm32_signsized( buf, buf_len, &ea->disp, sizeof(short) );
1.199 + ea->disp_sign = (ea->disp < 0) ? 1 : 0;
1.200 + ea->disp_size = sizeof(short);
1.201 + size += sizeof(short);
1.202 + }
1.203 +
1.204 + return size;
1.205 +}
1.206 +
1.207 +/* TODO : Mark index modes
1.208 + Use addressing mode flags to imply arrays (index), structure (disp),
1.209 + two-dimensional arrays [disp + index], classes [ea reg], and so on.
1.210 +*/
1.211 +size_t ia32_modrm_decode( unsigned char *buf, unsigned int buf_len,
1.212 + x86_op_t *op, x86_insn_t *insn, size_t gen_regs ) {
1.213 + /* create address expression and/or fill operand based on value of
1.214 + * ModR/M byte. Calls sib_decode as appropriate.
1.215 + * flags specifies whether Reg or mod+R/M fields are being decoded
1.216 + * returns the number of bytes in the instruction, including modR/M */
1.217 + struct modRM_byte modrm;
1.218 + size_t size = 1; /* # of bytes decoded [1 for modR/M byte] */
1.219 + x86_ea_t * ea;
1.220 +
1.221 +
1.222 + byte_decode(*buf, &modrm); /* get bitfields */
1.223 +
1.224 + /* first, handle the case where the mod field is a register only */
1.225 + if ( modrm.mod == MODRM_MOD_NOEA ) {
1.226 + op->type = op_register;
1.227 + ia32_handle_register(&op->data.reg, modrm.rm + gen_regs);
1.228 + /* increase insn size by 1 for modrm byte */
1.229 + return 1;
1.230 + }
1.231 +
1.232 + /* then deal with cases where there is an effective address */
1.233 + ea = &op->data.expression;
1.234 + op->type = op_expression;
1.235 + op->flags |= op_pointer;
1.236 +
1.237 + if ( insn->addr_size == 2 ) {
1.238 + /* gah! 16 bit mode! */
1.239 + return modrm_decode16( buf, buf_len, op, &modrm);
1.240 + }
1.241 +
1.242 + /* move to byte after ModR/M */
1.243 + ++buf;
1.244 + --buf_len;
1.245 +
1.246 + if (modrm.mod == MODRM_MOD_NODISP) { /* if mod == 00 */
1.247 +
1.248 + /* IF MOD == No displacement, just Indirect Register */
1.249 + if (modrm.rm == MODRM_RM_NOREG) { /* if r/m == 101 */
1.250 + /* IF RM == No Register, just Displacement */
1.251 + /* This is an Intel Moronic Exception TM */
1.252 + imm32_signsized( buf, buf_len, &ea->disp,
1.253 + sizeof(int32_t) );
1.254 + ea->disp_size = sizeof(int32_t);
1.255 + ea->disp_sign = (ea->disp < 0) ? 1 : 0;
1.256 + size += 4; /* add sizeof disp to count */
1.257 +
1.258 + } else if (modrm.rm == MODRM_RM_SIB) { /* if r/m == 100 */
1.259 + /* ELSE IF an SIB byte is present */
1.260 + /* TODO: check for 0 retval */
1.261 + size += sib_decode( buf, buf_len, ea, modrm.mod);
1.262 + /* move to byte after SIB for displacement */
1.263 + ++buf;
1.264 + --buf_len;
1.265 + } else { /* modR/M specifies base register */
1.266 + /* ELSE RM encodes a general register */
1.267 + ia32_handle_register( &ea->base, modrm.rm + 1 );
1.268 + }
1.269 + } else { /* mod is 01 or 10 */
1.270 + if (modrm.rm == MODRM_RM_SIB) { /* rm == 100 */
1.271 + /* IF base is an AddrExpr specified by an SIB byte */
1.272 + /* TODO: check for 0 retval */
1.273 + size += sib_decode( buf, buf_len, ea, modrm.mod);
1.274 + /* move to byte after SIB for displacement */
1.275 + ++buf;
1.276 + --buf_len;
1.277 + } else {
1.278 + /* ELSE base is a general register */
1.279 + ia32_handle_register( &ea->base, modrm.rm + 1 );
1.280 + }
1.281 +
1.282 + /* ELSE mod + r/m specify a disp##[base] or disp##(SIB) */
1.283 + if (modrm.mod == MODRM_MOD_DISP8) { /* mod == 01 */
1.284 + /* If this is an 8-bit displacement */
1.285 + imm32_signsized( buf, buf_len, &ea->disp,
1.286 + sizeof(char));
1.287 + ea->disp_size = sizeof(char);
1.288 + ea->disp_sign = (ea->disp < 0) ? 1 : 0;
1.289 + size += 1; /* add sizeof disp to count */
1.290 +
1.291 + } else {
1.292 + /* Displacement is dependent on address size */
1.293 + imm32_signsized( buf, buf_len, &ea->disp,
1.294 + insn->addr_size);
1.295 + ea->disp_size = insn->addr_size;
1.296 + ea->disp_sign = (ea->disp < 0) ? 1 : 0;
1.297 + size += 4;
1.298 + }
1.299 + }
1.300 +
1.301 + return size; /* number of bytes found in instruction */
1.302 +}
1.303 +
1.304 +void ia32_reg_decode( unsigned char byte, x86_op_t *op, size_t gen_regs ) {
1.305 + struct modRM_byte modrm;
1.306 + byte_decode( byte, &modrm ); /* get bitfields */
1.307 +
1.308 + /* set operand to register ID */
1.309 + op->type = op_register;
1.310 + ia32_handle_register(&op->data.reg, modrm.reg + gen_regs);
1.311 +
1.312 + return;
1.313 +}
