xpcom/reflect/xptcall/src/md/unix/xptcstubs_asm_ipf32.s

changeset 0
6474c204b198
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/xpcom/reflect/xptcall/src/md/unix/xptcstubs_asm_ipf32.s	Wed Dec 31 06:09:35 2014 +0100
     1.3 @@ -0,0 +1,123 @@
     1.4 +
     1.5 +// Select C numeric constant
     1.6 +        .radix  C
     1.7 +        .psr    abi32
     1.8 +        .psr    msb
     1.9 +// Section has executable code
    1.10 +        .section .text, "ax","progbits"
    1.11 +// procedure named 'SharedStub'
    1.12 +        .proc   SharedStub
    1.13 +// manual bundling
    1.14 +        .explicit
    1.15 +
    1.16 +        .global PrepareAndDispatch
    1.17 +//      .exclass  PrepareAndDispatch, @fullyvisible
    1.18 +        .type   PrepareAndDispatch,@function
    1.19 +
    1.20 +SharedStub::
    1.21 +// 10 arguments, first 8 are the input arguments of previous
    1.22 +// function call.  The 9th one is methodIndex and the 10th is the
    1.23 +// pointer to the remaining input arguments.  The last two arguments
    1.24 +// are passed in memory.
    1.25 +        .prologue
    1.26 +        .save ar.pfs , r41
    1.27 +// allocate 8 input args, 4 local args, and 5 output args
    1.28 +        alloc           r41 = ar.pfs, 8, 4, 5, 0   // M
    1.29 +        .save rp, r40
    1.30 +        mov             r40 = rp                   // I
    1.31 +        addp4		out4 = 28, sp           ;; // I
    1.32 +
    1.33 +        .save ar.unat, r42
    1.34 +        mov             r42 = ar.unat              // M
    1.35 +        .fframe 144
    1.36 +        add             sp = -144, sp              // A
    1.37 +// unwind table already knows gp, don't need to specify anything
    1.38 +        add             r43 = 0, gp             ;; // A
    1.39 +
    1.40 +// We have possible 8 integer registers and 8 float registers that could
    1.41 +// be arguments.  We also have a stack region from the previous
    1.42 +// stack frame that may hold some stack arguments.
    1.43 +// We need to write the integer registers to a memory region, write
    1.44 +// the float registers to a memory region (making sure we don't step
    1.45 +// on NAT while touching the registers).  We also mark the memory
    1.46 +// address of the stack arguments.
    1.47 +// We then call PrepareAndDispatch() specifying the three memory
    1.48 +// region pointers.
    1.49 +
    1.50 +
    1.51 +        .body
    1.52 +        add             out0 = 0, in0        // A  move self ptr
    1.53 +// 144 bytes = 16 byte stack header + 64 byte int space + 64 byte float space
    1.54 +// methodIndex is at 144 + 16 bytes away from current sp
    1.55 +// (current frame + previous frame header)
    1.56 +        ld4             out4 = [out4]        // A  restarg address
    1.57 +        add             r11  = 160, sp    ;; // A  address of methodIndex
    1.58 +
    1.59 +        ld8             out1 = [r11]         // M  load methodIndex
    1.60 +// sp + 16 is the start of intargs
    1.61 +        add             out2 = 16, sp        // A  address of intargs
    1.62 +// the intargs take up 64 bytes, so sp + 16 + 64 is the start of floatargs
    1.63 +        add             out3 = 80, sp     ;; // A  address of floatargs
    1.64 +
    1.65 +        add             r11 = 0, out2     ;; // A
    1.66 +        st8.spill       [r11] = in1, 8       // M
    1.67 +        add             r10 = 0, out3     ;; // A
    1.68 +
    1.69 +        st8.spill       [r11] = in2, 8    ;; // M
    1.70 +        st8.spill       [r11] = in3, 8       // M
    1.71 +        nop.i           0                 ;; // I
    1.72 +
    1.73 +        st8.spill       [r11] = in4, 8    ;; // M
    1.74 +        st8.spill       [r11] = in5, 8       // M
    1.75 +        nop.i           0                 ;; // I
    1.76 +
    1.77 +        st8.spill       [r11] = in6, 8    ;; // M
    1.78 +        st8.spill       [r11] = in7          // M
    1.79 +        fclass.nm       p14,p15 = f8,@nat ;; // F
    1.80 +
    1.81 +(p14)   stfd            [r10] = f8, 8        // M
    1.82 +(p15)   add             r10 = 8, r10         // A
    1.83 +        fclass.nm       p12,p13 = f9,@nat ;; // F
    1.84 +
    1.85 +(p12)   stfd            [r10] = f9, 8        // M
    1.86 +(p13)   add             r10 = 8, r10         // A
    1.87 +        fclass.nm       p14,p15 =f10,@nat ;; // F
    1.88 +
    1.89 +(p14)   stfd            [r10] = f10, 8       // M
    1.90 +(p15)   add             r10 = 8, r10         // A
    1.91 +        fclass.nm       p12,p13 =f11,@nat ;; // F
    1.92 +
    1.93 +(p12)   stfd            [r10] = f11, 8       // M
    1.94 +(p13)   add             r10 = 8, r10         // A
    1.95 +        fclass.nm       p14,p15 =f12,@nat ;; // F
    1.96 +
    1.97 +(p14)   stfd            [r10] = f12, 8       // M
    1.98 +(p15)   add             r10 = 8, r10         // A
    1.99 +        fclass.nm       p12,p13 =f13,@nat ;; // F
   1.100 +
   1.101 +(p12)   stfd            [r10] = f13, 8       // M
   1.102 +(p13)   add             r10 = 8, r10         // A
   1.103 +        fclass.nm       p14,p15 =f14,@nat ;; // F
   1.104 +
   1.105 +(p14)   stfd            [r10] = f14, 8       // M
   1.106 +(p15)   add             r10 = 8, r10         // A
   1.107 +        fclass.nm       p12,p13 =f15,@nat ;; // F
   1.108 +
   1.109 +(p12)   stfd            [r10] = f15, 8       // M
   1.110 +(p13)   add             r10 = 8, r10         // A
   1.111 +
   1.112 +// branch to PrepareAndDispatch
   1.113 +        br.call.dptk.few rp = PrepareAndDispatch ;; // B
   1.114 +
   1.115 +// epilog
   1.116 +        mov             ar.unat = r42        // M
   1.117 +        mov             ar.pfs = r41         // I
   1.118 +        mov             rp = r40          ;; // I
   1.119 +
   1.120 +        add             gp = 0, r43          // A
   1.121 +        add             sp = 144, sp         // A
   1.122 +        br.ret.dptk.few rp                ;; // B
   1.123 +
   1.124 +        .endp
   1.125 +
   1.126 +

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