1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/xpcom/reflect/xptcall/src/md/unix/xptcstubs_asm_mips.S Wed Dec 31 06:09:35 2014 +0100
1.3 @@ -0,0 +1,116 @@
1.4 +/* -*- Mode: asm; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 4 -*- */
1.5 +/* This Source Code Form is subject to the terms of the Mozilla Public
1.6 + * License, v. 2.0. If a copy of the MPL was not distributed with this
1.7 + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
1.8 +
1.9 +/* This code is for MIPS using the O32 ABI. */
1.10 +
1.11 +#ifdef ANDROID
1.12 +#include <asm/regdef.h>
1.13 +#include <asm/asm.h>
1.14 +#include <machine/asm.h>
1.15 +#else
1.16 +#include <sys/regdef.h>
1.17 +#include <sys/asm.h>
1.18 +#endif
1.19 +
1.20 +# NARGSAVE is the argument space in the callers frame, including extra
1.21 +# 'shadowed' space for the argument registers. The minimum of 4
1.22 +# argument slots is sometimes predefined in the header files.
1.23 +#ifndef NARGSAVE
1.24 +#define NARGSAVE 4
1.25 +#endif
1.26 +
1.27 +#define LOCALSZ 2 /* gp, ra */
1.28 +#define FRAMESZ ((((NARGSAVE+LOCALSZ)*SZREG)+ALSZ)&ALMASK)
1.29 +
1.30 +#define RAOFF (FRAMESZ - (1*SZREG))
1.31 +#define GPOFF (FRAMESZ - (2*SZREG))
1.32 +
1.33 +#define A0OFF (FRAMESZ + (0*SZREG))
1.34 +#define A1OFF (FRAMESZ + (1*SZREG))
1.35 +#define A2OFF (FRAMESZ + (2*SZREG))
1.36 +#define A3OFF (FRAMESZ + (3*SZREG))
1.37 +
1.38 + .text
1.39 +
1.40 +#define STUB_ENTRY(x) \
1.41 + .if x < 10; \
1.42 + .globl _ZN14nsXPTCStubBase5Stub ##x ##Ev; \
1.43 + .type _ZN14nsXPTCStubBase5Stub ##x ##Ev,@function; \
1.44 + .aent _ZN14nsXPTCStubBase5Stub ##x ##Ev,0; \
1.45 +_ZN14nsXPTCStubBase5Stub ##x ##Ev:; \
1.46 + SETUP_GP; \
1.47 + li t0,x; \
1.48 + b sharedstub; \
1.49 + .elseif x < 100; \
1.50 + .globl _ZN14nsXPTCStubBase6Stub ##x ##Ev; \
1.51 + .type _ZN14nsXPTCStubBase6Stub ##x ##Ev,@function; \
1.52 + .aent _ZN14nsXPTCStubBase6Stub ##x ##Ev,0; \
1.53 +_ZN14nsXPTCStubBase6Stub ##x ##Ev:; \
1.54 + SETUP_GP; \
1.55 + li t0,x; \
1.56 + b sharedstub; \
1.57 + .elseif x < 1000; \
1.58 + .globl _ZN14nsXPTCStubBase7Stub ##x ##Ev; \
1.59 + .type _ZN14nsXPTCStubBase7Stub ##x ##Ev,@function; \
1.60 + .aent _ZN14nsXPTCStubBase7Stub ##x ##Ev,0; \
1.61 +_ZN14nsXPTCStubBase7Stub ##x ##Ev:; \
1.62 + SETUP_GP; \
1.63 + li t0,x; \
1.64 + b sharedstub; \
1.65 + .else; \
1.66 + .err; \
1.67 + .endif
1.68 +
1.69 +# SENTINEL_ENTRY is handled in the cpp file.
1.70 +#define SENTINEL_ENTRY(x)
1.71 +
1.72 +#
1.73 +# open a dummy frame for the function entries
1.74 +#
1.75 + .align 2
1.76 + .type dummy,@function
1.77 + .ent dummy, 0
1.78 + .frame sp, FRAMESZ, ra
1.79 +dummy:
1.80 + SETUP_GP
1.81 +
1.82 +#include "xptcstubsdef.inc"
1.83 +
1.84 +sharedstub:
1.85 + subu sp, FRAMESZ
1.86 +
1.87 + # specify the save register mask for gp, ra, a0-a3
1.88 + .mask 0x900000F0, RAOFF-FRAMESZ
1.89 +
1.90 + sw ra, RAOFF(sp)
1.91 + SAVE_GP(GPOFF)
1.92 +
1.93 + # Micro-optimization: a0 is already loaded, and its slot gets
1.94 + # ignored by PrepareAndDispatch, so no need to save it here.
1.95 + # sw a0, A0OFF(sp)
1.96 + sw a1, A1OFF(sp)
1.97 + sw a2, A2OFF(sp)
1.98 + sw a3, A3OFF(sp)
1.99 +
1.100 + la t9, PrepareAndDispatch
1.101 +
1.102 + # t0 is methodIndex
1.103 + move a1, t0
1.104 + # have a2 point to the begin of the argument space on stack
1.105 + addiu a2, sp, FRAMESZ
1.106 +
1.107 + # PrepareAndDispatch(that, methodIndex, args)
1.108 + jalr t9
1.109 +
1.110 + # Micro-optimization: Using jalr explicitly has the side-effect
1.111 + # of not triggering .cprestore. This is ok because we have no
1.112 + # gp reference below this point. It also allows better
1.113 + # instruction sscheduling.
1.114 + # lw gp, GPOFF(fp)
1.115 +
1.116 + lw ra, RAOFF(sp)
1.117 + addiu sp, FRAMESZ
1.118 + j ra
1.119 + END(dummy)
