js/src/jit/arm/BaselineRegisters-arm.h

Wed, 31 Dec 2014 06:09:35 +0100

author
Michael Schloh von Bennewitz <michael@schloh.com>
date
Wed, 31 Dec 2014 06:09:35 +0100
changeset 0
6474c204b198
permissions
-rw-r--r--

Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.

     1 /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
     2  * vim: set ts=8 sts=4 et sw=4 tw=99:
     3  * This Source Code Form is subject to the terms of the Mozilla Public
     4  * License, v. 2.0. If a copy of the MPL was not distributed with this
     5  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
     7 #ifndef jit_arm_BaselineRegisters_arm_h
     8 #define jit_arm_BaselineRegisters_arm_h
    10 #ifdef JS_ION
    12 #include "jit/IonMacroAssembler.h"
    14 namespace js {
    15 namespace jit {
    17 // r15 = program-counter
    18 // r14 = link-register
    20 // r13 = stack-pointer
    21 // r11 = frame-pointer
    22 static MOZ_CONSTEXPR_VAR Register BaselineFrameReg = r11;
    23 static MOZ_CONSTEXPR_VAR Register BaselineStackReg = sp;
    25 // ValueOperands R0, R1, and R2.
    26 // R0 == JSReturnReg, and R2 uses registers not
    27 // preserved across calls.  R1 value should be
    28 // preserved across calls.
    29 static MOZ_CONSTEXPR_VAR ValueOperand R0(r3, r2);
    30 static MOZ_CONSTEXPR_VAR ValueOperand R1(r5, r4);
    31 static MOZ_CONSTEXPR_VAR ValueOperand R2(r1, r0);
    33 // BaselineTailCallReg and BaselineStubReg
    34 // These use registers that are not preserved across
    35 // calls.
    36 static MOZ_CONSTEXPR_VAR Register BaselineTailCallReg = r14;
    37 static MOZ_CONSTEXPR_VAR Register BaselineStubReg     = r9;
    39 static MOZ_CONSTEXPR_VAR Register ExtractTemp0        = InvalidReg;
    40 static MOZ_CONSTEXPR_VAR Register ExtractTemp1        = InvalidReg;
    42 // Register used internally by MacroAssemblerARM.
    43 static MOZ_CONSTEXPR_VAR Register BaselineSecondScratchReg = r6;
    45 // R7 - R9 are generally available for use within stubcode.
    47 // Note that BaselineTailCallReg is actually just the link
    48 // register.  In ARM code emission, we do not clobber BaselineTailCallReg
    49 // since we keep the return address for calls there.
    51 // FloatReg0 must be equal to ReturnFloatReg.
    52 static MOZ_CONSTEXPR_VAR FloatRegister FloatReg0      = d0;
    53 static MOZ_CONSTEXPR_VAR FloatRegister FloatReg1      = d1;
    55 } // namespace jit
    56 } // namespace js
    58 #endif // JS_ION
    60 #endif /* jit_arm_BaselineRegisters_arm_h */

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