xpcom/reflect/xptcall/src/md/unix/xptcstubs_asm_ipf32.s@b8a032363ba2
xpcom/reflect/xptcall/src/md/unix/xptcstubs_asm_ipf32.s
Thu, 22 Jan 2015 13:21:57 +0100
- author
- Michael Schloh von Bennewitz <michael@schloh.com>
- date
- Thu, 22 Jan 2015 13:21:57 +0100
- branch
- TOR_BUG_9701
- changeset 15
- b8a032363ba2
- permissions
- -rw-r--r--
Incorporate requested changes from Mozilla in review:
https://bugzilla.mozilla.org/show_bug.cgi?id=1123480#c6
2 // Select C numeric constant
3 .radix C
4 .psr abi32
5 .psr msb
6 // Section has executable code
7 .section .text, "ax","progbits"
8 // procedure named 'SharedStub'
9 .proc SharedStub
10 // manual bundling
11 .explicit
13 .global PrepareAndDispatch
14 // .exclass PrepareAndDispatch, @fullyvisible
15 .type PrepareAndDispatch,@function
17 SharedStub::
18 // 10 arguments, first 8 are the input arguments of previous
19 // function call. The 9th one is methodIndex and the 10th is the
20 // pointer to the remaining input arguments. The last two arguments
21 // are passed in memory.
22 .prologue
23 .save ar.pfs , r41
24 // allocate 8 input args, 4 local args, and 5 output args
25 alloc r41 = ar.pfs, 8, 4, 5, 0 // M
26 .save rp, r40
27 mov r40 = rp // I
28 addp4 out4 = 28, sp ;; // I
30 .save ar.unat, r42
31 mov r42 = ar.unat // M
32 .fframe 144
33 add sp = -144, sp // A
34 // unwind table already knows gp, don't need to specify anything
35 add r43 = 0, gp ;; // A
37 // We have possible 8 integer registers and 8 float registers that could
38 // be arguments. We also have a stack region from the previous
39 // stack frame that may hold some stack arguments.
40 // We need to write the integer registers to a memory region, write
41 // the float registers to a memory region (making sure we don't step
42 // on NAT while touching the registers). We also mark the memory
43 // address of the stack arguments.
44 // We then call PrepareAndDispatch() specifying the three memory
45 // region pointers.
48 .body
49 add out0 = 0, in0 // A move self ptr
50 // 144 bytes = 16 byte stack header + 64 byte int space + 64 byte float space
51 // methodIndex is at 144 + 16 bytes away from current sp
52 // (current frame + previous frame header)
53 ld4 out4 = [out4] // A restarg address
54 add r11 = 160, sp ;; // A address of methodIndex
56 ld8 out1 = [r11] // M load methodIndex
57 // sp + 16 is the start of intargs
58 add out2 = 16, sp // A address of intargs
59 // the intargs take up 64 bytes, so sp + 16 + 64 is the start of floatargs
60 add out3 = 80, sp ;; // A address of floatargs
62 add r11 = 0, out2 ;; // A
63 st8.spill [r11] = in1, 8 // M
64 add r10 = 0, out3 ;; // A
66 st8.spill [r11] = in2, 8 ;; // M
67 st8.spill [r11] = in3, 8 // M
68 nop.i 0 ;; // I
70 st8.spill [r11] = in4, 8 ;; // M
71 st8.spill [r11] = in5, 8 // M
72 nop.i 0 ;; // I
74 st8.spill [r11] = in6, 8 ;; // M
75 st8.spill [r11] = in7 // M
76 fclass.nm p14,p15 = f8,@nat ;; // F
78 (p14) stfd [r10] = f8, 8 // M
79 (p15) add r10 = 8, r10 // A
80 fclass.nm p12,p13 = f9,@nat ;; // F
82 (p12) stfd [r10] = f9, 8 // M
83 (p13) add r10 = 8, r10 // A
84 fclass.nm p14,p15 =f10,@nat ;; // F
86 (p14) stfd [r10] = f10, 8 // M
87 (p15) add r10 = 8, r10 // A
88 fclass.nm p12,p13 =f11,@nat ;; // F
90 (p12) stfd [r10] = f11, 8 // M
91 (p13) add r10 = 8, r10 // A
92 fclass.nm p14,p15 =f12,@nat ;; // F
94 (p14) stfd [r10] = f12, 8 // M
95 (p15) add r10 = 8, r10 // A
96 fclass.nm p12,p13 =f13,@nat ;; // F
98 (p12) stfd [r10] = f13, 8 // M
99 (p13) add r10 = 8, r10 // A
100 fclass.nm p14,p15 =f14,@nat ;; // F
102 (p14) stfd [r10] = f14, 8 // M
103 (p15) add r10 = 8, r10 // A
104 fclass.nm p12,p13 =f15,@nat ;; // F
106 (p12) stfd [r10] = f15, 8 // M
107 (p13) add r10 = 8, r10 // A
109 // branch to PrepareAndDispatch
110 br.call.dptk.few rp = PrepareAndDispatch ;; // B
112 // epilog
113 mov ar.unat = r42 // M
114 mov ar.pfs = r41 // I
115 mov rp = r40 ;; // I
117 add gp = 0, r43 // A
118 add sp = 144, sp // A
119 br.ret.dptk.few rp ;; // B
121 .endp
