michael@0: // All rights reserved. michael@0: // michael@0: // Redistribution and use in source and binary forms, with or without michael@0: // modification, are permitted provided that the following conditions are michael@0: // met: michael@0: // michael@0: // * Redistributions of source code must retain the above copyright michael@0: // notice, this list of conditions and the following disclaimer. michael@0: // * Redistributions in binary form must reproduce the above michael@0: // copyright notice, this list of conditions and the following disclaimer michael@0: // in the documentation and/or other materials provided with the michael@0: // distribution. michael@0: // * Neither the name of Google Inc. nor the names of its michael@0: // contributors may be used to endorse or promote products derived from michael@0: // this software without specific prior written permission. michael@0: // michael@0: // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS michael@0: // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT michael@0: // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR michael@0: // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT michael@0: // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, michael@0: // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT michael@0: // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, michael@0: // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY michael@0: // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT michael@0: // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE michael@0: // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE// michael@0: // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS michael@0: // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT michael@0: // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR michael@0: // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT michael@0: // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, michael@0: // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT michael@0: // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, michael@0: // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY michael@0: // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT michael@0: // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE michael@0: // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. michael@0: michael@0: #include michael@0: michael@0: #include "breakpad_googletest_includes.h" michael@0: #include "processor/disassembler_x86.h" michael@0: #include "third_party/libdisasm/libdis.h" michael@0: michael@0: namespace { michael@0: michael@0: using google_breakpad::DisassemblerX86; michael@0: michael@0: unsigned char just_return[] = "\xc3"; // retn michael@0: michael@0: unsigned char invalid_instruction[] = "\x00"; // invalid michael@0: michael@0: unsigned char read_eax_jmp_eax[] = michael@0: "\x8b\x18" // mov ebx, [eax]; michael@0: "\x33\xc9" // xor ebx, ebx; michael@0: "\xff\x20" // jmp eax; michael@0: "\xc3"; // retn; michael@0: michael@0: unsigned char write_eax_arg_to_call[] = michael@0: "\x89\xa8\x00\x02\x00\x00" // mov [eax+200], ebp; michael@0: "\xc1\xeb\x02" // shr ebx, 2; michael@0: "\x50" // push eax; michael@0: "\xe8\xd1\x24\x77\x88" // call something; michael@0: "\xc3"; // retn; michael@0: michael@0: unsigned char read_edi_stosb[] = michael@0: "\x8b\x07" // mov eax, [edi]; michael@0: "\x8b\xc8" // mov ecx, eax; michael@0: "\xf3\xaa" // rep stosb; michael@0: "\xc3"; // retn; michael@0: michael@0: unsigned char read_clobber_write[] = michael@0: "\x03\x18" // add ebx, [eax]; michael@0: "\x8b\xc1" // mov eax, ecx; michael@0: "\x89\x10" // mov [eax], edx; michael@0: "\xc3"; // retn; michael@0: michael@0: unsigned char read_xchg_write[] = michael@0: "\x03\x18" // add ebx, [eax]; michael@0: "\x91" // xchg eax, ecx; michael@0: "\x89\x18" // mov [eax], ebx; michael@0: "\x89\x11" // mov [ecx], edx; michael@0: "\xc3"; // retn; michael@0: michael@0: unsigned char read_cmp[] = michael@0: "\x03\x18" // add ebx, [eax]; michael@0: "\x83\xf8\x00" // cmp eax, 0; michael@0: "\x74\x04" // je +4; michael@0: "\xc3"; // retn; michael@0: michael@0: TEST(DisassemblerX86Test, SimpleReturnInstruction) { michael@0: DisassemblerX86 dis(just_return, sizeof(just_return)-1, 0); michael@0: EXPECT_EQ(1U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_TRUE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_controlflow, dis.currentInstructionGroup()); michael@0: const libdis::x86_insn_t* instruction = dis.currentInstruction(); michael@0: EXPECT_EQ(libdis::insn_controlflow, instruction->group); michael@0: EXPECT_EQ(libdis::insn_return, instruction->type); michael@0: EXPECT_EQ(0U, dis.NextInstruction()); michael@0: EXPECT_FALSE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(NULL, dis.currentInstruction()); michael@0: } michael@0: michael@0: TEST(DisassemblerX86Test, SimpleInvalidInstruction) { michael@0: DisassemblerX86 dis(invalid_instruction, sizeof(invalid_instruction)-1, 0); michael@0: EXPECT_EQ(0U, dis.NextInstruction()); michael@0: EXPECT_FALSE(dis.currentInstructionValid()); michael@0: } michael@0: michael@0: TEST(DisassemblerX86Test, BadReadLeadsToBranch) { michael@0: DisassemblerX86 dis(read_eax_jmp_eax, sizeof(read_eax_jmp_eax)-1, 0); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_move, dis.currentInstructionGroup()); michael@0: EXPECT_TRUE(dis.setBadRead()); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_logic, dis.currentInstructionGroup()); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(google_breakpad::DISX86_BAD_BRANCH_TARGET, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_controlflow, dis.currentInstructionGroup()); michael@0: } michael@0: michael@0: TEST(DisassemblerX86Test, BadWriteLeadsToPushedArg) { michael@0: DisassemblerX86 dis(write_eax_arg_to_call, michael@0: sizeof(write_eax_arg_to_call)-1, 0); michael@0: EXPECT_EQ(6U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_move, dis.currentInstructionGroup()); michael@0: EXPECT_TRUE(dis.setBadWrite()); michael@0: EXPECT_EQ(3U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_arithmetic, dis.currentInstructionGroup()); michael@0: EXPECT_EQ(1U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(5U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(google_breakpad::DISX86_BAD_ARGUMENT_PASSED, dis.flags()); michael@0: EXPECT_EQ(libdis::insn_controlflow, dis.currentInstructionGroup()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: } michael@0: michael@0: michael@0: TEST(DisassemblerX86Test, BadReadLeadsToBlockWrite) { michael@0: DisassemblerX86 dis(read_edi_stosb, sizeof(read_edi_stosb)-1, 0); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_move, dis.currentInstructionGroup()); michael@0: EXPECT_TRUE(dis.setBadRead()); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_move, dis.currentInstructionGroup()); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(google_breakpad::DISX86_BAD_BLOCK_WRITE, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_string, dis.currentInstructionGroup()); michael@0: } michael@0: michael@0: TEST(DisassemblerX86Test, BadReadClobberThenWrite) { michael@0: DisassemblerX86 dis(read_clobber_write, sizeof(read_clobber_write)-1, 0); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_arithmetic, dis.currentInstructionGroup()); michael@0: EXPECT_TRUE(dis.setBadRead()); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_move, dis.currentInstructionGroup()); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_move, dis.currentInstructionGroup()); michael@0: } michael@0: michael@0: TEST(DisassemblerX86Test, BadReadXCHGThenWrite) { michael@0: DisassemblerX86 dis(read_xchg_write, sizeof(read_xchg_write)-1, 0); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_arithmetic, dis.currentInstructionGroup()); michael@0: EXPECT_TRUE(dis.setBadRead()); michael@0: EXPECT_EQ(1U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_move, dis.currentInstructionGroup()); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_move, dis.currentInstructionGroup()); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(google_breakpad::DISX86_BAD_WRITE, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_move, dis.currentInstructionGroup()); michael@0: } michael@0: michael@0: TEST(DisassemblerX86Test, BadReadThenCMP) { michael@0: DisassemblerX86 dis(read_cmp, sizeof(read_cmp)-1, 0); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(0U, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_arithmetic, dis.currentInstructionGroup()); michael@0: EXPECT_TRUE(dis.setBadRead()); michael@0: EXPECT_EQ(3U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(google_breakpad::DISX86_BAD_COMPARISON, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_comparison, dis.currentInstructionGroup()); michael@0: EXPECT_EQ(2U, dis.NextInstruction()); michael@0: EXPECT_TRUE(dis.currentInstructionValid()); michael@0: EXPECT_EQ(google_breakpad::DISX86_BAD_COMPARISON, dis.flags()); michael@0: EXPECT_FALSE(dis.endOfBlock()); michael@0: EXPECT_EQ(libdis::insn_controlflow, dis.currentInstructionGroup()); michael@0: } michael@0: }