michael@0: /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
michael@0:  * vim: set ts=8 sts=4 et sw=4 tw=99:
michael@0:  * This Source Code Form is subject to the terms of the Mozilla Public
michael@0:  * License, v. 2.0. If a copy of the MPL was not distributed with this
michael@0:  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
michael@0: 
michael@0: #include "jsiter.h"
michael@0: 
michael@0: #include "jit/BaselineCompiler.h"
michael@0: #include "jit/BaselineHelpers.h"
michael@0: #include "jit/BaselineIC.h"
michael@0: #include "jit/BaselineJIT.h"
michael@0: #include "jit/IonLinker.h"
michael@0: 
michael@0: #include "jsboolinlines.h"
michael@0: 
michael@0: using namespace js;
michael@0: using namespace js::jit;
michael@0: 
michael@0: namespace js {
michael@0: namespace jit {
michael@0: 
michael@0: // ICCompare_Int32
michael@0: 
michael@0: bool
michael@0: ICCompare_Int32::Compiler::generateStubCode(MacroAssembler &masm)
michael@0: {
michael@0:     // Guard that R0 is an integer and R1 is an integer.
michael@0:     Label failure;
michael@0:     Label conditionTrue;
michael@0:     masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
michael@0:     masm.branchTestInt32(Assembler::NotEqual, R1, &failure);
michael@0: 
michael@0:     // Compare payload regs of R0 and R1.
michael@0:     Assembler::Condition cond = JSOpToCondition(op, /* signed = */true);
michael@0:     masm.ma_cmp_set(R0.payloadReg(), R0.payloadReg(), R1.payloadReg(), cond);
michael@0: 
michael@0:     masm.tagValue(JSVAL_TYPE_BOOLEAN, R0.payloadReg(), R0);
michael@0:     EmitReturnFromIC(masm);
michael@0: 
michael@0:     // Failure case - jump to next stub
michael@0:     masm.bind(&failure);
michael@0:     EmitStubGuardFailure(masm);
michael@0: 
michael@0:     return true;
michael@0: }
michael@0: 
michael@0: bool
michael@0: ICCompare_Double::Compiler::generateStubCode(MacroAssembler &masm)
michael@0: {
michael@0:     Label failure, isNaN;
michael@0:     masm.ensureDouble(R0, FloatReg0, &failure);
michael@0:     masm.ensureDouble(R1, FloatReg1, &failure);
michael@0: 
michael@0:     Register dest = R0.scratchReg();
michael@0: 
michael@0:     Assembler::DoubleCondition doubleCond = JSOpToDoubleCondition(op);
michael@0: 
michael@0:     masm.ma_cmp_set_double(dest, FloatReg0, FloatReg1, doubleCond);
michael@0: 
michael@0:     masm.tagValue(JSVAL_TYPE_BOOLEAN, dest, R0);
michael@0:     EmitReturnFromIC(masm);
michael@0: 
michael@0:     // Failure case - jump to next stub
michael@0:     masm.bind(&failure);
michael@0:     EmitStubGuardFailure(masm);
michael@0:     return true;
michael@0: }
michael@0: 
michael@0: // ICBinaryArith_Int32
michael@0: 
michael@0: bool
michael@0: ICBinaryArith_Int32::Compiler::generateStubCode(MacroAssembler &masm)
michael@0: {
michael@0:     // Guard that R0 is an integer and R1 is an integer.
michael@0:     Label failure;
michael@0:     masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
michael@0:     masm.branchTestInt32(Assembler::NotEqual, R1, &failure);
michael@0: 
michael@0:     // Add R0 and R1. Don't need to explicitly unbox, just use R2's payloadReg.
michael@0:     Register scratchReg = R2.payloadReg();
michael@0: 
michael@0:     // DIV and MOD need an extra non-volatile ValueOperand to hold R0.
michael@0:     GeneralRegisterSet savedRegs = availableGeneralRegs(2);
michael@0:     savedRegs = GeneralRegisterSet::Intersect(GeneralRegisterSet::NonVolatile(), savedRegs);
michael@0:     ValueOperand savedValue = savedRegs.takeAnyValue();
michael@0: 
michael@0:     Label goodMul, divTest1, divTest2;
michael@0:     switch(op_) {
michael@0:       case JSOP_ADD:
michael@0:         // We know R0.typeReg() already contains the integer tag. No boxing
michael@0:         // required.
michael@0:         masm.ma_addTestOverflow(R0.payloadReg(), R0.payloadReg(), R1.payloadReg(), &failure);
michael@0:         break;
michael@0:       case JSOP_SUB:
michael@0:         masm.ma_subTestOverflow(R0.payloadReg(), R0.payloadReg(), R1.payloadReg(), &failure);
michael@0:         break;
michael@0:       case JSOP_MUL: {
michael@0:         masm.ma_mul_branch_overflow(scratchReg, R0.payloadReg(), R1.payloadReg(), &failure);
michael@0: 
michael@0:         masm.ma_b(scratchReg, Imm32(0), &goodMul, Assembler::NotEqual, ShortJump);
michael@0: 
michael@0:         // Result is -0 if operands have different signs.
michael@0:         masm.as_xor(t8, R0.payloadReg(), R1.payloadReg());
michael@0:         masm.ma_b(t8, Imm32(0), &failure, Assembler::LessThan, ShortJump);
michael@0: 
michael@0:         masm.bind(&goodMul);
michael@0:         masm.move32(scratchReg, R0.payloadReg());
michael@0:         break;
michael@0:       }
michael@0:       case JSOP_DIV:
michael@0:       case JSOP_MOD: {
michael@0:         // Check for INT_MIN / -1, it results in a double.
michael@0:         masm.ma_b(R0.payloadReg(), Imm32(INT_MIN), &divTest1, Assembler::NotEqual, ShortJump);
michael@0:         masm.ma_b(R1.payloadReg(), Imm32(-1), &failure, Assembler::Equal, ShortJump);
michael@0:         masm.bind(&divTest1);
michael@0: 
michael@0:         // Check for division by zero
michael@0:         masm.ma_b(R1.payloadReg(), Imm32(0), &failure, Assembler::Equal, ShortJump);
michael@0: 
michael@0:         // Check for 0 / X with X < 0 (results in -0).
michael@0:         masm.ma_b(R0.payloadReg(), Imm32(0), &divTest2, Assembler::NotEqual, ShortJump);
michael@0:         masm.ma_b(R1.payloadReg(), Imm32(0), &failure, Assembler::LessThan, ShortJump);
michael@0:         masm.bind(&divTest2);
michael@0: 
michael@0:         masm.as_div(R0.payloadReg(), R1.payloadReg());
michael@0: 
michael@0:         if (op_ == JSOP_DIV) {
michael@0:             // Result is a double if the remainder != 0.
michael@0:             masm.as_mfhi(scratchReg);
michael@0:             masm.ma_b(scratchReg, Imm32(0), &failure, Assembler::NotEqual, ShortJump);
michael@0:             masm.as_mflo(scratchReg);
michael@0:             masm.tagValue(JSVAL_TYPE_INT32, scratchReg, R0);
michael@0:         } else {
michael@0:             Label done;
michael@0:             // If X % Y == 0 and X < 0, the result is -0.
michael@0:             masm.as_mfhi(scratchReg);
michael@0:             masm.ma_b(scratchReg, Imm32(0), &done, Assembler::NotEqual, ShortJump);
michael@0:             masm.ma_b(R0.payloadReg(), Imm32(0), &failure, Assembler::LessThan, ShortJump);
michael@0:             masm.bind(&done);
michael@0:             masm.tagValue(JSVAL_TYPE_INT32, scratchReg, R0);
michael@0:         }
michael@0:         break;
michael@0:       }
michael@0:       case JSOP_BITOR:
michael@0:         masm.ma_or(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
michael@0:         break;
michael@0:       case JSOP_BITXOR:
michael@0:         masm.ma_xor(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
michael@0:         break;
michael@0:       case JSOP_BITAND:
michael@0:         masm.ma_and(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
michael@0:         break;
michael@0:       case JSOP_LSH:
michael@0:         // MIPS will only use 5 lowest bits in R1 as shift offset.
michael@0:         masm.ma_sll(R0.payloadReg(), R0.payloadReg(), R1.payloadReg());
michael@0:         break;
michael@0:       case JSOP_RSH:
michael@0:         masm.ma_sra(R0.payloadReg(), R0.payloadReg(), R1.payloadReg());
michael@0:         break;
michael@0:       case JSOP_URSH:
michael@0:         masm.ma_srl(scratchReg, R0.payloadReg(), R1.payloadReg());
michael@0:         if (allowDouble_) {
michael@0:             Label toUint;
michael@0:             masm.ma_b(scratchReg, Imm32(0), &toUint, Assembler::LessThan, ShortJump);
michael@0: 
michael@0:             // Move result and box for return.
michael@0:             masm.move32(scratchReg, R0.payloadReg());
michael@0:             EmitReturnFromIC(masm);
michael@0: 
michael@0:             masm.bind(&toUint);
michael@0:             masm.convertUInt32ToDouble(scratchReg, FloatReg1);
michael@0:             masm.boxDouble(FloatReg1, R0);
michael@0:         } else {
michael@0:             masm.ma_b(scratchReg, Imm32(0), &failure, Assembler::LessThan, ShortJump);
michael@0:             // Move result for return.
michael@0:             masm.move32(scratchReg, R0.payloadReg());
michael@0:         }
michael@0:         break;
michael@0:       default:
michael@0:         MOZ_ASSUME_UNREACHABLE("Unhandled op for BinaryArith_Int32.");
michael@0:     }
michael@0: 
michael@0:     EmitReturnFromIC(masm);
michael@0: 
michael@0:     // Failure case - jump to next stub
michael@0:     masm.bind(&failure);
michael@0:     EmitStubGuardFailure(masm);
michael@0: 
michael@0:     return true;
michael@0: }
michael@0: 
michael@0: bool
michael@0: ICUnaryArith_Int32::Compiler::generateStubCode(MacroAssembler &masm)
michael@0: {
michael@0:     Label failure;
michael@0:     masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
michael@0: 
michael@0:     switch (op) {
michael@0:       case JSOP_BITNOT:
michael@0:         masm.not32(R0.payloadReg());
michael@0:         break;
michael@0:       case JSOP_NEG:
michael@0:         // Guard against 0 and MIN_INT, both result in a double.
michael@0:         masm.branchTest32(Assembler::Zero, R0.payloadReg(), Imm32(INT32_MAX), &failure);
michael@0: 
michael@0:         masm.neg32(R0.payloadReg());
michael@0:         break;
michael@0:       default:
michael@0:         MOZ_ASSUME_UNREACHABLE("Unexpected op");
michael@0:         return false;
michael@0:     }
michael@0: 
michael@0:     EmitReturnFromIC(masm);
michael@0: 
michael@0:     masm.bind(&failure);
michael@0:     EmitStubGuardFailure(masm);
michael@0:     return true;
michael@0: }
michael@0: 
michael@0: 
michael@0: } // namespace jit
michael@0: } // namespace js