michael@0: /* Copyright (C) 2007-2009 Xiph.Org Foundation
michael@0:    Copyright (C) 2003-2008 Jean-Marc Valin
michael@0:    Copyright (C) 2007-2008 CSIRO
michael@0:    Copyright (C) 2013      Parrot */
michael@0: /*
michael@0:    Redistribution and use in source and binary forms, with or without
michael@0:    modification, are permitted provided that the following conditions
michael@0:    are met:
michael@0: 
michael@0:    - Redistributions of source code must retain the above copyright
michael@0:    notice, this list of conditions and the following disclaimer.
michael@0: 
michael@0:    - Redistributions in binary form must reproduce the above copyright
michael@0:    notice, this list of conditions and the following disclaimer in the
michael@0:    documentation and/or other materials provided with the distribution.
michael@0: 
michael@0:    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
michael@0:    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
michael@0:    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
michael@0:    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
michael@0:    OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
michael@0:    EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
michael@0:    PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
michael@0:    PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
michael@0:    LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
michael@0:    NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
michael@0:    SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
michael@0: */
michael@0: 
michael@0: #ifndef FIXED_ARMv5E_H
michael@0: #define FIXED_ARMv5E_H
michael@0: 
michael@0: #include "fixed_armv4.h"
michael@0: 
michael@0: /** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 bits */
michael@0: #undef MULT16_32_Q16
michael@0: static OPUS_INLINE opus_val32 MULT16_32_Q16_armv5e(opus_val16 a, opus_val32 b)
michael@0: {
michael@0:   int res;
michael@0:   __asm__(
michael@0:       "#MULT16_32_Q16\n\t"
michael@0:       "smulwb %0, %1, %2\n\t"
michael@0:       : "=r"(res)
michael@0:       : "r"(b),"r"(a)
michael@0:   );
michael@0:   return res;
michael@0: }
michael@0: #define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv5e(a, b))
michael@0: 
michael@0: 
michael@0: /** 16x32 multiplication, followed by a 15-bit shift right. Results fits in 32 bits */
michael@0: #undef MULT16_32_Q15
michael@0: static OPUS_INLINE opus_val32 MULT16_32_Q15_armv5e(opus_val16 a, opus_val32 b)
michael@0: {
michael@0:   int res;
michael@0:   __asm__(
michael@0:       "#MULT16_32_Q15\n\t"
michael@0:       "smulwb %0, %1, %2\n\t"
michael@0:       : "=r"(res)
michael@0:       : "r"(b), "r"(a)
michael@0:   );
michael@0:   return res<<1;
michael@0: }
michael@0: #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv5e(a, b))
michael@0: 
michael@0: 
michael@0: /** 16x32 multiply, followed by a 15-bit shift right and 32-bit add.
michael@0:     b must fit in 31 bits.
michael@0:     Result fits in 32 bits. */
michael@0: #undef MAC16_32_Q15
michael@0: static OPUS_INLINE opus_val32 MAC16_32_Q15_armv5e(opus_val32 c, opus_val16 a,
michael@0:  opus_val32 b)
michael@0: {
michael@0:   int res;
michael@0:   __asm__(
michael@0:       "#MAC16_32_Q15\n\t"
michael@0:       "smlawb %0, %1, %2, %3;\n"
michael@0:       : "=r"(res)
michael@0:       : "r"(b<<1), "r"(a), "r"(c)
michael@0:   );
michael@0:   return res;
michael@0: }
michael@0: #define MAC16_32_Q15(c, a, b) (MAC16_32_Q15_armv5e(c, a, b))
michael@0: 
michael@0: /** 16x16 multiply-add where the result fits in 32 bits */
michael@0: #undef MAC16_16
michael@0: static OPUS_INLINE opus_val32 MAC16_16_armv5e(opus_val32 c, opus_val16 a,
michael@0:  opus_val16 b)
michael@0: {
michael@0:   int res;
michael@0:   __asm__(
michael@0:       "#MAC16_16\n\t"
michael@0:       "smlabb %0, %1, %2, %3;\n"
michael@0:       : "=r"(res)
michael@0:       : "r"(a), "r"(b), "r"(c)
michael@0:   );
michael@0:   return res;
michael@0: }
michael@0: #define MAC16_16(c, a, b) (MAC16_16_armv5e(c, a, b))
michael@0: 
michael@0: /** 16x16 multiplication where the result fits in 32 bits */
michael@0: #undef MULT16_16
michael@0: static OPUS_INLINE opus_val32 MULT16_16_armv5e(opus_val16 a, opus_val16 b)
michael@0: {
michael@0:   int res;
michael@0:   __asm__(
michael@0:       "#MULT16_16\n\t"
michael@0:       "smulbb %0, %1, %2;\n"
michael@0:       : "=r"(res)
michael@0:       : "r"(a), "r"(b)
michael@0:   );
michael@0:   return res;
michael@0: }
michael@0: #define MULT16_16(a, b) (MULT16_16_armv5e(a, b))
michael@0: 
michael@0: #endif