michael@0: /********************************************************************
michael@0:  *                                                                  *
michael@0:  * THIS FILE IS PART OF THE OggTheora SOFTWARE CODEC SOURCE CODE.   *
michael@0:  * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS     *
michael@0:  * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE *
michael@0:  * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING.       *
michael@0:  *                                                                  *
michael@0:  * THE Theora SOURCE CODE IS COPYRIGHT (C) 2002-2009                *
michael@0:  * by the Xiph.Org Foundation and contributors http://www.xiph.org/ *
michael@0:  *                                                                  *
michael@0:  ********************************************************************
michael@0: 
michael@0:   function:
michael@0:     last mod: $Id: x86state.c 17421 2010-09-22 16:46:18Z giles $
michael@0: 
michael@0:  ********************************************************************/
michael@0: 
michael@0: #include "x86int.h"
michael@0: 
michael@0: #if defined(OC_X86_ASM)
michael@0: 
michael@0: /*This table has been modified from OC_FZIG_ZAG by baking a 4x4 transpose into
michael@0:    each quadrant of the destination.*/
michael@0: static const unsigned char OC_FZIG_ZAG_MMX[128]={
michael@0:    0, 8, 1, 2, 9,16,24,17,
michael@0:   10, 3,32,11,18,25, 4,12,
michael@0:    5,26,19,40,33,34,41,48,
michael@0:   27, 6,13,20,28,21,14, 7,
michael@0:   56,49,42,35,43,50,57,36,
michael@0:   15,22,29,30,23,44,37,58,
michael@0:   51,59,38,45,52,31,60,53,
michael@0:   46,39,47,54,61,62,55,63,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64
michael@0: };
michael@0: 
michael@0: /*This table has been modified from OC_FZIG_ZAG by baking an 8x8 transpose into
michael@0:    the destination.*/
michael@0: static const unsigned char OC_FZIG_ZAG_SSE2[128]={
michael@0:    0, 8, 1, 2, 9,16,24,17,
michael@0:   10, 3, 4,11,18,25,32,40,
michael@0:   33,26,19,12, 5, 6,13,20,
michael@0:   27,34,41,48,56,49,42,35,
michael@0:   28,21,14, 7,15,22,29,36,
michael@0:   43,50,57,58,51,44,37,30,
michael@0:   23,31,38,45,52,59,60,53,
michael@0:   46,39,47,54,61,62,55,63,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64,
michael@0:   64,64,64,64,64,64,64,64
michael@0: };
michael@0: 
michael@0: void oc_state_accel_init_x86(oc_theora_state *_state){
michael@0:   oc_state_accel_init_c(_state);
michael@0:   _state->cpu_flags=oc_cpu_flags_get();
michael@0: # if defined(OC_STATE_USE_VTABLE)
michael@0:   if(_state->cpu_flags&OC_CPU_X86_MMX){
michael@0:     _state->opt_vtable.frag_copy=oc_frag_copy_mmx;
michael@0:     _state->opt_vtable.frag_copy_list=oc_frag_copy_list_mmx;
michael@0:     _state->opt_vtable.frag_recon_intra=oc_frag_recon_intra_mmx;
michael@0:     _state->opt_vtable.frag_recon_inter=oc_frag_recon_inter_mmx;
michael@0:     _state->opt_vtable.frag_recon_inter2=oc_frag_recon_inter2_mmx;
michael@0:     _state->opt_vtable.idct8x8=oc_idct8x8_mmx;
michael@0:     _state->opt_vtable.state_frag_recon=oc_state_frag_recon_mmx;
michael@0:     _state->opt_vtable.loop_filter_init=oc_loop_filter_init_mmx;
michael@0:     _state->opt_vtable.state_loop_filter_frag_rows=
michael@0:      oc_state_loop_filter_frag_rows_mmx;
michael@0:     _state->opt_vtable.restore_fpu=oc_restore_fpu_mmx;
michael@0:     _state->opt_data.dct_fzig_zag=OC_FZIG_ZAG_MMX;
michael@0:   }
michael@0:   if(_state->cpu_flags&OC_CPU_X86_MMXEXT){
michael@0:     _state->opt_vtable.loop_filter_init=oc_loop_filter_init_mmxext;
michael@0:     _state->opt_vtable.state_loop_filter_frag_rows=
michael@0:      oc_state_loop_filter_frag_rows_mmxext;
michael@0:   }
michael@0:   if(_state->cpu_flags&OC_CPU_X86_SSE2){
michael@0:     _state->opt_vtable.idct8x8=oc_idct8x8_sse2;
michael@0: # endif
michael@0:     _state->opt_data.dct_fzig_zag=OC_FZIG_ZAG_SSE2;
michael@0: # if defined(OC_STATE_USE_VTABLE)
michael@0:   }
michael@0: # endif
michael@0: }
michael@0: #endif