michael@0: /* michael@0: * Copyright 2012 The LibYuv Project Authors. All rights reserved. michael@0: * michael@0: * Use of this source code is governed by a BSD-style license michael@0: * that can be found in the LICENSE file in the root of the source michael@0: * tree. An additional intellectual property rights grant can be found michael@0: * in the file PATENTS. All contributing project authors may michael@0: * be found in the AUTHORS file in the root of the source tree. michael@0: */ michael@0: michael@0: #include michael@0: #include michael@0: #include michael@0: michael@0: #define INCLUDE_LIBYUV_COMPARE_H_ michael@0: #include "libyuv.h" michael@0: #include "./psnr.h" michael@0: #include "./ssim.h" michael@0: michael@0: int main(int argc, const char* argv[]) { michael@0: int cpu_flags = TestCpuFlag(-1); michael@0: int has_arm = TestCpuFlag(kCpuHasARM); michael@0: int has_mips = TestCpuFlag(kCpuHasMIPS); michael@0: int has_x86 = TestCpuFlag(kCpuHasX86); michael@0: #if defined(__i386__) || defined(__x86_64__) || \ michael@0: defined(_M_IX86) || defined(_M_X64) michael@0: if (has_x86) { michael@0: uint32 family, model, cpu_info[4]; michael@0: // Vendor ID: michael@0: // AuthenticAMD AMD processor michael@0: // CentaurHauls Centaur processor michael@0: // CyrixInstead Cyrix processor michael@0: // GenuineIntel Intel processor michael@0: // GenuineTMx86 Transmeta processor michael@0: // Geode by NSC National Semiconductor processor michael@0: // NexGenDriven NexGen processor michael@0: // RiseRiseRise Rise Technology processor michael@0: // SiS SiS SiS SiS processor michael@0: // UMC UMC UMC UMC processor michael@0: CpuId(0, 0, &cpu_info[0]); michael@0: cpu_info[0] = cpu_info[1]; // Reorder output michael@0: cpu_info[1] = cpu_info[3]; michael@0: cpu_info[3] = 0; michael@0: printf("Cpu Vendor: %s\n", (char*)(&cpu_info[0])); michael@0: michael@0: // CPU Family and Model michael@0: // 3:0 - Stepping michael@0: // 7:4 - Model michael@0: // 11:8 - Family michael@0: // 13:12 - Processor Type michael@0: // 19:16 - Extended Model michael@0: // 27:20 - Extended Family michael@0: CpuId(1, 0, &cpu_info[0]); michael@0: family = ((cpu_info[0] >> 8) & 0x0f) | ((cpu_info[0] >> 16) & 0xff0); michael@0: model = ((cpu_info[0] >> 4) & 0x0f) | ((cpu_info[0] >> 12) & 0xf0); michael@0: printf("Cpu Family %d (0x%x), Model %d (0x%x)\n", family, family, michael@0: model, model); michael@0: } michael@0: #endif michael@0: printf("Cpu Flags %x\n", cpu_flags); michael@0: printf("Has ARM %x\n", has_arm); michael@0: printf("Has MIPS %x\n", has_mips); michael@0: printf("Has X86 %x\n", has_x86); michael@0: if (has_arm) { michael@0: int has_neon = TestCpuFlag(kCpuHasNEON); michael@0: printf("Has NEON %x\n", has_neon); michael@0: } michael@0: if (has_mips) { michael@0: int has_mips_dsp = TestCpuFlag(kCpuHasMIPS_DSP); michael@0: int has_mips_dspr2 = TestCpuFlag(kCpuHasMIPS_DSPR2); michael@0: printf("Has MIPS DSP %x\n", has_mips_dsp); michael@0: printf("Has MIPS DSPR2 %x\n", has_mips_dspr2); michael@0: } michael@0: if (has_x86) { michael@0: int has_sse2 = TestCpuFlag(kCpuHasSSE2); michael@0: int has_ssse3 = TestCpuFlag(kCpuHasSSSE3); michael@0: int has_sse41 = TestCpuFlag(kCpuHasSSE41); michael@0: int has_sse42 = TestCpuFlag(kCpuHasSSE42); michael@0: int has_avx = TestCpuFlag(kCpuHasAVX); michael@0: int has_avx2 = TestCpuFlag(kCpuHasAVX2); michael@0: int has_erms = TestCpuFlag(kCpuHasERMS); michael@0: int has_fma3 = TestCpuFlag(kCpuHasFMA3); michael@0: printf("Has SSE2 %x\n", has_sse2); michael@0: printf("Has SSSE3 %x\n", has_ssse3); michael@0: printf("Has SSE4.1 %x\n", has_sse41); michael@0: printf("Has SSE4.2 %x\n", has_sse42); michael@0: printf("Has AVX %x\n", has_avx); michael@0: printf("Has AVX2 %x\n", has_avx2); michael@0: printf("Has ERMS %x\n", has_erms); michael@0: printf("Has FMA3 %x\n", has_fma3); michael@0: } michael@0: return 0; michael@0: } michael@0: