michael@0: // Copyright (c) 2012 The Chromium Authors. All rights reserved. michael@0: // Use of this source code is governed by a BSD-style license that can be michael@0: // found in the LICENSE file. michael@0: michael@0: #include "base/cpu.h" michael@0: michael@0: #include michael@0: michael@0: #include michael@0: michael@0: #include "build/build_config.h" michael@0: michael@0: #if defined(ARCH_CPU_X86_FAMILY) michael@0: #if defined(_MSC_VER) michael@0: #include michael@0: #endif michael@0: #endif michael@0: michael@0: namespace base { michael@0: michael@0: CPU::CPU() michael@0: : signature_(0), michael@0: type_(0), michael@0: family_(0), michael@0: model_(0), michael@0: stepping_(0), michael@0: ext_model_(0), michael@0: ext_family_(0), michael@0: has_mmx_(false), michael@0: has_sse_(false), michael@0: has_sse2_(false), michael@0: has_sse3_(false), michael@0: has_ssse3_(false), michael@0: has_sse41_(false), michael@0: has_sse42_(false), michael@0: has_non_stop_time_stamp_counter_(false), michael@0: cpu_vendor_("unknown") { michael@0: Initialize(); michael@0: } michael@0: michael@0: #if defined(ARCH_CPU_X86_FAMILY) michael@0: #ifndef _MSC_VER michael@0: michael@0: #if defined(__pic__) && defined(__i386__) michael@0: michael@0: void __cpuid(int cpu_info[4], int info_type) { michael@0: __asm__ volatile ( michael@0: "mov %%ebx, %%edi\n" michael@0: "cpuid\n" michael@0: "xchg %%edi, %%ebx\n" michael@0: : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) michael@0: : "a"(info_type) michael@0: ); michael@0: } michael@0: michael@0: void __cpuidex(int cpu_info[4], int info_type, int info_index) { michael@0: __asm__ volatile ( michael@0: "mov %%ebx, %%edi\n" michael@0: "cpuid\n" michael@0: "xchg %%edi, %%ebx\n" michael@0: : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) michael@0: : "a"(info_type), "c"(info_index) michael@0: ); michael@0: } michael@0: michael@0: #else michael@0: michael@0: void __cpuid(int cpu_info[4], int info_type) { michael@0: __asm__ volatile ( michael@0: "cpuid \n\t" michael@0: : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) michael@0: : "a"(info_type) michael@0: ); michael@0: } michael@0: michael@0: void __cpuidex(int cpu_info[4], int info_type, int info_index) { michael@0: __asm__ volatile ( michael@0: "cpuid \n\t" michael@0: : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) michael@0: : "a"(info_type), "c"(info_index) michael@0: ); michael@0: } michael@0: michael@0: #endif michael@0: #endif // _MSC_VER michael@0: #endif // ARCH_CPU_X86_FAMILY michael@0: michael@0: void CPU::Initialize() { michael@0: #if defined(ARCH_CPU_X86_FAMILY) michael@0: int cpu_info[4] = {-1}; michael@0: char cpu_string[48]; michael@0: michael@0: // __cpuid with an InfoType argument of 0 returns the number of michael@0: // valid Ids in CPUInfo[0] and the CPU identification string in michael@0: // the other three array elements. The CPU identification string is michael@0: // not in linear order. The code below arranges the information michael@0: // in a human readable form. The human readable order is CPUInfo[1] | michael@0: // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped michael@0: // before using memcpy to copy these three array elements to cpu_string. michael@0: __cpuid(cpu_info, 0); michael@0: int num_ids = cpu_info[0]; michael@0: std::swap(cpu_info[2], cpu_info[3]); michael@0: memcpy(cpu_string, &cpu_info[1], 3 * sizeof(cpu_info[1])); michael@0: cpu_vendor_.assign(cpu_string, 3 * sizeof(cpu_info[1])); michael@0: michael@0: // Interpret CPU feature information. michael@0: if (num_ids > 0) { michael@0: __cpuid(cpu_info, 1); michael@0: signature_ = cpu_info[0]; michael@0: stepping_ = cpu_info[0] & 0xf; michael@0: model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0); michael@0: family_ = (cpu_info[0] >> 8) & 0xf; michael@0: type_ = (cpu_info[0] >> 12) & 0x3; michael@0: ext_model_ = (cpu_info[0] >> 16) & 0xf; michael@0: ext_family_ = (cpu_info[0] >> 20) & 0xff; michael@0: has_mmx_ = (cpu_info[3] & 0x00800000) != 0; michael@0: has_sse_ = (cpu_info[3] & 0x02000000) != 0; michael@0: has_sse2_ = (cpu_info[3] & 0x04000000) != 0; michael@0: has_sse3_ = (cpu_info[2] & 0x00000001) != 0; michael@0: has_ssse3_ = (cpu_info[2] & 0x00000200) != 0; michael@0: has_sse41_ = (cpu_info[2] & 0x00080000) != 0; michael@0: has_sse42_ = (cpu_info[2] & 0x00100000) != 0; michael@0: has_avx_ = (cpu_info[2] & 0x10000000) != 0; michael@0: } michael@0: michael@0: // Get the brand string of the cpu. michael@0: __cpuid(cpu_info, 0x80000000); michael@0: const int parameter_end = 0x80000004; michael@0: int max_parameter = cpu_info[0]; michael@0: michael@0: if (cpu_info[0] >= parameter_end) { michael@0: char* cpu_string_ptr = cpu_string; michael@0: michael@0: for (int parameter = 0x80000002; parameter <= parameter_end && michael@0: cpu_string_ptr < &cpu_string[sizeof(cpu_string)]; parameter++) { michael@0: __cpuid(cpu_info, parameter); michael@0: memcpy(cpu_string_ptr, cpu_info, sizeof(cpu_info)); michael@0: cpu_string_ptr += sizeof(cpu_info); michael@0: } michael@0: cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string); michael@0: } michael@0: michael@0: const int parameter_containing_non_stop_time_stamp_counter = 0x80000007; michael@0: if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) { michael@0: __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter); michael@0: has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0; michael@0: } michael@0: #endif michael@0: } michael@0: michael@0: CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const { michael@0: if (has_avx()) return AVX; michael@0: if (has_sse42()) return SSE42; michael@0: if (has_sse41()) return SSE41; michael@0: if (has_ssse3()) return SSSE3; michael@0: if (has_sse3()) return SSE3; michael@0: if (has_sse2()) return SSE2; michael@0: if (has_sse()) return SSE; michael@0: return PENTIUM; michael@0: } michael@0: michael@0: } // namespace base