michael@0: ; michael@0: ; Copyright (c) 2010 The WebM project authors. All Rights Reserved. michael@0: ; michael@0: ; Use of this source code is governed by a BSD-style license michael@0: ; that can be found in the LICENSE file in the root of the source michael@0: ; tree. An additional intellectual property rights grant can be found michael@0: ; in the file PATENTS. All contributing project authors may michael@0: ; be found in the AUTHORS file in the root of the source tree. michael@0: ; michael@0: michael@0: EXPORT |vp8_subtract_b_neon| michael@0: EXPORT |vp8_subtract_mby_neon| michael@0: EXPORT |vp8_subtract_mbuv_neon| michael@0: michael@0: INCLUDE vp8_asm_enc_offsets.asm michael@0: michael@0: ARM michael@0: REQUIRE8 michael@0: PRESERVE8 michael@0: michael@0: AREA ||.text||, CODE, READONLY, ALIGN=2 michael@0: michael@0: ;void vp8_subtract_b_neon(BLOCK *be, BLOCKD *bd, int pitch) michael@0: |vp8_subtract_b_neon| PROC michael@0: michael@0: stmfd sp!, {r4-r7} michael@0: michael@0: ldr r3, [r0, #vp8_block_base_src] michael@0: ldr r4, [r0, #vp8_block_src] michael@0: ldr r5, [r0, #vp8_block_src_diff] michael@0: ldr r3, [r3] michael@0: ldr r6, [r0, #vp8_block_src_stride] michael@0: add r3, r3, r4 ; src = *base_src + src michael@0: ldr r7, [r1, #vp8_blockd_predictor] michael@0: michael@0: vld1.8 {d0}, [r3], r6 ;load src michael@0: vld1.8 {d1}, [r7], r2 ;load pred michael@0: vld1.8 {d2}, [r3], r6 michael@0: vld1.8 {d3}, [r7], r2 michael@0: vld1.8 {d4}, [r3], r6 michael@0: vld1.8 {d5}, [r7], r2 michael@0: vld1.8 {d6}, [r3], r6 michael@0: vld1.8 {d7}, [r7], r2 michael@0: michael@0: vsubl.u8 q10, d0, d1 michael@0: vsubl.u8 q11, d2, d3 michael@0: vsubl.u8 q12, d4, d5 michael@0: vsubl.u8 q13, d6, d7 michael@0: michael@0: mov r2, r2, lsl #1 michael@0: michael@0: vst1.16 {d20}, [r5], r2 ;store diff michael@0: vst1.16 {d22}, [r5], r2 michael@0: vst1.16 {d24}, [r5], r2 michael@0: vst1.16 {d26}, [r5], r2 michael@0: michael@0: ldmfd sp!, {r4-r7} michael@0: bx lr michael@0: michael@0: ENDP michael@0: michael@0: michael@0: ;========================================== michael@0: ;void vp8_subtract_mby_neon(short *diff, unsigned char *src, int src_stride michael@0: ; unsigned char *pred, int pred_stride) michael@0: |vp8_subtract_mby_neon| PROC michael@0: push {r4-r7} michael@0: mov r12, #4 michael@0: ldr r4, [sp, #16] ; pred_stride michael@0: mov r6, #32 ; "diff" stride x2 michael@0: add r5, r0, #16 ; second diff pointer michael@0: michael@0: subtract_mby_loop michael@0: vld1.8 {q0}, [r1], r2 ;load src michael@0: vld1.8 {q1}, [r3], r4 ;load pred michael@0: vld1.8 {q2}, [r1], r2 michael@0: vld1.8 {q3}, [r3], r4 michael@0: vld1.8 {q4}, [r1], r2 michael@0: vld1.8 {q5}, [r3], r4 michael@0: vld1.8 {q6}, [r1], r2 michael@0: vld1.8 {q7}, [r3], r4 michael@0: michael@0: vsubl.u8 q8, d0, d2 michael@0: vsubl.u8 q9, d1, d3 michael@0: vsubl.u8 q10, d4, d6 michael@0: vsubl.u8 q11, d5, d7 michael@0: vsubl.u8 q12, d8, d10 michael@0: vsubl.u8 q13, d9, d11 michael@0: vsubl.u8 q14, d12, d14 michael@0: vsubl.u8 q15, d13, d15 michael@0: michael@0: vst1.16 {q8}, [r0], r6 ;store diff michael@0: vst1.16 {q9}, [r5], r6 michael@0: vst1.16 {q10}, [r0], r6 michael@0: vst1.16 {q11}, [r5], r6 michael@0: vst1.16 {q12}, [r0], r6 michael@0: vst1.16 {q13}, [r5], r6 michael@0: vst1.16 {q14}, [r0], r6 michael@0: vst1.16 {q15}, [r5], r6 michael@0: michael@0: subs r12, r12, #1 michael@0: bne subtract_mby_loop michael@0: michael@0: pop {r4-r7} michael@0: bx lr michael@0: ENDP michael@0: michael@0: ;================================= michael@0: ;void vp8_subtract_mbuv_c(short *diff, unsigned char *usrc, unsigned char *vsrc, michael@0: ; int src_stride, unsigned char *upred, michael@0: ; unsigned char *vpred, int pred_stride) michael@0: michael@0: |vp8_subtract_mbuv_neon| PROC michael@0: push {r4-r7} michael@0: ldr r4, [sp, #16] ; upred michael@0: ldr r5, [sp, #20] ; vpred michael@0: ldr r6, [sp, #24] ; pred_stride michael@0: add r0, r0, #512 ; short *udiff = diff + 256; michael@0: mov r12, #32 ; "diff" stride x2 michael@0: add r7, r0, #16 ; second diff pointer michael@0: michael@0: ;u michael@0: vld1.8 {d0}, [r1], r3 ;load usrc michael@0: vld1.8 {d1}, [r4], r6 ;load upred michael@0: vld1.8 {d2}, [r1], r3 michael@0: vld1.8 {d3}, [r4], r6 michael@0: vld1.8 {d4}, [r1], r3 michael@0: vld1.8 {d5}, [r4], r6 michael@0: vld1.8 {d6}, [r1], r3 michael@0: vld1.8 {d7}, [r4], r6 michael@0: vld1.8 {d8}, [r1], r3 michael@0: vld1.8 {d9}, [r4], r6 michael@0: vld1.8 {d10}, [r1], r3 michael@0: vld1.8 {d11}, [r4], r6 michael@0: vld1.8 {d12}, [r1], r3 michael@0: vld1.8 {d13}, [r4], r6 michael@0: vld1.8 {d14}, [r1], r3 michael@0: vld1.8 {d15}, [r4], r6 michael@0: michael@0: vsubl.u8 q8, d0, d1 michael@0: vsubl.u8 q9, d2, d3 michael@0: vsubl.u8 q10, d4, d5 michael@0: vsubl.u8 q11, d6, d7 michael@0: vsubl.u8 q12, d8, d9 michael@0: vsubl.u8 q13, d10, d11 michael@0: vsubl.u8 q14, d12, d13 michael@0: vsubl.u8 q15, d14, d15 michael@0: michael@0: vst1.16 {q8}, [r0], r12 ;store diff michael@0: vst1.16 {q9}, [r7], r12 michael@0: vst1.16 {q10}, [r0], r12 michael@0: vst1.16 {q11}, [r7], r12 michael@0: vst1.16 {q12}, [r0], r12 michael@0: vst1.16 {q13}, [r7], r12 michael@0: vst1.16 {q14}, [r0], r12 michael@0: vst1.16 {q15}, [r7], r12 michael@0: michael@0: ;v michael@0: vld1.8 {d0}, [r2], r3 ;load vsrc michael@0: vld1.8 {d1}, [r5], r6 ;load vpred michael@0: vld1.8 {d2}, [r2], r3 michael@0: vld1.8 {d3}, [r5], r6 michael@0: vld1.8 {d4}, [r2], r3 michael@0: vld1.8 {d5}, [r5], r6 michael@0: vld1.8 {d6}, [r2], r3 michael@0: vld1.8 {d7}, [r5], r6 michael@0: vld1.8 {d8}, [r2], r3 michael@0: vld1.8 {d9}, [r5], r6 michael@0: vld1.8 {d10}, [r2], r3 michael@0: vld1.8 {d11}, [r5], r6 michael@0: vld1.8 {d12}, [r2], r3 michael@0: vld1.8 {d13}, [r5], r6 michael@0: vld1.8 {d14}, [r2], r3 michael@0: vld1.8 {d15}, [r5], r6 michael@0: michael@0: vsubl.u8 q8, d0, d1 michael@0: vsubl.u8 q9, d2, d3 michael@0: vsubl.u8 q10, d4, d5 michael@0: vsubl.u8 q11, d6, d7 michael@0: vsubl.u8 q12, d8, d9 michael@0: vsubl.u8 q13, d10, d11 michael@0: vsubl.u8 q14, d12, d13 michael@0: vsubl.u8 q15, d14, d15 michael@0: michael@0: vst1.16 {q8}, [r0], r12 ;store diff michael@0: vst1.16 {q9}, [r7], r12 michael@0: vst1.16 {q10}, [r0], r12 michael@0: vst1.16 {q11}, [r7], r12 michael@0: vst1.16 {q12}, [r0], r12 michael@0: vst1.16 {q13}, [r7], r12 michael@0: vst1.16 {q14}, [r0], r12 michael@0: vst1.16 {q15}, [r7], r12 michael@0: michael@0: pop {r4-r7} michael@0: bx lr michael@0: michael@0: ENDP michael@0: michael@0: END