michael@0: /* michael@0: * Copyright (c) 2010 The WebM project authors. All Rights Reserved. michael@0: * michael@0: * Use of this source code is governed by a BSD-style license michael@0: * that can be found in the LICENSE file in the root of the source michael@0: * tree. An additional intellectual property rights grant can be found michael@0: * in the file PATENTS. All contributing project authors may michael@0: * be found in the AUTHORS file in the root of the source tree. michael@0: */ michael@0: michael@0: michael@0: #ifndef VPX_PORTS_X86_H michael@0: #define VPX_PORTS_X86_H michael@0: #include michael@0: #include "vpx_config.h" michael@0: michael@0: typedef enum { michael@0: VPX_CPU_UNKNOWN = -1, michael@0: VPX_CPU_AMD, michael@0: VPX_CPU_AMD_OLD, michael@0: VPX_CPU_CENTAUR, michael@0: VPX_CPU_CYRIX, michael@0: VPX_CPU_INTEL, michael@0: VPX_CPU_NEXGEN, michael@0: VPX_CPU_NSC, michael@0: VPX_CPU_RISE, michael@0: VPX_CPU_SIS, michael@0: VPX_CPU_TRANSMETA, michael@0: VPX_CPU_TRANSMETA_OLD, michael@0: VPX_CPU_UMC, michael@0: VPX_CPU_VIA, michael@0: michael@0: VPX_CPU_LAST michael@0: } vpx_cpu_t; michael@0: michael@0: #if defined(__GNUC__) && __GNUC__ || defined(__ANDROID__) michael@0: #if ARCH_X86_64 michael@0: #define cpuid(func,ax,bx,cx,dx)\ michael@0: __asm__ __volatile__ (\ michael@0: "cpuid \n\t" \ michael@0: : "=a" (ax), "=b" (bx), "=c" (cx), "=d" (dx) \ michael@0: : "a" (func)); michael@0: #else michael@0: #define cpuid(func,ax,bx,cx,dx)\ michael@0: __asm__ __volatile__ (\ michael@0: "mov %%ebx, %%edi \n\t" \ michael@0: "cpuid \n\t" \ michael@0: "xchg %%edi, %%ebx \n\t" \ michael@0: : "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \ michael@0: : "a" (func)); michael@0: #endif michael@0: #elif defined(__SUNPRO_C) || defined(__SUNPRO_CC) /* end __GNUC__ or __ANDROID__*/ michael@0: #if ARCH_X86_64 michael@0: #define cpuid(func,ax,bx,cx,dx)\ michael@0: asm volatile (\ michael@0: "xchg %rsi, %rbx \n\t" \ michael@0: "cpuid \n\t" \ michael@0: "movl %ebx, %edi \n\t" \ michael@0: "xchg %rsi, %rbx \n\t" \ michael@0: : "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \ michael@0: : "a" (func)); michael@0: #else michael@0: #define cpuid(func,ax,bx,cx,dx)\ michael@0: asm volatile (\ michael@0: "pushl %ebx \n\t" \ michael@0: "cpuid \n\t" \ michael@0: "movl %ebx, %edi \n\t" \ michael@0: "popl %ebx \n\t" \ michael@0: : "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \ michael@0: : "a" (func)); michael@0: #endif michael@0: #else /* end __SUNPRO__ */ michael@0: #if ARCH_X86_64 michael@0: void __cpuid(int CPUInfo[4], int info_type); michael@0: #pragma intrinsic(__cpuid) michael@0: #define cpuid(func,a,b,c,d) do{\ michael@0: int regs[4];\ michael@0: __cpuid(regs,func); a=regs[0]; b=regs[1]; c=regs[2]; d=regs[3];\ michael@0: } while(0) michael@0: #else michael@0: #define cpuid(func,a,b,c,d)\ michael@0: __asm mov eax, func\ michael@0: __asm cpuid\ michael@0: __asm mov a, eax\ michael@0: __asm mov b, ebx\ michael@0: __asm mov c, ecx\ michael@0: __asm mov d, edx michael@0: #endif michael@0: #endif /* end others */ michael@0: michael@0: #define HAS_MMX 0x01 michael@0: #define HAS_SSE 0x02 michael@0: #define HAS_SSE2 0x04 michael@0: #define HAS_SSE3 0x08 michael@0: #define HAS_SSSE3 0x10 michael@0: #define HAS_SSE4_1 0x20 michael@0: #define HAS_AVX 0x40 michael@0: #define HAS_AVX2 0x80 michael@0: #ifndef BIT michael@0: #define BIT(n) (1<