michael@0: /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
michael@0:  * vim: set ts=8 sts=4 et sw=4 tw=99:
michael@0:  * This Source Code Form is subject to the terms of the Mozilla Public
michael@0:  * License, v. 2.0. If a copy of the MPL was not distributed with this
michael@0:  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
michael@0: 
michael@0: #include "jit/BaselineCompiler.h"
michael@0: #include "jit/BaselineHelpers.h"
michael@0: #include "jit/BaselineIC.h"
michael@0: #include "jit/BaselineJIT.h"
michael@0: #include "jit/IonLinker.h"
michael@0: 
michael@0: using namespace js;
michael@0: using namespace js::jit;
michael@0: 
michael@0: namespace js {
michael@0: namespace jit {
michael@0: 
michael@0: // ICCompare_Int32
michael@0: 
michael@0: bool
michael@0: ICCompare_Int32::Compiler::generateStubCode(MacroAssembler &masm)
michael@0: {
michael@0:     // Guard that R0 is an integer and R1 is an integer.
michael@0:     Label failure;
michael@0:     masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
michael@0:     masm.branchTestInt32(Assembler::NotEqual, R1, &failure);
michael@0: 
michael@0:     // Compare payload regs of R0 and R1.
michael@0:     Assembler::Condition cond = JSOpToCondition(op, /* signed = */true);
michael@0:     masm.cmp32(R0.payloadReg(), R1.payloadReg());
michael@0:     masm.ma_mov(Imm32(1), R0.payloadReg(), NoSetCond, cond);
michael@0:     masm.ma_mov(Imm32(0), R0.payloadReg(), NoSetCond, Assembler::InvertCondition(cond));
michael@0: 
michael@0:     // Result is implicitly boxed already.
michael@0:     masm.tagValue(JSVAL_TYPE_BOOLEAN, R0.payloadReg(), R0);
michael@0:     EmitReturnFromIC(masm);
michael@0: 
michael@0:     // Failure case - jump to next stub
michael@0:     masm.bind(&failure);
michael@0:     EmitStubGuardFailure(masm);
michael@0: 
michael@0:     return true;
michael@0: }
michael@0: 
michael@0: bool
michael@0: ICCompare_Double::Compiler::generateStubCode(MacroAssembler &masm)
michael@0: {
michael@0:     Label failure, isNaN;
michael@0:     masm.ensureDouble(R0, FloatReg0, &failure);
michael@0:     masm.ensureDouble(R1, FloatReg1, &failure);
michael@0: 
michael@0:     Register dest = R0.scratchReg();
michael@0: 
michael@0:     Assembler::DoubleCondition doubleCond = JSOpToDoubleCondition(op);
michael@0:     Assembler::Condition cond = Assembler::ConditionFromDoubleCondition(doubleCond);
michael@0: 
michael@0:     masm.compareDouble(FloatReg0, FloatReg1);
michael@0:     masm.ma_mov(Imm32(0), dest);
michael@0:     masm.ma_mov(Imm32(1), dest, NoSetCond, cond);
michael@0: 
michael@0:     masm.tagValue(JSVAL_TYPE_BOOLEAN, dest, R0);
michael@0:     EmitReturnFromIC(masm);
michael@0: 
michael@0:     // Failure case - jump to next stub
michael@0:     masm.bind(&failure);
michael@0:     EmitStubGuardFailure(masm);
michael@0:     return true;
michael@0: }
michael@0: 
michael@0: // ICBinaryArith_Int32
michael@0: 
michael@0: extern "C" {
michael@0:     extern int64_t __aeabi_idivmod(int,int);
michael@0: }
michael@0: 
michael@0: bool
michael@0: ICBinaryArith_Int32::Compiler::generateStubCode(MacroAssembler &masm)
michael@0: {
michael@0:     // Guard that R0 is an integer and R1 is an integer.
michael@0:     Label failure;
michael@0:     masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
michael@0:     masm.branchTestInt32(Assembler::NotEqual, R1, &failure);
michael@0: 
michael@0:     // Add R0 and R1.  Don't need to explicitly unbox, just use R2's payloadReg.
michael@0:     Register scratchReg = R2.payloadReg();
michael@0: 
michael@0:     // DIV and MOD need an extra non-volatile ValueOperand to hold R0.
michael@0:     GeneralRegisterSet savedRegs = availableGeneralRegs(2);
michael@0:     savedRegs = GeneralRegisterSet::Intersect(GeneralRegisterSet::NonVolatile(), savedRegs);
michael@0:     ValueOperand savedValue = savedRegs.takeAnyValue();
michael@0: 
michael@0:     Label maybeNegZero, revertRegister;
michael@0:     switch(op_) {
michael@0:       case JSOP_ADD:
michael@0:         masm.ma_add(R0.payloadReg(), R1.payloadReg(), scratchReg, SetCond);
michael@0: 
michael@0:         // Just jump to failure on overflow.  R0 and R1 are preserved, so we can just jump to
michael@0:         // the next stub.
michael@0:         masm.j(Assembler::Overflow, &failure);
michael@0: 
michael@0:         // Box the result and return.  We know R0.typeReg() already contains the integer
michael@0:         // tag, so we just need to move the result value into place.
michael@0:         masm.mov(scratchReg, R0.payloadReg());
michael@0:         break;
michael@0:       case JSOP_SUB:
michael@0:         masm.ma_sub(R0.payloadReg(), R1.payloadReg(), scratchReg, SetCond);
michael@0:         masm.j(Assembler::Overflow, &failure);
michael@0:         masm.mov(scratchReg, R0.payloadReg());
michael@0:         break;
michael@0:       case JSOP_MUL: {
michael@0:         Assembler::Condition cond = masm.ma_check_mul(R0.payloadReg(), R1.payloadReg(), scratchReg,
michael@0:                                                       Assembler::Overflow);
michael@0:         masm.j(cond, &failure);
michael@0: 
michael@0:         masm.ma_cmp(scratchReg, Imm32(0));
michael@0:         masm.j(Assembler::Equal, &maybeNegZero);
michael@0: 
michael@0:         masm.mov(scratchReg, R0.payloadReg());
michael@0:         break;
michael@0:       }
michael@0:       case JSOP_DIV:
michael@0:       case JSOP_MOD: {
michael@0:         // Check for INT_MIN / -1, it results in a double.
michael@0:         masm.ma_cmp(R0.payloadReg(), Imm32(INT_MIN));
michael@0:         masm.ma_cmp(R1.payloadReg(), Imm32(-1), Assembler::Equal);
michael@0:         masm.j(Assembler::Equal, &failure);
michael@0: 
michael@0:         // Check for both division by zero and 0 / X with X < 0 (results in -0).
michael@0:         masm.ma_cmp(R1.payloadReg(), Imm32(0));
michael@0:         masm.ma_cmp(R0.payloadReg(), Imm32(0), Assembler::LessThan);
michael@0:         masm.j(Assembler::Equal, &failure);
michael@0: 
michael@0:         // The call will preserve registers r4-r11. Save R0 and the link register.
michael@0:         JS_ASSERT(R1 == ValueOperand(r5, r4));
michael@0:         JS_ASSERT(R0 == ValueOperand(r3, r2));
michael@0:         masm.moveValue(R0, savedValue);
michael@0: 
michael@0:         masm.setupAlignedABICall(2);
michael@0:         masm.passABIArg(R0.payloadReg());
michael@0:         masm.passABIArg(R1.payloadReg());
michael@0:         masm.callWithABI(JS_FUNC_TO_DATA_PTR(void *, __aeabi_idivmod));
michael@0: 
michael@0:         // idivmod returns the quotient in r0, and the remainder in r1.
michael@0:         if (op_ == JSOP_DIV) {
michael@0:             // Result is a double if the remainder != 0.
michael@0:             masm.branch32(Assembler::NotEqual, r1, Imm32(0), &revertRegister);
michael@0:             masm.tagValue(JSVAL_TYPE_INT32, r0, R0);
michael@0:         } else {
michael@0:             // If X % Y == 0 and X < 0, the result is -0.
michael@0:             Label done;
michael@0:             masm.branch32(Assembler::NotEqual, r1, Imm32(0), &done);
michael@0:             masm.branch32(Assembler::LessThan, savedValue.payloadReg(), Imm32(0), &revertRegister);
michael@0:             masm.bind(&done);
michael@0:             masm.tagValue(JSVAL_TYPE_INT32, r1, R0);
michael@0:         }
michael@0:         break;
michael@0:       }
michael@0:       case JSOP_BITOR:
michael@0:         masm.ma_orr(R1.payloadReg(), R0.payloadReg(), R0.payloadReg());
michael@0:         break;
michael@0:       case JSOP_BITXOR:
michael@0:         masm.ma_eor(R1.payloadReg(), R0.payloadReg(), R0.payloadReg());
michael@0:         break;
michael@0:       case JSOP_BITAND:
michael@0:         masm.ma_and(R1.payloadReg(), R0.payloadReg(), R0.payloadReg());
michael@0:         break;
michael@0:       case JSOP_LSH:
michael@0:         // ARM will happily try to shift by more than 0x1f.
michael@0:         masm.ma_and(Imm32(0x1F), R1.payloadReg(), R1.payloadReg());
michael@0:         masm.ma_lsl(R1.payloadReg(), R0.payloadReg(), R0.payloadReg());
michael@0:         break;
michael@0:       case JSOP_RSH:
michael@0:         masm.ma_and(Imm32(0x1F), R1.payloadReg(), R1.payloadReg());
michael@0:         masm.ma_asr(R1.payloadReg(), R0.payloadReg(), R0.payloadReg());
michael@0:         break;
michael@0:       case JSOP_URSH:
michael@0:         masm.ma_and(Imm32(0x1F), R1.payloadReg(), scratchReg);
michael@0:         masm.ma_lsr(scratchReg, R0.payloadReg(), scratchReg);
michael@0:         masm.ma_cmp(scratchReg, Imm32(0));
michael@0:         if (allowDouble_) {
michael@0:             Label toUint;
michael@0:             masm.j(Assembler::LessThan, &toUint);
michael@0: 
michael@0:             // Move result and box for return.
michael@0:             masm.mov(scratchReg, R0.payloadReg());
michael@0:             EmitReturnFromIC(masm);
michael@0: 
michael@0:             masm.bind(&toUint);
michael@0:             masm.convertUInt32ToDouble(scratchReg, ScratchFloatReg);
michael@0:             masm.boxDouble(ScratchFloatReg, R0);
michael@0:         } else {
michael@0:             masm.j(Assembler::LessThan, &failure);
michael@0:             // Move result for return.
michael@0:             masm.mov(scratchReg, R0.payloadReg());
michael@0:         }
michael@0:         break;
michael@0:       default:
michael@0:         MOZ_ASSUME_UNREACHABLE("Unhandled op for BinaryArith_Int32.");
michael@0:     }
michael@0: 
michael@0:     EmitReturnFromIC(masm);
michael@0: 
michael@0:     switch (op_) {
michael@0:       case JSOP_MUL:
michael@0:         masm.bind(&maybeNegZero);
michael@0: 
michael@0:         // Result is -0 if exactly one of lhs or rhs is negative.
michael@0:         masm.ma_cmn(R0.payloadReg(), R1.payloadReg());
michael@0:         masm.j(Assembler::Signed, &failure);
michael@0: 
michael@0:         // Result is +0.
michael@0:         masm.ma_mov(Imm32(0), R0.payloadReg());
michael@0:         EmitReturnFromIC(masm);
michael@0:         break;
michael@0:       case JSOP_DIV:
michael@0:       case JSOP_MOD:
michael@0:         masm.bind(&revertRegister);
michael@0:         masm.moveValue(savedValue, R0);
michael@0:         break;
michael@0:       default:
michael@0:         break;
michael@0:     }
michael@0: 
michael@0:     // Failure case - jump to next stub
michael@0:     masm.bind(&failure);
michael@0:     EmitStubGuardFailure(masm);
michael@0: 
michael@0:     return true;
michael@0: }
michael@0: 
michael@0: bool
michael@0: ICUnaryArith_Int32::Compiler::generateStubCode(MacroAssembler &masm)
michael@0: {
michael@0:     Label failure;
michael@0:     masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
michael@0: 
michael@0:     switch (op) {
michael@0:       case JSOP_BITNOT:
michael@0:         masm.ma_mvn(R0.payloadReg(), R0.payloadReg());
michael@0:         break;
michael@0:       case JSOP_NEG:
michael@0:         // Guard against 0 and MIN_INT, both result in a double.
michael@0:         masm.branchTest32(Assembler::Zero, R0.payloadReg(), Imm32(0x7fffffff), &failure);
michael@0: 
michael@0:         // Compile -x as 0 - x.
michael@0:         masm.ma_rsb(R0.payloadReg(), Imm32(0), R0.payloadReg());
michael@0:         break;
michael@0:       default:
michael@0:         MOZ_ASSUME_UNREACHABLE("Unexpected op");
michael@0:     }
michael@0: 
michael@0:     EmitReturnFromIC(masm);
michael@0: 
michael@0:     masm.bind(&failure);
michael@0:     EmitStubGuardFailure(masm);
michael@0:     return true;
michael@0: }
michael@0: 
michael@0: } // namespace jit
michael@0: } // namespace js