michael@0: ;
michael@0: ; jsimdcpu.asm - SIMD instruction support check
michael@0: ;
michael@0: ; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
michael@0: ;
michael@0: ; Based on
michael@0: ; x86 SIMD extension for IJG JPEG library
michael@0: ; Copyright (C) 1999-2006, MIYASAKA Masaru.
michael@0: ; For conditions of distribution and use, see copyright notice in jsimdext.inc
michael@0: ;
michael@0: ; This file should be assembled with NASM (Netwide Assembler),
michael@0: ; can *not* be assembled with Microsoft's MASM or any compatible
michael@0: ; assembler (including Borland's Turbo Assembler).
michael@0: ; NASM is available from http://nasm.sourceforge.net/ or
michael@0: ; http://sourceforge.net/project/showfiles.php?group_id=6208
michael@0: ;
michael@0: ; [TAB8]
michael@0: 
michael@0: %include "jsimdext.inc"
michael@0: 
michael@0: ; --------------------------------------------------------------------------
michael@0: 	SECTION	SEG_TEXT
michael@0: 	BITS	32
michael@0: ;
michael@0: ; Check if the CPU supports SIMD instructions
michael@0: ;
michael@0: ; GLOBAL(unsigned int)
michael@0: ; jpeg_simd_cpu_support (void)
michael@0: ;
michael@0: 
michael@0: 	align	16
michael@0: 	global	EXTN(jpeg_simd_cpu_support)
michael@0: 
michael@0: EXTN(jpeg_simd_cpu_support):
michael@0: 	push	ebx
michael@0: ;	push	ecx		; need not be preserved
michael@0: ;	push	edx		; need not be preserved
michael@0: ;	push	esi		; unused
michael@0: 	push	edi
michael@0: 
michael@0: 	xor	edi,edi			; simd support flag
michael@0: 
michael@0: 	pushfd
michael@0: 	pop	eax
michael@0: 	mov	edx,eax
michael@0: 	xor	eax, 1<<21		; flip ID bit in EFLAGS
michael@0: 	push	eax
michael@0: 	popfd
michael@0: 	pushfd
michael@0: 	pop	eax
michael@0: 	xor	eax,edx
michael@0: 	jz	short .return		; CPUID is not supported
michael@0: 
michael@0: 	; Check for MMX instruction support
michael@0: 	xor	eax,eax
michael@0: 	cpuid
michael@0: 	test	eax,eax
michael@0: 	jz	short .return
michael@0: 
michael@0: 	xor	eax,eax
michael@0: 	inc	eax
michael@0: 	cpuid
michael@0: 	mov	eax,edx			; eax = Standard feature flags
michael@0: 
michael@0: 	test	eax, 1<<23		; bit23:MMX
michael@0: 	jz	short .no_mmx
michael@0: 	or	edi, byte JSIMD_MMX
michael@0: .no_mmx:
michael@0: 	test	eax, 1<<25		; bit25:SSE
michael@0: 	jz	short .no_sse
michael@0: 	or	edi, byte JSIMD_SSE
michael@0: .no_sse:
michael@0: 	test	eax, 1<<26		; bit26:SSE2
michael@0: 	jz	short .no_sse2
michael@0: 	or	edi, byte JSIMD_SSE2
michael@0: .no_sse2:
michael@0: 
michael@0: 	; Check for 3DNow! instruction support
michael@0: 	mov	eax, 0x80000000
michael@0: 	cpuid
michael@0: 	cmp	eax, 0x80000000
michael@0: 	jbe	short .return
michael@0: 
michael@0: 	mov	eax, 0x80000001
michael@0: 	cpuid
michael@0: 	mov	eax,edx			; eax = Extended feature flags
michael@0: 
michael@0: 	test	eax, 1<<31		; bit31:3DNow!(vendor independent)
michael@0: 	jz	short .no_3dnow
michael@0: 	or	edi, byte JSIMD_3DNOW
michael@0: .no_3dnow:
michael@0: 
michael@0: .return:
michael@0: 	mov	eax,edi
michael@0: 
michael@0: 	pop	edi
michael@0: ;	pop	esi		; unused
michael@0: ;	pop	edx		; need not be preserved
michael@0: ;	pop	ecx		; need not be preserved
michael@0: 	pop	ebx
michael@0: 	ret
michael@0: 
michael@0: ; For some reason, the OS X linker does not honor the request to align the
michael@0: ; segment unless we do this.
michael@0: 	align	16