michael@0: ;***************************************************************************** michael@0: ;* x86inc.asm: x264asm abstraction layer michael@0: ;***************************************************************************** michael@0: ;* Copyright (C) 2005-2012 x264 project michael@0: ;* michael@0: ;* Authors: Loren Merritt michael@0: ;* Anton Mitrofanov michael@0: ;* Jason Garrett-Glaser michael@0: ;* Henrik Gramner michael@0: ;* michael@0: ;* Permission to use, copy, modify, and/or distribute this software for any michael@0: ;* purpose with or without fee is hereby granted, provided that the above michael@0: ;* copyright notice and this permission notice appear in all copies. michael@0: ;* michael@0: ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES michael@0: ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF michael@0: ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR michael@0: ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES michael@0: ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN michael@0: ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF michael@0: ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. michael@0: ;***************************************************************************** michael@0: michael@0: ; This is a header file for the x264ASM assembly language, which uses michael@0: ; NASM/YASM syntax combined with a large number of macros to provide easy michael@0: ; abstraction between different calling conventions (x86_32, win64, linux64). michael@0: ; It also has various other useful features to simplify writing the kind of michael@0: ; DSP functions that are most often used in x264. michael@0: michael@0: ; Unlike the rest of x264, this file is available under an ISC license, as it michael@0: ; has significant usefulness outside of x264 and we want it to be available michael@0: ; to the largest audience possible. Of course, if you modify it for your own michael@0: ; purposes to add a new feature, we strongly encourage contributing a patch michael@0: ; as this feature might be useful for others as well. Send patches or ideas michael@0: ; to x264-devel@videolan.org . michael@0: michael@0: ; Local changes for libyuv: michael@0: ; remove %define program_name and references in labels michael@0: ; rename cpus to uppercase michael@0: michael@0: %define WIN64 0 michael@0: %define UNIX64 0 michael@0: %if ARCH_X86_64 michael@0: %ifidn __OUTPUT_FORMAT__,win32 michael@0: %define WIN64 1 michael@0: %elifidn __OUTPUT_FORMAT__,win64 michael@0: %define WIN64 1 michael@0: %else michael@0: %define UNIX64 1 michael@0: %endif michael@0: %endif michael@0: michael@0: %ifdef PREFIX michael@0: %define mangle(x) _ %+ x michael@0: %else michael@0: %define mangle(x) x michael@0: %endif michael@0: michael@0: ; Name of the .rodata section. michael@0: ; Kludge: Something on OS X fails to align .rodata even given an align attribute, michael@0: ; so use a different read-only section. michael@0: %macro SECTION_RODATA 0-1 16 michael@0: %ifidn __OUTPUT_FORMAT__,macho64 michael@0: SECTION .text align=%1 michael@0: %elifidn __OUTPUT_FORMAT__,macho michael@0: SECTION .text align=%1 michael@0: fakegot: michael@0: %elifidn __OUTPUT_FORMAT__,aout michael@0: section .text michael@0: %else michael@0: SECTION .rodata align=%1 michael@0: %endif michael@0: %endmacro michael@0: michael@0: ; aout does not support align= michael@0: %macro SECTION_TEXT 0-1 16 michael@0: %ifidn __OUTPUT_FORMAT__,aout michael@0: SECTION .text michael@0: %else michael@0: SECTION .text align=%1 michael@0: %endif michael@0: %endmacro michael@0: michael@0: %if WIN64 michael@0: %define PIC michael@0: %elif ARCH_X86_64 == 0 michael@0: ; x86_32 doesn't require PIC. michael@0: ; Some distros prefer shared objects to be PIC, but nothing breaks if michael@0: ; the code contains a few textrels, so we'll skip that complexity. michael@0: %undef PIC michael@0: %endif michael@0: %ifdef PIC michael@0: default rel michael@0: %endif michael@0: michael@0: ; Always use long nops (reduces 0x90 spam in disassembly on x86_32) michael@0: CPU amdnop michael@0: michael@0: ; Macros to eliminate most code duplication between x86_32 and x86_64: michael@0: ; Currently this works only for leaf functions which load all their arguments michael@0: ; into registers at the start, and make no other use of the stack. Luckily that michael@0: ; covers most of x264's asm. michael@0: michael@0: ; PROLOGUE: michael@0: ; %1 = number of arguments. loads them from stack if needed. michael@0: ; %2 = number of registers used. pushes callee-saved regs if needed. michael@0: ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed. michael@0: ; %4 = list of names to define to registers michael@0: ; PROLOGUE can also be invoked by adding the same options to cglobal michael@0: michael@0: ; e.g. michael@0: ; cglobal foo, 2,3,0, dst, src, tmp michael@0: ; declares a function (foo), taking two args (dst and src) and one local variable (tmp) michael@0: michael@0: ; TODO Some functions can use some args directly from the stack. If they're the michael@0: ; last args then you can just not declare them, but if they're in the middle michael@0: ; we need more flexible macro. michael@0: michael@0: ; RET: michael@0: ; Pops anything that was pushed by PROLOGUE, and returns. michael@0: michael@0: ; REP_RET: michael@0: ; Same, but if it doesn't pop anything it becomes a 2-byte ret, for athlons michael@0: ; which are slow when a normal ret follows a branch. michael@0: michael@0: ; registers: michael@0: ; rN and rNq are the native-size register holding function argument N michael@0: ; rNd, rNw, rNb are dword, word, and byte size michael@0: ; rNh is the high 8 bits of the word size michael@0: ; rNm is the original location of arg N (a register or on the stack), dword michael@0: ; rNmp is native size michael@0: michael@0: %macro DECLARE_REG 2-3 michael@0: %define r%1q %2 michael@0: %define r%1d %2d michael@0: %define r%1w %2w michael@0: %define r%1b %2b michael@0: %define r%1h %2h michael@0: %if %0 == 2 michael@0: %define r%1m %2d michael@0: %define r%1mp %2 michael@0: %elif ARCH_X86_64 ; memory michael@0: %define r%1m [rsp + stack_offset + %3] michael@0: %define r%1mp qword r %+ %1m michael@0: %else michael@0: %define r%1m [esp + stack_offset + %3] michael@0: %define r%1mp dword r %+ %1m michael@0: %endif michael@0: %define r%1 %2 michael@0: %endmacro michael@0: michael@0: %macro DECLARE_REG_SIZE 3 michael@0: %define r%1q r%1 michael@0: %define e%1q r%1 michael@0: %define r%1d e%1 michael@0: %define e%1d e%1 michael@0: %define r%1w %1 michael@0: %define e%1w %1 michael@0: %define r%1h %3 michael@0: %define e%1h %3 michael@0: %define r%1b %2 michael@0: %define e%1b %2 michael@0: %if ARCH_X86_64 == 0 michael@0: %define r%1 e%1 michael@0: %endif michael@0: %endmacro michael@0: michael@0: DECLARE_REG_SIZE ax, al, ah michael@0: DECLARE_REG_SIZE bx, bl, bh michael@0: DECLARE_REG_SIZE cx, cl, ch michael@0: DECLARE_REG_SIZE dx, dl, dh michael@0: DECLARE_REG_SIZE si, sil, null michael@0: DECLARE_REG_SIZE di, dil, null michael@0: DECLARE_REG_SIZE bp, bpl, null michael@0: michael@0: ; t# defines for when per-arch register allocation is more complex than just function arguments michael@0: michael@0: %macro DECLARE_REG_TMP 1-* michael@0: %assign %%i 0 michael@0: %rep %0 michael@0: CAT_XDEFINE t, %%i, r%1 michael@0: %assign %%i %%i+1 michael@0: %rotate 1 michael@0: %endrep michael@0: %endmacro michael@0: michael@0: %macro DECLARE_REG_TMP_SIZE 0-* michael@0: %rep %0 michael@0: %define t%1q t%1 %+ q michael@0: %define t%1d t%1 %+ d michael@0: %define t%1w t%1 %+ w michael@0: %define t%1h t%1 %+ h michael@0: %define t%1b t%1 %+ b michael@0: %rotate 1 michael@0: %endrep michael@0: %endmacro michael@0: michael@0: DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14 michael@0: michael@0: %if ARCH_X86_64 michael@0: %define gprsize 8 michael@0: %else michael@0: %define gprsize 4 michael@0: %endif michael@0: michael@0: %macro PUSH 1 michael@0: push %1 michael@0: %assign stack_offset stack_offset+gprsize michael@0: %endmacro michael@0: michael@0: %macro POP 1 michael@0: pop %1 michael@0: %assign stack_offset stack_offset-gprsize michael@0: %endmacro michael@0: michael@0: %macro PUSH_IF_USED 1-* michael@0: %rep %0 michael@0: %if %1 < regs_used michael@0: PUSH r%1 michael@0: %endif michael@0: %rotate 1 michael@0: %endrep michael@0: %endmacro michael@0: michael@0: %macro POP_IF_USED 1-* michael@0: %rep %0 michael@0: %if %1 < regs_used michael@0: pop r%1 michael@0: %endif michael@0: %rotate 1 michael@0: %endrep michael@0: %endmacro michael@0: michael@0: %macro LOAD_IF_USED 1-* michael@0: %rep %0 michael@0: %if %1 < num_args michael@0: mov r%1, r %+ %1 %+ mp michael@0: %endif michael@0: %rotate 1 michael@0: %endrep michael@0: %endmacro michael@0: michael@0: %macro SUB 2 michael@0: sub %1, %2 michael@0: %ifidn %1, rsp michael@0: %assign stack_offset stack_offset+(%2) michael@0: %endif michael@0: %endmacro michael@0: michael@0: %macro ADD 2 michael@0: add %1, %2 michael@0: %ifidn %1, rsp michael@0: %assign stack_offset stack_offset-(%2) michael@0: %endif michael@0: %endmacro michael@0: michael@0: %macro movifnidn 2 michael@0: %ifnidn %1, %2 michael@0: mov %1, %2 michael@0: %endif michael@0: %endmacro michael@0: michael@0: %macro movsxdifnidn 2 michael@0: %ifnidn %1, %2 michael@0: movsxd %1, %2 michael@0: %endif michael@0: %endmacro michael@0: michael@0: %macro ASSERT 1 michael@0: %if (%1) == 0 michael@0: %error assert failed michael@0: %endif michael@0: %endmacro michael@0: michael@0: %macro DEFINE_ARGS 0-* michael@0: %ifdef n_arg_names michael@0: %assign %%i 0 michael@0: %rep n_arg_names michael@0: CAT_UNDEF arg_name %+ %%i, q michael@0: CAT_UNDEF arg_name %+ %%i, d michael@0: CAT_UNDEF arg_name %+ %%i, w michael@0: CAT_UNDEF arg_name %+ %%i, h michael@0: CAT_UNDEF arg_name %+ %%i, b michael@0: CAT_UNDEF arg_name %+ %%i, m michael@0: CAT_UNDEF arg_name %+ %%i, mp michael@0: CAT_UNDEF arg_name, %%i michael@0: %assign %%i %%i+1 michael@0: %endrep michael@0: %endif michael@0: michael@0: %xdefine %%stack_offset stack_offset michael@0: %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine michael@0: %assign %%i 0 michael@0: %rep %0 michael@0: %xdefine %1q r %+ %%i %+ q michael@0: %xdefine %1d r %+ %%i %+ d michael@0: %xdefine %1w r %+ %%i %+ w michael@0: %xdefine %1h r %+ %%i %+ h michael@0: %xdefine %1b r %+ %%i %+ b michael@0: %xdefine %1m r %+ %%i %+ m michael@0: %xdefine %1mp r %+ %%i %+ mp michael@0: CAT_XDEFINE arg_name, %%i, %1 michael@0: %assign %%i %%i+1 michael@0: %rotate 1 michael@0: %endrep michael@0: %xdefine stack_offset %%stack_offset michael@0: %assign n_arg_names %0 michael@0: %endmacro michael@0: michael@0: %if WIN64 ; Windows x64 ;================================================= michael@0: michael@0: DECLARE_REG 0, rcx michael@0: DECLARE_REG 1, rdx michael@0: DECLARE_REG 2, R8 michael@0: DECLARE_REG 3, R9 michael@0: DECLARE_REG 4, R10, 40 michael@0: DECLARE_REG 5, R11, 48 michael@0: DECLARE_REG 6, rax, 56 michael@0: DECLARE_REG 7, rdi, 64 michael@0: DECLARE_REG 8, rsi, 72 michael@0: DECLARE_REG 9, rbx, 80 michael@0: DECLARE_REG 10, rbp, 88 michael@0: DECLARE_REG 11, R12, 96 michael@0: DECLARE_REG 12, R13, 104 michael@0: DECLARE_REG 13, R14, 112 michael@0: DECLARE_REG 14, R15, 120 michael@0: michael@0: %macro PROLOGUE 2-4+ 0 ; #args, #regs, #xmm_regs, arg_names... michael@0: %assign num_args %1 michael@0: %assign regs_used %2 michael@0: ASSERT regs_used >= num_args michael@0: ASSERT regs_used <= 15 michael@0: PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14 michael@0: %if mmsize == 8 michael@0: %assign xmm_regs_used 0 michael@0: %else michael@0: WIN64_SPILL_XMM %3 michael@0: %endif michael@0: LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 michael@0: DEFINE_ARGS %4 michael@0: %endmacro michael@0: michael@0: %macro WIN64_SPILL_XMM 1 michael@0: %assign xmm_regs_used %1 michael@0: ASSERT xmm_regs_used <= 16 michael@0: %if xmm_regs_used > 6 michael@0: SUB rsp, (xmm_regs_used-6)*16+16 michael@0: %assign %%i xmm_regs_used michael@0: %rep (xmm_regs_used-6) michael@0: %assign %%i %%i-1 michael@0: movdqa [rsp + (%%i-6)*16+(~stack_offset&8)], xmm %+ %%i michael@0: %endrep michael@0: %endif michael@0: %endmacro michael@0: michael@0: %macro WIN64_RESTORE_XMM_INTERNAL 1 michael@0: %if xmm_regs_used > 6 michael@0: %assign %%i xmm_regs_used michael@0: %rep (xmm_regs_used-6) michael@0: %assign %%i %%i-1 michael@0: movdqa xmm %+ %%i, [%1 + (%%i-6)*16+(~stack_offset&8)] michael@0: %endrep michael@0: add %1, (xmm_regs_used-6)*16+16 michael@0: %endif michael@0: %endmacro michael@0: michael@0: %macro WIN64_RESTORE_XMM 1 michael@0: WIN64_RESTORE_XMM_INTERNAL %1 michael@0: %assign stack_offset stack_offset-(xmm_regs_used-6)*16+16 michael@0: %assign xmm_regs_used 0 michael@0: %endmacro michael@0: michael@0: %define has_epilogue regs_used > 7 || xmm_regs_used > 6 || mmsize == 32 michael@0: michael@0: %macro RET 0 michael@0: WIN64_RESTORE_XMM_INTERNAL rsp michael@0: POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7 michael@0: %if mmsize == 32 michael@0: vzeroupper michael@0: %endif michael@0: ret michael@0: %endmacro michael@0: michael@0: %elif ARCH_X86_64 ; *nix x64 ;============================================= michael@0: michael@0: DECLARE_REG 0, rdi michael@0: DECLARE_REG 1, rsi michael@0: DECLARE_REG 2, rdx michael@0: DECLARE_REG 3, rcx michael@0: DECLARE_REG 4, R8 michael@0: DECLARE_REG 5, R9 michael@0: DECLARE_REG 6, rax, 8 michael@0: DECLARE_REG 7, R10, 16 michael@0: DECLARE_REG 8, R11, 24 michael@0: DECLARE_REG 9, rbx, 32 michael@0: DECLARE_REG 10, rbp, 40 michael@0: DECLARE_REG 11, R12, 48 michael@0: DECLARE_REG 12, R13, 56 michael@0: DECLARE_REG 13, R14, 64 michael@0: DECLARE_REG 14, R15, 72 michael@0: michael@0: %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names... michael@0: %assign num_args %1 michael@0: %assign regs_used %2 michael@0: ASSERT regs_used >= num_args michael@0: ASSERT regs_used <= 15 michael@0: PUSH_IF_USED 9, 10, 11, 12, 13, 14 michael@0: LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14 michael@0: DEFINE_ARGS %4 michael@0: %endmacro michael@0: michael@0: %define has_epilogue regs_used > 9 || mmsize == 32 michael@0: michael@0: %macro RET 0 michael@0: POP_IF_USED 14, 13, 12, 11, 10, 9 michael@0: %if mmsize == 32 michael@0: vzeroupper michael@0: %endif michael@0: ret michael@0: %endmacro michael@0: michael@0: %else ; X86_32 ;============================================================== michael@0: michael@0: DECLARE_REG 0, eax, 4 michael@0: DECLARE_REG 1, ecx, 8 michael@0: DECLARE_REG 2, edx, 12 michael@0: DECLARE_REG 3, ebx, 16 michael@0: DECLARE_REG 4, esi, 20 michael@0: DECLARE_REG 5, edi, 24 michael@0: DECLARE_REG 6, ebp, 28 michael@0: %define rsp esp michael@0: michael@0: %macro DECLARE_ARG 1-* michael@0: %rep %0 michael@0: %define r%1m [esp + stack_offset + 4*%1 + 4] michael@0: %define r%1mp dword r%1m michael@0: %rotate 1 michael@0: %endrep michael@0: %endmacro michael@0: michael@0: DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14 michael@0: michael@0: %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names... michael@0: %assign num_args %1 michael@0: %assign regs_used %2 michael@0: %if regs_used > 7 michael@0: %assign regs_used 7 michael@0: %endif michael@0: ASSERT regs_used >= num_args michael@0: PUSH_IF_USED 3, 4, 5, 6 michael@0: LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6 michael@0: DEFINE_ARGS %4 michael@0: %endmacro michael@0: michael@0: %define has_epilogue regs_used > 3 || mmsize == 32 michael@0: michael@0: %macro RET 0 michael@0: POP_IF_USED 6, 5, 4, 3 michael@0: %if mmsize == 32 michael@0: vzeroupper michael@0: %endif michael@0: ret michael@0: %endmacro michael@0: michael@0: %endif ;====================================================================== michael@0: michael@0: %if WIN64 == 0 michael@0: %macro WIN64_SPILL_XMM 1 michael@0: %endmacro michael@0: %macro WIN64_RESTORE_XMM 1 michael@0: %endmacro michael@0: %endif michael@0: michael@0: %macro REP_RET 0 michael@0: %if has_epilogue michael@0: RET michael@0: %else michael@0: rep ret michael@0: %endif michael@0: %endmacro michael@0: michael@0: %macro TAIL_CALL 2 ; callee, is_nonadjacent michael@0: %if has_epilogue michael@0: call %1 michael@0: RET michael@0: %elif %2 michael@0: jmp %1 michael@0: %endif michael@0: %endmacro michael@0: michael@0: ;============================================================================= michael@0: ; arch-independent part michael@0: ;============================================================================= michael@0: michael@0: %assign function_align 16 michael@0: michael@0: ; Begin a function. michael@0: ; Applies any symbol mangling needed for C linkage, and sets up a define such that michael@0: ; subsequent uses of the function name automatically refer to the mangled version. michael@0: ; Appends cpuflags to the function name if cpuflags has been specified. michael@0: %macro cglobal 1-2+ ; name, [PROLOGUE args] michael@0: %if %0 == 1 michael@0: cglobal_internal %1 %+ SUFFIX michael@0: %else michael@0: cglobal_internal %1 %+ SUFFIX, %2 michael@0: %endif michael@0: %endmacro michael@0: %macro cglobal_internal 1-2+ michael@0: %ifndef cglobaled_%1 michael@0: %xdefine %1 mangle(%1) michael@0: %xdefine %1.skip_prologue %1 %+ .skip_prologue michael@0: CAT_XDEFINE cglobaled_, %1, 1 michael@0: %endif michael@0: %xdefine current_function %1 michael@0: %ifidn __OUTPUT_FORMAT__,elf michael@0: global %1:function hidden michael@0: %else michael@0: global %1 michael@0: %endif michael@0: align function_align michael@0: %1: michael@0: RESET_MM_PERMUTATION ; not really needed, but makes disassembly somewhat nicer michael@0: %assign stack_offset 0 michael@0: %if %0 > 1 michael@0: PROLOGUE %2 michael@0: %endif michael@0: %endmacro michael@0: michael@0: %macro cextern 1 michael@0: %xdefine %1 mangle(%1) michael@0: CAT_XDEFINE cglobaled_, %1, 1 michael@0: extern %1 michael@0: %endmacro michael@0: michael@0: ; like cextern, but without the prefix michael@0: %macro cextern_naked 1 michael@0: %xdefine %1 mangle(%1) michael@0: CAT_XDEFINE cglobaled_, %1, 1 michael@0: extern %1 michael@0: %endmacro michael@0: michael@0: %macro const 2+ michael@0: %xdefine %1 mangle(%1) michael@0: global %1 michael@0: %1: %2 michael@0: %endmacro michael@0: michael@0: ; This is needed for ELF, otherwise the GNU linker assumes the stack is michael@0: ; executable by default. michael@0: %ifidn __OUTPUT_FORMAT__,elf michael@0: SECTION .note.GNU-stack noalloc noexec nowrite progbits michael@0: %endif michael@0: %ifidn __OUTPUT_FORMAT__,elf32 michael@0: section .note.GNU-stack noalloc noexec nowrite progbits michael@0: %endif michael@0: %ifidn __OUTPUT_FORMAT__,elf64 michael@0: section .note.GNU-stack noalloc noexec nowrite progbits michael@0: %endif michael@0: michael@0: ; cpuflags michael@0: michael@0: %assign cpuflags_MMX (1<<0) michael@0: %assign cpuflags_MMX2 (1<<1) | cpuflags_MMX michael@0: %assign cpuflags_3dnow (1<<2) | cpuflags_MMX michael@0: %assign cpuflags_3dnow2 (1<<3) | cpuflags_3dnow michael@0: %assign cpuflags_SSE (1<<4) | cpuflags_MMX2 michael@0: %assign cpuflags_SSE2 (1<<5) | cpuflags_SSE michael@0: %assign cpuflags_SSE2slow (1<<6) | cpuflags_SSE2 michael@0: %assign cpuflags_SSE3 (1<<7) | cpuflags_SSE2 michael@0: %assign cpuflags_SSSE3 (1<<8) | cpuflags_SSE3 michael@0: %assign cpuflags_SSE4 (1<<9) | cpuflags_SSSE3 michael@0: %assign cpuflags_SSE42 (1<<10)| cpuflags_SSE4 michael@0: %assign cpuflags_AVX (1<<11)| cpuflags_SSE42 michael@0: %assign cpuflags_xop (1<<12)| cpuflags_AVX michael@0: %assign cpuflags_fma4 (1<<13)| cpuflags_AVX michael@0: %assign cpuflags_AVX2 (1<<14)| cpuflags_AVX michael@0: %assign cpuflags_fma3 (1<<15)| cpuflags_AVX michael@0: michael@0: %assign cpuflags_cache32 (1<<16) michael@0: %assign cpuflags_cache64 (1<<17) michael@0: %assign cpuflags_slowctz (1<<18) michael@0: %assign cpuflags_lzcnt (1<<19) michael@0: %assign cpuflags_misalign (1<<20) michael@0: %assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant michael@0: %assign cpuflags_atom (1<<22) michael@0: %assign cpuflags_bmi1 (1<<23) michael@0: %assign cpuflags_bmi2 (1<<24)|cpuflags_bmi1 michael@0: %assign cpuflags_tbm (1<<25)|cpuflags_bmi1 michael@0: michael@0: %define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x)) michael@0: %define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x)) michael@0: michael@0: ; Takes up to 2 cpuflags from the above list. michael@0: ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu. michael@0: ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co. michael@0: %macro INIT_CPUFLAGS 0-2 michael@0: %if %0 >= 1 michael@0: %xdefine cpuname %1 michael@0: %assign cpuflags cpuflags_%1 michael@0: %if %0 >= 2 michael@0: %xdefine cpuname %1_%2 michael@0: %assign cpuflags cpuflags | cpuflags_%2 michael@0: %endif michael@0: %xdefine SUFFIX _ %+ cpuname michael@0: %if cpuflag(AVX) michael@0: %assign AVX_enabled 1 michael@0: %endif michael@0: %if mmsize == 16 && notcpuflag(SSE2) michael@0: %define mova movaps michael@0: %define movu movups michael@0: %define movnta movntps michael@0: %endif michael@0: %if cpuflag(aligned) michael@0: %define movu mova michael@0: %elifidn %1, SSE3 michael@0: %define movu lddqu michael@0: %endif michael@0: %else michael@0: %xdefine SUFFIX michael@0: %undef cpuname michael@0: %undef cpuflags michael@0: %endif michael@0: %endmacro michael@0: michael@0: ; merge MMX and SSE* michael@0: michael@0: %macro CAT_XDEFINE 3 michael@0: %xdefine %1%2 %3 michael@0: %endmacro michael@0: michael@0: %macro CAT_UNDEF 2 michael@0: %undef %1%2 michael@0: %endmacro michael@0: michael@0: %macro INIT_MMX 0-1+ michael@0: %assign AVX_enabled 0 michael@0: %define RESET_MM_PERMUTATION INIT_MMX %1 michael@0: %define mmsize 8 michael@0: %define num_mmregs 8 michael@0: %define mova movq michael@0: %define movu movq michael@0: %define movh movd michael@0: %define movnta movntq michael@0: %assign %%i 0 michael@0: %rep 8 michael@0: CAT_XDEFINE m, %%i, mm %+ %%i michael@0: CAT_XDEFINE nmm, %%i, %%i michael@0: %assign %%i %%i+1 michael@0: %endrep michael@0: %rep 8 michael@0: CAT_UNDEF m, %%i michael@0: CAT_UNDEF nmm, %%i michael@0: %assign %%i %%i+1 michael@0: %endrep michael@0: INIT_CPUFLAGS %1 michael@0: %endmacro michael@0: michael@0: %macro INIT_XMM 0-1+ michael@0: %assign AVX_enabled 0 michael@0: %define RESET_MM_PERMUTATION INIT_XMM %1 michael@0: %define mmsize 16 michael@0: %define num_mmregs 8 michael@0: %if ARCH_X86_64 michael@0: %define num_mmregs 16 michael@0: %endif michael@0: %define mova movdqa michael@0: %define movu movdqu michael@0: %define movh movq michael@0: %define movnta movntdq michael@0: %assign %%i 0 michael@0: %rep num_mmregs michael@0: CAT_XDEFINE m, %%i, xmm %+ %%i michael@0: CAT_XDEFINE nxmm, %%i, %%i michael@0: %assign %%i %%i+1 michael@0: %endrep michael@0: INIT_CPUFLAGS %1 michael@0: %endmacro michael@0: michael@0: %macro INIT_YMM 0-1+ michael@0: %assign AVX_enabled 1 michael@0: %define RESET_MM_PERMUTATION INIT_YMM %1 michael@0: %define mmsize 32 michael@0: %define num_mmregs 8 michael@0: %if ARCH_X86_64 michael@0: %define num_mmregs 16 michael@0: %endif michael@0: %define mova vmovaps michael@0: %define movu vmovups michael@0: %undef movh michael@0: %define movnta vmovntps michael@0: %assign %%i 0 michael@0: %rep num_mmregs michael@0: CAT_XDEFINE m, %%i, ymm %+ %%i michael@0: CAT_XDEFINE nymm, %%i, %%i michael@0: %assign %%i %%i+1 michael@0: %endrep michael@0: INIT_CPUFLAGS %1 michael@0: %endmacro michael@0: michael@0: INIT_XMM michael@0: michael@0: ; I often want to use macros that permute their arguments. e.g. there's no michael@0: ; efficient way to implement butterfly or transpose or dct without swapping some michael@0: ; arguments. michael@0: ; michael@0: ; I would like to not have to manually keep track of the permutations: michael@0: ; If I insert a permutation in the middle of a function, it should automatically michael@0: ; change everything that follows. For more complex macros I may also have multiple michael@0: ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations. michael@0: ; michael@0: ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that michael@0: ; permutes its arguments. It's equivalent to exchanging the contents of the michael@0: ; registers, except that this way you exchange the register names instead, so it michael@0: ; doesn't cost any cycles. michael@0: michael@0: %macro PERMUTE 2-* ; takes a list of pairs to swap michael@0: %rep %0/2 michael@0: %xdefine tmp%2 m%2 michael@0: %xdefine ntmp%2 nm%2 michael@0: %rotate 2 michael@0: %endrep michael@0: %rep %0/2 michael@0: %xdefine m%1 tmp%2 michael@0: %xdefine nm%1 ntmp%2 michael@0: %undef tmp%2 michael@0: %undef ntmp%2 michael@0: %rotate 2 michael@0: %endrep michael@0: %endmacro michael@0: michael@0: %macro SWAP 2-* ; swaps a single chain (sometimes more concise than pairs) michael@0: %rep %0-1 michael@0: %ifdef m%1 michael@0: %xdefine tmp m%1 michael@0: %xdefine m%1 m%2 michael@0: %xdefine m%2 tmp michael@0: CAT_XDEFINE n, m%1, %1 michael@0: CAT_XDEFINE n, m%2, %2 michael@0: %else michael@0: ; If we were called as "SWAP m0,m1" rather than "SWAP 0,1" infer the original numbers here. michael@0: ; Be careful using this mode in nested macros though, as in some cases there may be michael@0: ; other copies of m# that have already been dereferenced and don't get updated correctly. michael@0: %xdefine %%n1 n %+ %1 michael@0: %xdefine %%n2 n %+ %2 michael@0: %xdefine tmp m %+ %%n1 michael@0: CAT_XDEFINE m, %%n1, m %+ %%n2 michael@0: CAT_XDEFINE m, %%n2, tmp michael@0: CAT_XDEFINE n, m %+ %%n1, %%n1 michael@0: CAT_XDEFINE n, m %+ %%n2, %%n2 michael@0: %endif michael@0: %undef tmp michael@0: %rotate 1 michael@0: %endrep michael@0: %endmacro michael@0: michael@0: ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later michael@0: ; calls to that function will automatically load the permutation, so values can michael@0: ; be returned in mmregs. michael@0: %macro SAVE_MM_PERMUTATION 0-1 michael@0: %if %0 michael@0: %xdefine %%f %1_m michael@0: %else michael@0: %xdefine %%f current_function %+ _m michael@0: %endif michael@0: %assign %%i 0 michael@0: %rep num_mmregs michael@0: CAT_XDEFINE %%f, %%i, m %+ %%i michael@0: %assign %%i %%i+1 michael@0: %endrep michael@0: %endmacro michael@0: michael@0: %macro LOAD_MM_PERMUTATION 1 ; name to load from michael@0: %ifdef %1_m0 michael@0: %assign %%i 0 michael@0: %rep num_mmregs michael@0: CAT_XDEFINE m, %%i, %1_m %+ %%i michael@0: CAT_XDEFINE n, m %+ %%i, %%i michael@0: %assign %%i %%i+1 michael@0: %endrep michael@0: %endif michael@0: %endmacro michael@0: michael@0: ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't michael@0: %macro call 1 michael@0: call_internal %1, %1 %+ SUFFIX michael@0: %endmacro michael@0: %macro call_internal 2 michael@0: %xdefine %%i %1 michael@0: %ifndef cglobaled_%1 michael@0: %ifdef cglobaled_%2 michael@0: %xdefine %%i %2 michael@0: %endif michael@0: %endif michael@0: call %%i michael@0: LOAD_MM_PERMUTATION %%i michael@0: %endmacro michael@0: michael@0: ; Substitutions that reduce instruction size but are functionally equivalent michael@0: %macro add 2 michael@0: %ifnum %2 michael@0: %if %2==128 michael@0: sub %1, -128 michael@0: %else michael@0: add %1, %2 michael@0: %endif michael@0: %else michael@0: add %1, %2 michael@0: %endif michael@0: %endmacro michael@0: michael@0: %macro sub 2 michael@0: %ifnum %2 michael@0: %if %2==128 michael@0: add %1, -128 michael@0: %else michael@0: sub %1, %2 michael@0: %endif michael@0: %else michael@0: sub %1, %2 michael@0: %endif michael@0: %endmacro michael@0: michael@0: ;============================================================================= michael@0: ; AVX abstraction layer michael@0: ;============================================================================= michael@0: michael@0: %assign i 0 michael@0: %rep 16 michael@0: %if i < 8 michael@0: CAT_XDEFINE sizeofmm, i, 8 michael@0: %endif michael@0: CAT_XDEFINE sizeofxmm, i, 16 michael@0: CAT_XDEFINE sizeofymm, i, 32 michael@0: %assign i i+1 michael@0: %endrep michael@0: %undef i michael@0: michael@0: %macro CHECK_AVX_INSTR_EMU 3-* michael@0: %xdefine %%opcode %1 michael@0: %xdefine %%dst %2 michael@0: %rep %0-2 michael@0: %ifidn %%dst, %3 michael@0: %error non-AVX emulation of ``%%opcode'' is not supported michael@0: %endif michael@0: %rotate 1 michael@0: %endrep michael@0: %endmacro michael@0: michael@0: ;%1 == instruction michael@0: ;%2 == 1 if float, 0 if int michael@0: ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm) michael@0: ;%4 == number of operands given michael@0: ;%5+: operands michael@0: %macro RUN_AVX_INSTR 6-7+ michael@0: %ifid %6 michael@0: %define %%sizeofreg sizeof%6 michael@0: %elifid %5 michael@0: %define %%sizeofreg sizeof%5 michael@0: %else michael@0: %define %%sizeofreg mmsize michael@0: %endif michael@0: %if %%sizeofreg==32 michael@0: %if %4>=3 michael@0: v%1 %5, %6, %7 michael@0: %else michael@0: v%1 %5, %6 michael@0: %endif michael@0: %else michael@0: %if %%sizeofreg==8 michael@0: %define %%regmov movq michael@0: %elif %2 michael@0: %define %%regmov movaps michael@0: %else michael@0: %define %%regmov movdqa michael@0: %endif michael@0: michael@0: %if %4>=3+%3 michael@0: %ifnidn %5, %6 michael@0: %if AVX_enabled && %%sizeofreg==16 michael@0: v%1 %5, %6, %7 michael@0: %else michael@0: CHECK_AVX_INSTR_EMU {%1 %5, %6, %7}, %5, %7 michael@0: %%regmov %5, %6 michael@0: %1 %5, %7 michael@0: %endif michael@0: %else michael@0: %1 %5, %7 michael@0: %endif michael@0: %elif %4>=3 michael@0: %1 %5, %6, %7 michael@0: %else michael@0: %1 %5, %6 michael@0: %endif michael@0: %endif michael@0: %endmacro michael@0: michael@0: ; 3arg AVX ops with a memory arg can only have it in src2, michael@0: ; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov). michael@0: ; So, if the op is symmetric and the wrong one is memory, swap them. michael@0: %macro RUN_AVX_INSTR1 8 michael@0: %assign %%swap 0 michael@0: %if AVX_enabled michael@0: %ifnid %6 michael@0: %assign %%swap 1 michael@0: %endif michael@0: %elifnidn %5, %6 michael@0: %ifnid %7 michael@0: %assign %%swap 1 michael@0: %endif michael@0: %endif michael@0: %if %%swap && %3 == 0 && %8 == 1 michael@0: RUN_AVX_INSTR %1, %2, %3, %4, %5, %7, %6 michael@0: %else michael@0: RUN_AVX_INSTR %1, %2, %3, %4, %5, %6, %7 michael@0: %endif michael@0: %endmacro michael@0: michael@0: ;%1 == instruction michael@0: ;%2 == 1 if float, 0 if int michael@0: ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm) michael@0: ;%4 == 1 if symmetric (i.e. doesn't matter which src arg is which), 0 if not michael@0: %macro AVX_INSTR 4 michael@0: %macro %1 2-9 fnord, fnord, fnord, %1, %2, %3, %4 michael@0: %ifidn %3, fnord michael@0: RUN_AVX_INSTR %6, %7, %8, 2, %1, %2 michael@0: %elifidn %4, fnord michael@0: RUN_AVX_INSTR1 %6, %7, %8, 3, %1, %2, %3, %9 michael@0: %elifidn %5, fnord michael@0: RUN_AVX_INSTR %6, %7, %8, 4, %1, %2, %3, %4 michael@0: %else michael@0: RUN_AVX_INSTR %6, %7, %8, 5, %1, %2, %3, %4, %5 michael@0: %endif michael@0: %endmacro michael@0: %endmacro michael@0: michael@0: AVX_INSTR addpd, 1, 0, 1 michael@0: AVX_INSTR addps, 1, 0, 1 michael@0: AVX_INSTR addsd, 1, 0, 1 michael@0: AVX_INSTR addss, 1, 0, 1 michael@0: AVX_INSTR addsubpd, 1, 0, 0 michael@0: AVX_INSTR addsubps, 1, 0, 0 michael@0: AVX_INSTR andpd, 1, 0, 1 michael@0: AVX_INSTR andps, 1, 0, 1 michael@0: AVX_INSTR andnpd, 1, 0, 0 michael@0: AVX_INSTR andnps, 1, 0, 0 michael@0: AVX_INSTR blendpd, 1, 0, 0 michael@0: AVX_INSTR blendps, 1, 0, 0 michael@0: AVX_INSTR blendvpd, 1, 0, 0 michael@0: AVX_INSTR blendvps, 1, 0, 0 michael@0: AVX_INSTR cmppd, 1, 0, 0 michael@0: AVX_INSTR cmpps, 1, 0, 0 michael@0: AVX_INSTR cmpsd, 1, 0, 0 michael@0: AVX_INSTR cmpss, 1, 0, 0 michael@0: AVX_INSTR cvtdq2ps, 1, 0, 0 michael@0: AVX_INSTR cvtps2dq, 1, 0, 0 michael@0: AVX_INSTR divpd, 1, 0, 0 michael@0: AVX_INSTR divps, 1, 0, 0 michael@0: AVX_INSTR divsd, 1, 0, 0 michael@0: AVX_INSTR divss, 1, 0, 0 michael@0: AVX_INSTR dppd, 1, 1, 0 michael@0: AVX_INSTR dpps, 1, 1, 0 michael@0: AVX_INSTR haddpd, 1, 0, 0 michael@0: AVX_INSTR haddps, 1, 0, 0 michael@0: AVX_INSTR hsubpd, 1, 0, 0 michael@0: AVX_INSTR hsubps, 1, 0, 0 michael@0: AVX_INSTR maxpd, 1, 0, 1 michael@0: AVX_INSTR maxps, 1, 0, 1 michael@0: AVX_INSTR maxsd, 1, 0, 1 michael@0: AVX_INSTR maxss, 1, 0, 1 michael@0: AVX_INSTR minpd, 1, 0, 1 michael@0: AVX_INSTR minps, 1, 0, 1 michael@0: AVX_INSTR minsd, 1, 0, 1 michael@0: AVX_INSTR minss, 1, 0, 1 michael@0: AVX_INSTR movhlps, 1, 0, 0 michael@0: AVX_INSTR movlhps, 1, 0, 0 michael@0: AVX_INSTR movsd, 1, 0, 0 michael@0: AVX_INSTR movss, 1, 0, 0 michael@0: AVX_INSTR mpsadbw, 0, 1, 0 michael@0: AVX_INSTR mulpd, 1, 0, 1 michael@0: AVX_INSTR mulps, 1, 0, 1 michael@0: AVX_INSTR mulsd, 1, 0, 1 michael@0: AVX_INSTR mulss, 1, 0, 1 michael@0: AVX_INSTR orpd, 1, 0, 1 michael@0: AVX_INSTR orps, 1, 0, 1 michael@0: AVX_INSTR pabsb, 0, 0, 0 michael@0: AVX_INSTR pabsw, 0, 0, 0 michael@0: AVX_INSTR pabsd, 0, 0, 0 michael@0: AVX_INSTR packsswb, 0, 0, 0 michael@0: AVX_INSTR packssdw, 0, 0, 0 michael@0: AVX_INSTR packuswb, 0, 0, 0 michael@0: AVX_INSTR packusdw, 0, 0, 0 michael@0: AVX_INSTR paddb, 0, 0, 1 michael@0: AVX_INSTR paddw, 0, 0, 1 michael@0: AVX_INSTR paddd, 0, 0, 1 michael@0: AVX_INSTR paddq, 0, 0, 1 michael@0: AVX_INSTR paddsb, 0, 0, 1 michael@0: AVX_INSTR paddsw, 0, 0, 1 michael@0: AVX_INSTR paddusb, 0, 0, 1 michael@0: AVX_INSTR paddusw, 0, 0, 1 michael@0: AVX_INSTR palignr, 0, 1, 0 michael@0: AVX_INSTR pand, 0, 0, 1 michael@0: AVX_INSTR pandn, 0, 0, 0 michael@0: AVX_INSTR pavgb, 0, 0, 1 michael@0: AVX_INSTR pavgw, 0, 0, 1 michael@0: AVX_INSTR pblendvb, 0, 0, 0 michael@0: AVX_INSTR pblendw, 0, 1, 0 michael@0: AVX_INSTR pcmpestri, 0, 0, 0 michael@0: AVX_INSTR pcmpestrm, 0, 0, 0 michael@0: AVX_INSTR pcmpistri, 0, 0, 0 michael@0: AVX_INSTR pcmpistrm, 0, 0, 0 michael@0: AVX_INSTR pcmpeqb, 0, 0, 1 michael@0: AVX_INSTR pcmpeqw, 0, 0, 1 michael@0: AVX_INSTR pcmpeqd, 0, 0, 1 michael@0: AVX_INSTR pcmpeqq, 0, 0, 1 michael@0: AVX_INSTR pcmpgtb, 0, 0, 0 michael@0: AVX_INSTR pcmpgtw, 0, 0, 0 michael@0: AVX_INSTR pcmpgtd, 0, 0, 0 michael@0: AVX_INSTR pcmpgtq, 0, 0, 0 michael@0: AVX_INSTR phaddw, 0, 0, 0 michael@0: AVX_INSTR phaddd, 0, 0, 0 michael@0: AVX_INSTR phaddsw, 0, 0, 0 michael@0: AVX_INSTR phsubw, 0, 0, 0 michael@0: AVX_INSTR phsubd, 0, 0, 0 michael@0: AVX_INSTR phsubsw, 0, 0, 0 michael@0: AVX_INSTR pmaddwd, 0, 0, 1 michael@0: AVX_INSTR pmaddubsw, 0, 0, 0 michael@0: AVX_INSTR pmaxsb, 0, 0, 1 michael@0: AVX_INSTR pmaxsw, 0, 0, 1 michael@0: AVX_INSTR pmaxsd, 0, 0, 1 michael@0: AVX_INSTR pmaxub, 0, 0, 1 michael@0: AVX_INSTR pmaxuw, 0, 0, 1 michael@0: AVX_INSTR pmaxud, 0, 0, 1 michael@0: AVX_INSTR pminsb, 0, 0, 1 michael@0: AVX_INSTR pminsw, 0, 0, 1 michael@0: AVX_INSTR pminsd, 0, 0, 1 michael@0: AVX_INSTR pminub, 0, 0, 1 michael@0: AVX_INSTR pminuw, 0, 0, 1 michael@0: AVX_INSTR pminud, 0, 0, 1 michael@0: AVX_INSTR pmovmskb, 0, 0, 0 michael@0: AVX_INSTR pmulhuw, 0, 0, 1 michael@0: AVX_INSTR pmulhrsw, 0, 0, 1 michael@0: AVX_INSTR pmulhw, 0, 0, 1 michael@0: AVX_INSTR pmullw, 0, 0, 1 michael@0: AVX_INSTR pmulld, 0, 0, 1 michael@0: AVX_INSTR pmuludq, 0, 0, 1 michael@0: AVX_INSTR pmuldq, 0, 0, 1 michael@0: AVX_INSTR por, 0, 0, 1 michael@0: AVX_INSTR psadbw, 0, 0, 1 michael@0: AVX_INSTR pshufb, 0, 0, 0 michael@0: AVX_INSTR pshufd, 0, 1, 0 michael@0: AVX_INSTR pshufhw, 0, 1, 0 michael@0: AVX_INSTR pshuflw, 0, 1, 0 michael@0: AVX_INSTR psignb, 0, 0, 0 michael@0: AVX_INSTR psignw, 0, 0, 0 michael@0: AVX_INSTR psignd, 0, 0, 0 michael@0: AVX_INSTR psllw, 0, 0, 0 michael@0: AVX_INSTR pslld, 0, 0, 0 michael@0: AVX_INSTR psllq, 0, 0, 0 michael@0: AVX_INSTR pslldq, 0, 0, 0 michael@0: AVX_INSTR psraw, 0, 0, 0 michael@0: AVX_INSTR psrad, 0, 0, 0 michael@0: AVX_INSTR psrlw, 0, 0, 0 michael@0: AVX_INSTR psrld, 0, 0, 0 michael@0: AVX_INSTR psrlq, 0, 0, 0 michael@0: AVX_INSTR psrldq, 0, 0, 0 michael@0: AVX_INSTR psubb, 0, 0, 0 michael@0: AVX_INSTR psubw, 0, 0, 0 michael@0: AVX_INSTR psubd, 0, 0, 0 michael@0: AVX_INSTR psubq, 0, 0, 0 michael@0: AVX_INSTR psubsb, 0, 0, 0 michael@0: AVX_INSTR psubsw, 0, 0, 0 michael@0: AVX_INSTR psubusb, 0, 0, 0 michael@0: AVX_INSTR psubusw, 0, 0, 0 michael@0: AVX_INSTR ptest, 0, 0, 0 michael@0: AVX_INSTR punpckhbw, 0, 0, 0 michael@0: AVX_INSTR punpckhwd, 0, 0, 0 michael@0: AVX_INSTR punpckhdq, 0, 0, 0 michael@0: AVX_INSTR punpckhqdq, 0, 0, 0 michael@0: AVX_INSTR punpcklbw, 0, 0, 0 michael@0: AVX_INSTR punpcklwd, 0, 0, 0 michael@0: AVX_INSTR punpckldq, 0, 0, 0 michael@0: AVX_INSTR punpcklqdq, 0, 0, 0 michael@0: AVX_INSTR pxor, 0, 0, 1 michael@0: AVX_INSTR shufps, 1, 1, 0 michael@0: AVX_INSTR subpd, 1, 0, 0 michael@0: AVX_INSTR subps, 1, 0, 0 michael@0: AVX_INSTR subsd, 1, 0, 0 michael@0: AVX_INSTR subss, 1, 0, 0 michael@0: AVX_INSTR unpckhpd, 1, 0, 0 michael@0: AVX_INSTR unpckhps, 1, 0, 0 michael@0: AVX_INSTR unpcklpd, 1, 0, 0 michael@0: AVX_INSTR unpcklps, 1, 0, 0 michael@0: AVX_INSTR xorpd, 1, 0, 1 michael@0: AVX_INSTR xorps, 1, 0, 1 michael@0: michael@0: ; 3DNow instructions, for sharing code between AVX, SSE and 3DN michael@0: AVX_INSTR pfadd, 1, 0, 1 michael@0: AVX_INSTR pfsub, 1, 0, 0 michael@0: AVX_INSTR pfmul, 1, 0, 1 michael@0: michael@0: ; base-4 constants for shuffles michael@0: %assign i 0 michael@0: %rep 256 michael@0: %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3) michael@0: %if j < 10 michael@0: CAT_XDEFINE q000, j, i michael@0: %elif j < 100 michael@0: CAT_XDEFINE q00, j, i michael@0: %elif j < 1000 michael@0: CAT_XDEFINE q0, j, i michael@0: %else michael@0: CAT_XDEFINE q, j, i michael@0: %endif michael@0: %assign i i+1 michael@0: %endrep michael@0: %undef i michael@0: %undef j michael@0: michael@0: %macro FMA_INSTR 3 michael@0: %macro %1 4-7 %1, %2, %3 michael@0: %if cpuflag(xop) michael@0: v%5 %1, %2, %3, %4 michael@0: %else michael@0: %6 %1, %2, %3 michael@0: %7 %1, %4 michael@0: %endif michael@0: %endmacro michael@0: %endmacro michael@0: michael@0: FMA_INSTR pmacsdd, pmulld, paddd michael@0: FMA_INSTR pmacsww, pmullw, paddw michael@0: FMA_INSTR pmadcswd, pmaddwd, paddd michael@0: michael@0: ; tzcnt is equivalent to "rep bsf" and is backwards-compatible with bsf. michael@0: ; This lets us use tzcnt without bumping the yasm version requirement yet. michael@0: %define tzcnt rep bsf