michael@0: ! 
michael@0: ! This Source Code Form is subject to the terms of the Mozilla Public
michael@0: ! License, v. 2.0. If a copy of the MPL was not distributed with this
michael@0: ! file, You can obtain one at http://mozilla.org/MPL/2.0/.
michael@0: 
michael@0: ! This file is to be used in place of vis.il in 64-bit builds.
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Pure edge handling instructions
michael@0: !
michael@0: ! int vis_edge8(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge8,16
michael@0: 	edge8	%o0,%o1,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_edge8l(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge8l,16
michael@0: 	edge8l	%o0,%o1,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_edge16(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge16,16
michael@0: 	edge16	%o0,%o1,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_edge16l(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge16l,16
michael@0: 	edge16l	%o0,%o1,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_edge32(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge32,16
michael@0: 	edge32	%o0,%o1,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_edge32l(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge32l,16
michael@0: 	edge32l	%o0,%o1,%o0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Edge handling instructions with negative return values if cc set
michael@0: !
michael@0: ! int vis_edge8cc(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge8cc,16
michael@0: 	edge8	%o0,%o1,%o0
michael@0: 	mov     0,%o1
michael@0: 	movgu   %xcc,-1024,%o1
michael@0: 	or      %o1,%o0,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_edge8lcc(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge8lcc,16
michael@0: 	edge8l	%o0,%o1,%o0
michael@0: 	mov     0,%o1
michael@0: 	movgu   %xcc,-1024,%o1
michael@0: 	or      %o1,%o0,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_edge16cc(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge16cc,16
michael@0: 	edge16	%o0,%o1,%o0
michael@0: 	mov     0,%o1
michael@0: 	movgu   %xcc,-1024,%o1
michael@0: 	or      %o1,%o0,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_edge16lcc(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge16lcc,16
michael@0: 	edge16l	%o0,%o1,%o0
michael@0: 	mov     0,%o1
michael@0: 	movgu   %xcc,-1024,%o1
michael@0: 	or      %o1,%o0,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_edge32cc(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge32cc,16
michael@0: 	edge32	%o0,%o1,%o0
michael@0: 	mov     0,%o1
michael@0: 	movgu   %xcc,-1024,%o1
michael@0: 	or      %o1,%o0,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_edge32lcc(void */*frs1*/, void */*frs2*/);
michael@0: !
michael@0: 	.inline vis_edge32lcc,16
michael@0: 	edge32l	%o0,%o1,%o0
michael@0: 	mov     0,%o1
michael@0: 	movgu   %xcc,-1024,%o1
michael@0: 	or      %o1,%o0,%o0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Alignment instructions
michael@0: !
michael@0: ! void *vis_alignaddr(void */*rs1*/, int /*rs2*/);
michael@0: !
michael@0: 	.inline vis_alignaddr,12
michael@0: 	alignaddr	%o0,%o1,%o0
michael@0: 	.end
michael@0: !
michael@0: ! void *vis_alignaddrl(void */*rs1*/, int /*rs2*/);
michael@0: !
michael@0: 	.inline vis_alignaddrl,12
michael@0: 	alignaddrl	%o0,%o1,%o0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_faligndata(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_faligndata,16
michael@0: 	faligndata	%f0,%f2,%f0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Partitioned comparison instructions
michael@0: !
michael@0: ! int vis_fcmple16(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fcmple16,16
michael@0: 	fcmple16	%f0,%f2,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_fcmpne16(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fcmpne16,16
michael@0: 	fcmpne16	%f0,%f2,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_fcmple32(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fcmple32,16
michael@0: 	fcmple32	%f0,%f2,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_fcmpne32(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fcmpne32,16
michael@0: 	fcmpne32	%f0,%f2,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_fcmpgt16(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fcmpgt16,16
michael@0: 	fcmpgt16	%f0,%f2,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_fcmpeq16(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fcmpeq16,16
michael@0: 	fcmpeq16	%f0,%f2,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_fcmpgt32(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fcmpgt32,16
michael@0: 	fcmpgt32	%f0,%f2,%o0
michael@0: 	.end
michael@0: !
michael@0: ! int vis_fcmpeq32(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fcmpeq32,16
michael@0: 	fcmpeq32	%f0,%f2,%o0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Partitioned arithmetic
michael@0: !
michael@0: ! double vis_fmul8x16(float /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fmul8x16,12
michael@0: 	fmul8x16	%f1,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fmul8x16_dummy(float /*frs1*/, int /*dummy*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fmul8x16_dummy,16
michael@0: 	fmul8x16	%f1,%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fmul8x16au(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fmul8x16au,8
michael@0: 	fmul8x16au	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fmul8x16al(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fmul8x16al,8
michael@0: 	fmul8x16al	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fmul8sux16(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fmul8sux16,16
michael@0: 	fmul8sux16	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fmul8ulx16(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fmul8ulx16,16
michael@0: 	fmul8ulx16	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fmuld8sux16(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fmuld8sux16,8
michael@0: 	fmuld8sux16	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fmuld8ulx16(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fmuld8ulx16,8
michael@0: 	fmuld8ulx16	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fpadd16(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpadd16,16
michael@0: 	fpadd16	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fpadd16s(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpadd16s,8
michael@0: 	fpadd16s	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fpadd32(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpadd32,16
michael@0: 	fpadd32	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fpadd32s(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpadd32s,8
michael@0: 	fpadd32s	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fpsub16(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpsub16,16
michael@0: 	fpsub16	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fpsub16s(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpsub16s,8
michael@0: 	fpsub16s	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fpsub32(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpsub32,16
michael@0: 	fpsub32	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fpsub32s(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpsub32s,8
michael@0: 	fpsub32s	%f1,%f3,%f0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Pixel packing
michael@0: !
michael@0: ! float vis_fpack16(double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpack16,8
michael@0: 	fpack16	%f0,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fpack16_pair(double /*frs2*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpack16_pair,16
michael@0: 	fpack16	%f0,%f0
michael@0: 	fpack16	%f2,%f1
michael@0: 	.end
michael@0: !
michael@0: ! void vis_st2_fpack16(double, double, double *)
michael@0: !
michael@0: 	.inline vis_st2_fpack16,24
michael@0:  	fpack16	%f0,%f0
michael@0:  	fpack16	%f2,%f1
michael@0:  	st	%f0,[%o2+0]
michael@0:  	st	%f1,[%o2+4]
michael@0:  	.end
michael@0: !
michael@0: ! void vis_std_fpack16(double, double, double *)
michael@0: !
michael@0: 	.inline vis_std_fpack16,24
michael@0: 	fpack16	%f0,%f0
michael@0: 	fpack16	%f2,%f1
michael@0: 	std	%f0,[%o2]
michael@0: 	.end
michael@0: !
michael@0: ! void vis_st2_fpackfix(double, double, double *)
michael@0: !
michael@0: 	.inline vis_st2_fpackfix,24
michael@0:  	fpackfix %f0,%f0
michael@0:  	fpackfix %f2,%f1
michael@0:  	st	%f0,[%o2+0]
michael@0:  	st	%f1,[%o2+4]
michael@0:  	.end
michael@0: !
michael@0: ! double vis_fpack16_to_hi(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpack16_to_hi,16
michael@0: 	fpack16	%f2,%f0
michael@0: 	.end
michael@0: 
michael@0: ! double vis_fpack16_to_lo(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpack16_to_lo,16
michael@0: 	fpack16	%f2,%f3
michael@0: 	fmovs	%f3,%f1		/* without this, optimizer goes wrong */
michael@0: 	.end
michael@0: 
michael@0: !
michael@0: ! double vis_fpack32(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpack32,16
michael@0: 	fpack32	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fpackfix(double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpackfix,8
michael@0: 	fpackfix	%f0,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fpackfix_pair(double /*frs2*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpackfix_pair,16
michael@0: 	fpackfix	%f0,%f0
michael@0: 	fpackfix	%f2,%f1
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Motion estimation
michael@0: !
michael@0: ! double vis_pxldist64(double accum /*frd*/, double pxls1 /*frs1*/, 
michael@0: !		       double pxls2 /*frs2*/);
michael@0: !
michael@0: 	.inline vis_pxldist64,24
michael@0: 	pdist	%f2,%f4,%f0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Channel merging
michael@0: !
michael@0: ! double vis_fpmerge(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fpmerge,8
michael@0: 	fpmerge	%f1,%f3,%f0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Pixel expansion
michael@0: !
michael@0: ! double vis_fexpand(float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fexpand,4
michael@0: 	fexpand	%f1,%f0
michael@0: 	.end
michael@0: 
michael@0: ! double vis_fexpand_hi(double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fexpand_hi,8
michael@0: 	fexpand	%f0,%f0
michael@0: 	.end
michael@0: 
michael@0: ! double vis_fexpand_lo(double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fexpand_lo,8
michael@0: 	fexpand	%f1,%f0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Bitwise logical operations
michael@0: !
michael@0: ! double vis_fnor(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fnor,16
michael@0: 	fnor	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fnors(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fnors,8
michael@0: 	fnors	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fandnot(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fandnot,16
michael@0: 	fandnot1 %f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fandnots(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fandnots,8
michael@0: 	fandnot1s %f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fnot(double /*frs1*/);
michael@0: !
michael@0: 	.inline vis_fnot,8
michael@0: 	fnot1	%f0,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fnots(float /*frs1*/);
michael@0: !
michael@0: 	.inline vis_fnots,4
michael@0: 	fnot1s	%f1,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fxor(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fxor,16
michael@0: 	fxor	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fxors(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fxors,8
michael@0: 	fxors	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fnand(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fnand,16
michael@0: 	fnand	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fnands(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fnands,8
michael@0: 	fnands	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fand(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fand,16
michael@0: 	fand	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fands(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fands,8
michael@0: 	fands	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fxnor(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fxnor,16
michael@0: 	fxnor	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fxnors(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fxnors,8
michael@0: 	fxnors	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fsrc(double /*frs1*/);
michael@0: !
michael@0: 	.inline vis_fsrc,8
michael@0: 	fsrc1	%f0,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fsrcs(float /*frs1*/);
michael@0: !
michael@0: 	.inline vis_fsrcs,4
michael@0: 	fsrc1s	%f1,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fornot(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fornot,16
michael@0: 	fornot1	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fornots(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fornots,8
michael@0: 	fornot1s %f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_for(double /*frs1*/, double /*frs2*/);
michael@0: !
michael@0: 	.inline vis_for,16
michael@0: 	for	%f0,%f2,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fors(float /*frs1*/, float /*frs2*/);
michael@0: !
michael@0: 	.inline vis_fors,8
michael@0: 	fors	%f1,%f3,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fzero(/* void */)
michael@0: !
michael@0: 	.inline	vis_fzero,0
michael@0: 	fzero	%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fzeros(/* void */)
michael@0: !
michael@0: 	.inline	vis_fzeros,0
michael@0: 	fzeros	%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_fone(/* void */)
michael@0: !
michael@0: 	.inline	vis_fone,0
michael@0: 	fone	%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_fones(/* void */)
michael@0: !
michael@0: 	.inline	vis_fones,0
michael@0: 	fones	%f0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Partial store instructions
michael@0: !
michael@0: ! vis_stdfa_ASI_PST8P(double frd, void *rs1, int rmask)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_PST8P,20
michael@0: 	stda	%f0,[%o1]%o2,0xc0	! ASI_PST8_P
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_PST8PL(double frd, void *rs1, int rmask)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_PST8PL,20
michael@0: 	stda	%f0,[%o1]%o2,0xc8	! ASI_PST8_PL
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_PST8P_int_pair(void *rs1, void *rs2, void *rs3, int rmask);
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_PST8P_int_pair,28
michael@0:         ld	[%o0],%f4
michael@0:         ld	[%o1],%f5
michael@0: 	stda	%f4,[%o2]%o3,0xc0	! ASI_PST8_P
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_PST8S(double frd, void *rs1, int rmask)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_PST8S,20
michael@0: 	stda	%f0,[%o1]%o2,0xc1	! ASI_PST8_S
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_PST16P(double frd, void *rs1, int rmask)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_PST16P,20
michael@0: 	stda	%f0,[%o1]%o2,0xc2	! ASI_PST16_P
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_PST16S(double frd, void *rs1, int rmask)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_PST16S,20
michael@0: 	stda	%f0,[%o1]%o2,0xc3	! ASI_PST16_S
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_PST32P(double frd, void *rs1, int rmask)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_PST32P,20
michael@0: 	stda	%f0,[%o1]%o2,0xc4	! ASI_PST32_P
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_PST32S(double frd, void *rs1, int rmask)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_PST32S,20
michael@0: 	stda	%f0,[%o1]%o2,0xc5	! ASI_PST32_S
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Short store instructions
michael@0: !
michael@0: ! vis_stdfa_ASI_FL8P(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_FL8P,16
michael@0: 	stda	%f0,[%o1]0xd0	! ASI_FL8_P
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_FL8P_index(double frd, void *rs1, long index)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_FL8P_index,24
michael@0: 	stda	%f0,[%o1+%o2]0xd0 ! ASI_FL8_P
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_FL8S(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_FL8S,16
michael@0: 	stda	%f0,[%o1]0xd1	! ASI_FL8_S
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_FL16P(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_FL16P,16
michael@0: 	stda	%f0,[%o1]0xd2	! ASI_FL16_P
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_FL16P_index(double frd, void *rs1, long index)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_FL16P_index,24
michael@0: 	stda	%f0,[%o1+%o2]0xd2 ! ASI_FL16_P
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_FL16S(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_FL16S,16
michael@0: 	stda	%f0,[%o1]0xd3	! ASI_FL16_S
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_FL8PL(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_FL8PL,16
michael@0: 	stda	%f0,[%o1]0xd8	! ASI_FL8_PL
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_FL8SL(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_FL8SL,16
michael@0: 	stda	%f0,[%o1]0xd9	! ASI_FL8_SL
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_FL16PL(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_FL16PL,16
michael@0: 	stda	%f0,[%o1]0xda	! ASI_FL16_PL
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_FL16SL(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_FL16SL,16
michael@0: 	stda	%f0,[%o1]0xdb	! ASI_FL16_SL
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Short load instructions
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL8P(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL8P,8
michael@0: 	ldda	[%o0]0xd0,%f4	! ASI_FL8_P
michael@0: 	fmovd	%f4,%f0	        ! Compiler can clean this up
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL8P_index(void *rs1, long index)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL8P_index,16
michael@0: 	ldda	[%o0+%o1]0xd0,%f4
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL8P_hi(void *rs1, unsigned int index)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL8P_hi,12
michael@0: 	sra     %o1,16,%o1
michael@0: 	ldda	[%o0+%o1]0xd0,%f4
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL8P_lo(void *rs1, unsigned int index)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL8P_lo,12
michael@0: 	sll     %o1,16,%o1
michael@0: 	sra     %o1,16,%o1
michael@0: 	ldda	[%o0+%o1]0xd0,%f4
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL8S(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL8S,8
michael@0: 	ldda	[%o0]0xd1,%f4	! ASI_FL8_S
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL16P(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL16P,8
michael@0: 	ldda	[%o0]0xd2,%f4	! ASI_FL16_P
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL16P_index(void *rs1, long index)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL16P_index,16
michael@0: 	ldda	[%o0+%o1]0xd2,%f4 ! ASI_FL16_P
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL16S(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL16S,8
michael@0: 	ldda	[%o0]0xd3,%f4	! ASI_FL16_S
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL8PL(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL8PL,8
michael@0: 	ldda	[%o0]0xd8,%f4	! ASI_FL8_PL
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL8PL_index(void *rs1, long index)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL8PL_index,16
michael@0: 	ldda	[%o0+%o1]0xd8,%f4	! ASI_FL8_PL
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL8SL(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL8SL,8
michael@0: 	ldda	[%o0]0xd9,%f4	! ASI_FL8_SL
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL16PL(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL16PL,8
michael@0: 	ldda	[%o0]0xda,%f4	! ASI_FL16_PL
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL16PL_index(void *rs1, long index)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL16PL_index,16
michael@0: 	ldda	[%o0+%o1]0xda,%f4	! ASI_FL16_PL
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_FL16SL(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_FL16SL,8
michael@0: 	ldda	[%o0]0xdb,%f4	! ASI_FL16_SL
michael@0: 	fmovd	%f4,%f0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Graphics status register
michael@0: !
michael@0: ! unsigned int vis_read_gsr(void)
michael@0: !
michael@0: 	.inline vis_read_gsr,0
michael@0: 	rd	%gsr,%o0
michael@0: 	.end
michael@0: !
michael@0: ! void vis_write_gsr(unsigned int /* GSR */)
michael@0: !
michael@0: 	.inline vis_write_gsr,4
michael@0: 	wr	%g0,%o0,%gsr
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Voxel texture mapping
michael@0: !
michael@0: ! unsigned long vis_array8(unsigned long long /*rs1 */, int /*rs2*/)
michael@0: !
michael@0: 	.inline	vis_array8,12
michael@0: 	array8	%o0,%o1,%o0
michael@0: 	.end
michael@0: !
michael@0: ! unsigned long vis_array16(unsigned long long /*rs1*/, int /*rs2*/)
michael@0: !
michael@0: 	.inline	vis_array16,12
michael@0: 	array16	%o0,%o1,%o0
michael@0: 	.end
michael@0: !
michael@0: ! unsigned long vis_array32(unsigned long long /*rs1*/, int /*rs2*/)
michael@0: !
michael@0: 	.inline	vis_array32,12
michael@0: 	array32	%o0,%o1,%o0
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Register aliasing and type casts
michael@0: !
michael@0: ! float vis_read_hi(double /* frs1 */);
michael@0: !
michael@0: 	.inline vis_read_hi,8
michael@0: 	fmovs	%f0,%f0
michael@0: 	.end
michael@0: !
michael@0: ! float vis_read_lo(double /* frs1 */);
michael@0: !
michael@0: 	.inline vis_read_lo,8
michael@0: 	fmovs	%f1,%f0		! %f0 = low word (frs1); return %f0;
michael@0: 	.end
michael@0: !
michael@0: ! double vis_write_hi(double /* frs1 */, float /* frs2 */);
michael@0: !
michael@0: 	.inline vis_write_hi,12
michael@0: 	fmovs	%f3,%f0		! %f3 = float frs2; return %f0:f1;
michael@0: 	.end
michael@0: !
michael@0: ! double vis_write_lo(double /* frs1 */, float /* frs2 */);
michael@0: !
michael@0: 	.inline vis_write_lo,12
michael@0: 	fmovs	%f3,%f1		! %f3 = float frs2; return %f0:f1;
michael@0: 	.end
michael@0: !
michael@0: ! double vis_freg_pair(float /* frs1 */, float /* frs2 */);
michael@0: !
michael@0: 	.inline vis_freg_pair,8
michael@0: 	fmovs	%f1,%f0		! %f1 = float frs1; put in hi;
michael@0: 	fmovs	%f3,%f1		! %f3 = float frs2; put in lo; return %f0:f1;
michael@0: 	.end
michael@0: !
michael@0: ! float vis_to_float(unsigned int /*value*/);
michael@0: !
michael@0: 	.inline vis_to_float,4
michael@0: 	st	%o0,[%sp+2183]
michael@0: 	ld	[%sp+2183],%f0
michael@0: 	.end
michael@0: !
michael@0: ! double vis_to_double(unsigned int /*value1*/, unsigned int /*value2*/);
michael@0: !
michael@0: 	.inline vis_to_double,8
michael@0: 	st	%o0,[%sp+2183]
michael@0: 	ld	[%sp+2183],%f0
michael@0: 	st	%o1,[%sp+2183]
michael@0: 	ld	[%sp+2183],%f1
michael@0: 	.end
michael@0: !
michael@0: ! double vis_to_double_dup(unsigned int /*value*/);
michael@0: !
michael@0: 	.inline vis_to_double_dup,4
michael@0: 	st	%o0,[%sp+2183]
michael@0: 	ld	[%sp+2183],%f1
michael@0: 	fmovs	%f1,%f0		! duplicate value
michael@0: 	.end
michael@0: !
michael@0: ! double vis_ll_to_double(unsigned long long /*value*/);
michael@0: !
michael@0: 	.inline vis_ll_to_double,8
michael@0: 	stx     %o0,[%sp+2183]
michael@0: 	ldd     [%sp+2183],%f0
michael@0:         .end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Address space identifier (ASI) register
michael@0: !
michael@0: ! unsigned int vis_read_asi(void)
michael@0: !
michael@0: 	.inline vis_read_asi,0
michael@0: 	rd	%asi,%o0
michael@0: 	.end
michael@0: !
michael@0: ! void vis_write_asi(unsigned int /* ASI */)
michael@0: !
michael@0: 	.inline vis_write_asi,4
michael@0: 	wr	%g0,%o0,%asi
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Load/store from/into alternate space
michael@0: !
michael@0: ! float vis_ldfa_ASI_REG(void *rs1)
michael@0: !
michael@0: 	.inline vis_ldfa_ASI_REG,8
michael@0: 	lda	[%o0+0]%asi,%f4
michael@0: 	fmovs	%f4,%f0	        ! Compiler can clean this up
michael@0: 	.end
michael@0: !
michael@0: ! float vis_ldfa_ASI_P(void *rs1)
michael@0: !
michael@0: 	.inline vis_ldfa_ASI_P,8
michael@0: 	lda	[%o0]0x80,%f4	! ASI_P
michael@0: 	fmovs	%f4,%f0	        ! Compiler can clean this up
michael@0: 	.end
michael@0: !
michael@0: ! float vis_ldfa_ASI_PL(void *rs1)
michael@0: !
michael@0: 	.inline vis_ldfa_ASI_PL,8
michael@0: 	lda	[%o0]0x88,%f4	! ASI_PL
michael@0: 	fmovs	%f4,%f0	        ! Compiler can clean this up
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_REG(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_REG,8
michael@0: 	ldda	[%o0+0]%asi,%f4
michael@0: 	fmovd	%f4,%f0	        ! Compiler can clean this up
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_P(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_P,8
michael@0: 	ldda	[%o0]0x80,%f4	! ASI_P
michael@0: 	fmovd	%f4,%f0	        ! Compiler can clean this up
michael@0: 	.end
michael@0: !
michael@0: ! double vis_lddfa_ASI_PL(void *rs1)
michael@0: !
michael@0: 	.inline vis_lddfa_ASI_PL,8
michael@0: 	ldda	[%o0]0x88,%f4	! ASI_PL
michael@0: 	fmovd	%f4,%f0	        ! Compiler can clean this up
michael@0: 	.end
michael@0: !
michael@0: ! vis_stfa_ASI_REG(float frs, void *rs1)
michael@0: !
michael@0: 	.inline vis_stfa_ASI_REG,12
michael@0: 	sta	%f1,[%o1+0]%asi
michael@0: 	.end
michael@0: !
michael@0: ! vis_stfa_ASI_P(float frs, void *rs1)
michael@0: !
michael@0: 	.inline vis_stfa_ASI_P,12
michael@0: 	sta	%f1,[%o1]0x80	! ASI_P
michael@0: 	.end
michael@0: !
michael@0: ! vis_stfa_ASI_PL(float frs, void *rs1)
michael@0: !
michael@0: 	.inline vis_stfa_ASI_PL,12
michael@0: 	sta	%f1,[%o1]0x88	! ASI_PL
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_REG(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_REG,16
michael@0: 	stda	%f0,[%o1+0]%asi
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_P(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_P,16
michael@0: 	stda	%f0,[%o1]0x80	! ASI_P
michael@0: 	.end
michael@0: !
michael@0: ! vis_stdfa_ASI_PL(double frd, void *rs1)
michael@0: !
michael@0: 	.inline vis_stdfa_ASI_PL,16
michael@0: 	stda	%f0,[%o1]0x88	! ASI_PL
michael@0: 	.end
michael@0: !
michael@0: ! unsigned short vis_lduha_ASI_REG(void *rs1)
michael@0: !
michael@0: 	.inline vis_lduha_ASI_REG,8
michael@0: 	lduha	[%o0+0]%asi,%o0
michael@0: 	.end
michael@0: !
michael@0: ! unsigned short vis_lduha_ASI_P(void *rs1)
michael@0: !
michael@0: 	.inline vis_lduha_ASI_P,8
michael@0: 	lduha	[%o0]0x80,%o0	! ASI_P
michael@0: 	.end
michael@0: !
michael@0: ! unsigned short vis_lduha_ASI_PL(void *rs1)
michael@0: !
michael@0: 	.inline vis_lduha_ASI_PL,8
michael@0: 	lduha	[%o0]0x88,%o0	! ASI_PL
michael@0: 	.end
michael@0: !
michael@0: ! unsigned short vis_lduha_ASI_P_index(void *rs1, long index)
michael@0: !
michael@0: 	.inline vis_lduha_ASI_P_index,16
michael@0: 	lduha	[%o0+%o1]0x80,%o0	! ASI_P
michael@0: 	.end
michael@0: !
michael@0: ! unsigned short vis_lduha_ASI_PL_index(void *rs1, long index)
michael@0: !
michael@0: 	.inline vis_lduha_ASI_PL_index,16
michael@0: 	lduha	[%o0+%o1]0x88,%o0	! ASI_PL
michael@0: 	.end
michael@0: 
michael@0: !--------------------------------------------------------------------
michael@0: ! Prefetch
michael@0: !
michael@0: ! void vis_prefetch_read(void * /*address*/);
michael@0: !
michael@0: 	.inline vis_prefetch_read,8
michael@0: 	prefetch	[%o0+0],0
michael@0: 	.end
michael@0: !
michael@0: ! void vis_prefetch_write(void * /*address*/);
michael@0: !
michael@0: 	.inline vis_prefetch_write,8
michael@0: 	prefetch	[%o0+0],2
michael@0: 	.end