Wed, 31 Dec 2014 06:09:35 +0100
Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.
michael@0 | 1 | /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*- |
michael@0 | 2 | * vim: set ts=8 sts=4 et sw=4 tw=99: |
michael@0 | 3 | * This Source Code Form is subject to the terms of the Mozilla Public |
michael@0 | 4 | * License, v. 2.0. If a copy of the MPL was not distributed with this |
michael@0 | 5 | * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ |
michael@0 | 6 | |
michael@0 | 7 | #ifndef jit_RegisterSets_h |
michael@0 | 8 | #define jit_RegisterSets_h |
michael@0 | 9 | |
michael@0 | 10 | #include "mozilla/Alignment.h" |
michael@0 | 11 | #include "mozilla/MathAlgorithms.h" |
michael@0 | 12 | |
michael@0 | 13 | #include "jit/IonAllocPolicy.h" |
michael@0 | 14 | #include "jit/Registers.h" |
michael@0 | 15 | |
michael@0 | 16 | namespace js { |
michael@0 | 17 | namespace jit { |
michael@0 | 18 | |
michael@0 | 19 | struct AnyRegister { |
michael@0 | 20 | typedef uint32_t Code; |
michael@0 | 21 | |
michael@0 | 22 | static const uint32_t Total = Registers::Total + FloatRegisters::Total; |
michael@0 | 23 | static const uint32_t Invalid = UINT_MAX; |
michael@0 | 24 | |
michael@0 | 25 | union { |
michael@0 | 26 | Registers::Code gpr_; |
michael@0 | 27 | FloatRegisters::Code fpu_; |
michael@0 | 28 | }; |
michael@0 | 29 | bool isFloat_; |
michael@0 | 30 | |
michael@0 | 31 | AnyRegister() |
michael@0 | 32 | { } |
michael@0 | 33 | explicit AnyRegister(Register gpr) { |
michael@0 | 34 | gpr_ = gpr.code(); |
michael@0 | 35 | isFloat_ = false; |
michael@0 | 36 | } |
michael@0 | 37 | explicit AnyRegister(FloatRegister fpu) { |
michael@0 | 38 | fpu_ = fpu.code(); |
michael@0 | 39 | isFloat_ = true; |
michael@0 | 40 | } |
michael@0 | 41 | static AnyRegister FromCode(uint32_t i) { |
michael@0 | 42 | JS_ASSERT(i < Total); |
michael@0 | 43 | AnyRegister r; |
michael@0 | 44 | if (i < Registers::Total) { |
michael@0 | 45 | r.gpr_ = Register::Code(i); |
michael@0 | 46 | r.isFloat_ = false; |
michael@0 | 47 | } else { |
michael@0 | 48 | r.fpu_ = FloatRegister::Code(i - Registers::Total); |
michael@0 | 49 | r.isFloat_ = true; |
michael@0 | 50 | } |
michael@0 | 51 | return r; |
michael@0 | 52 | } |
michael@0 | 53 | bool isFloat() const { |
michael@0 | 54 | return isFloat_; |
michael@0 | 55 | } |
michael@0 | 56 | Register gpr() const { |
michael@0 | 57 | JS_ASSERT(!isFloat()); |
michael@0 | 58 | return Register::FromCode(gpr_); |
michael@0 | 59 | } |
michael@0 | 60 | FloatRegister fpu() const { |
michael@0 | 61 | JS_ASSERT(isFloat()); |
michael@0 | 62 | return FloatRegister::FromCode(fpu_); |
michael@0 | 63 | } |
michael@0 | 64 | bool operator ==(const AnyRegister &other) const { |
michael@0 | 65 | return isFloat() |
michael@0 | 66 | ? (other.isFloat() && fpu_ == other.fpu_) |
michael@0 | 67 | : (!other.isFloat() && gpr_ == other.gpr_); |
michael@0 | 68 | } |
michael@0 | 69 | bool operator !=(const AnyRegister &other) const { |
michael@0 | 70 | return isFloat() |
michael@0 | 71 | ? (!other.isFloat() || fpu_ != other.fpu_) |
michael@0 | 72 | : (other.isFloat() || gpr_ != other.gpr_); |
michael@0 | 73 | } |
michael@0 | 74 | const char *name() const { |
michael@0 | 75 | return isFloat() |
michael@0 | 76 | ? FloatRegister::FromCode(fpu_).name() |
michael@0 | 77 | : Register::FromCode(gpr_).name(); |
michael@0 | 78 | } |
michael@0 | 79 | const Code code() const { |
michael@0 | 80 | return isFloat() |
michael@0 | 81 | ? fpu_ + Registers::Total |
michael@0 | 82 | : gpr_; |
michael@0 | 83 | } |
michael@0 | 84 | bool volatile_() const { |
michael@0 | 85 | return isFloat() ? fpu().volatile_() : gpr().volatile_(); |
michael@0 | 86 | } |
michael@0 | 87 | }; |
michael@0 | 88 | |
michael@0 | 89 | // Registers to hold a boxed value. Uses one register on 64 bit |
michael@0 | 90 | // platforms, two registers on 32 bit platforms. |
michael@0 | 91 | class ValueOperand |
michael@0 | 92 | { |
michael@0 | 93 | #if defined(JS_NUNBOX32) |
michael@0 | 94 | Register type_; |
michael@0 | 95 | Register payload_; |
michael@0 | 96 | |
michael@0 | 97 | public: |
michael@0 | 98 | MOZ_CONSTEXPR ValueOperand(Register type, Register payload) |
michael@0 | 99 | : type_(type), payload_(payload) |
michael@0 | 100 | { } |
michael@0 | 101 | |
michael@0 | 102 | Register typeReg() const { |
michael@0 | 103 | return type_; |
michael@0 | 104 | } |
michael@0 | 105 | Register payloadReg() const { |
michael@0 | 106 | return payload_; |
michael@0 | 107 | } |
michael@0 | 108 | |
michael@0 | 109 | Register scratchReg() const { |
michael@0 | 110 | return payloadReg(); |
michael@0 | 111 | } |
michael@0 | 112 | bool operator==(const ValueOperand &o) const { |
michael@0 | 113 | return type_ == o.type_ && payload_ == o.payload_; |
michael@0 | 114 | } |
michael@0 | 115 | bool operator!=(const ValueOperand &o) const { |
michael@0 | 116 | return !(*this == o); |
michael@0 | 117 | } |
michael@0 | 118 | |
michael@0 | 119 | #elif defined(JS_PUNBOX64) |
michael@0 | 120 | Register value_; |
michael@0 | 121 | |
michael@0 | 122 | public: |
michael@0 | 123 | explicit MOZ_CONSTEXPR ValueOperand(Register value) |
michael@0 | 124 | : value_(value) |
michael@0 | 125 | { } |
michael@0 | 126 | |
michael@0 | 127 | Register valueReg() const { |
michael@0 | 128 | return value_; |
michael@0 | 129 | } |
michael@0 | 130 | |
michael@0 | 131 | Register scratchReg() const { |
michael@0 | 132 | return valueReg(); |
michael@0 | 133 | } |
michael@0 | 134 | bool operator==(const ValueOperand &o) const { |
michael@0 | 135 | return value_ == o.value_; |
michael@0 | 136 | } |
michael@0 | 137 | bool operator!=(const ValueOperand &o) const { |
michael@0 | 138 | return !(*this == o); |
michael@0 | 139 | } |
michael@0 | 140 | #endif |
michael@0 | 141 | |
michael@0 | 142 | ValueOperand() {} |
michael@0 | 143 | }; |
michael@0 | 144 | |
michael@0 | 145 | // Registers to hold either either a typed or untyped value. |
michael@0 | 146 | class TypedOrValueRegister |
michael@0 | 147 | { |
michael@0 | 148 | // Type of value being stored. |
michael@0 | 149 | MIRType type_; |
michael@0 | 150 | |
michael@0 | 151 | // Space to hold either an AnyRegister or a ValueOperand. |
michael@0 | 152 | union U { |
michael@0 | 153 | mozilla::AlignedStorage2<AnyRegister> typed; |
michael@0 | 154 | mozilla::AlignedStorage2<ValueOperand> value; |
michael@0 | 155 | } data; |
michael@0 | 156 | |
michael@0 | 157 | AnyRegister &dataTyped() { |
michael@0 | 158 | JS_ASSERT(hasTyped()); |
michael@0 | 159 | return *data.typed.addr(); |
michael@0 | 160 | } |
michael@0 | 161 | ValueOperand &dataValue() { |
michael@0 | 162 | JS_ASSERT(hasValue()); |
michael@0 | 163 | return *data.value.addr(); |
michael@0 | 164 | } |
michael@0 | 165 | |
michael@0 | 166 | const AnyRegister &dataTyped() const { |
michael@0 | 167 | JS_ASSERT(hasTyped()); |
michael@0 | 168 | return *data.typed.addr(); |
michael@0 | 169 | } |
michael@0 | 170 | const ValueOperand &dataValue() const { |
michael@0 | 171 | JS_ASSERT(hasValue()); |
michael@0 | 172 | return *data.value.addr(); |
michael@0 | 173 | } |
michael@0 | 174 | |
michael@0 | 175 | public: |
michael@0 | 176 | |
michael@0 | 177 | TypedOrValueRegister() |
michael@0 | 178 | : type_(MIRType_None) |
michael@0 | 179 | {} |
michael@0 | 180 | |
michael@0 | 181 | TypedOrValueRegister(MIRType type, AnyRegister reg) |
michael@0 | 182 | : type_(type) |
michael@0 | 183 | { |
michael@0 | 184 | dataTyped() = reg; |
michael@0 | 185 | } |
michael@0 | 186 | |
michael@0 | 187 | TypedOrValueRegister(ValueOperand value) |
michael@0 | 188 | : type_(MIRType_Value) |
michael@0 | 189 | { |
michael@0 | 190 | dataValue() = value; |
michael@0 | 191 | } |
michael@0 | 192 | |
michael@0 | 193 | MIRType type() const { |
michael@0 | 194 | return type_; |
michael@0 | 195 | } |
michael@0 | 196 | |
michael@0 | 197 | bool hasTyped() const { |
michael@0 | 198 | return type() != MIRType_None && type() != MIRType_Value; |
michael@0 | 199 | } |
michael@0 | 200 | |
michael@0 | 201 | bool hasValue() const { |
michael@0 | 202 | return type() == MIRType_Value; |
michael@0 | 203 | } |
michael@0 | 204 | |
michael@0 | 205 | AnyRegister typedReg() const { |
michael@0 | 206 | return dataTyped(); |
michael@0 | 207 | } |
michael@0 | 208 | |
michael@0 | 209 | ValueOperand valueReg() const { |
michael@0 | 210 | return dataValue(); |
michael@0 | 211 | } |
michael@0 | 212 | |
michael@0 | 213 | AnyRegister scratchReg() { |
michael@0 | 214 | if (hasValue()) |
michael@0 | 215 | return AnyRegister(valueReg().scratchReg()); |
michael@0 | 216 | return typedReg(); |
michael@0 | 217 | } |
michael@0 | 218 | }; |
michael@0 | 219 | |
michael@0 | 220 | // A constant value, or registers to hold a typed/untyped value. |
michael@0 | 221 | class ConstantOrRegister |
michael@0 | 222 | { |
michael@0 | 223 | // Whether a constant value is being stored. |
michael@0 | 224 | bool constant_; |
michael@0 | 225 | |
michael@0 | 226 | // Space to hold either a Value or a TypedOrValueRegister. |
michael@0 | 227 | union U { |
michael@0 | 228 | mozilla::AlignedStorage2<Value> constant; |
michael@0 | 229 | mozilla::AlignedStorage2<TypedOrValueRegister> reg; |
michael@0 | 230 | } data; |
michael@0 | 231 | |
michael@0 | 232 | Value &dataValue() { |
michael@0 | 233 | JS_ASSERT(constant()); |
michael@0 | 234 | return *data.constant.addr(); |
michael@0 | 235 | } |
michael@0 | 236 | TypedOrValueRegister &dataReg() { |
michael@0 | 237 | JS_ASSERT(!constant()); |
michael@0 | 238 | return *data.reg.addr(); |
michael@0 | 239 | } |
michael@0 | 240 | |
michael@0 | 241 | public: |
michael@0 | 242 | |
michael@0 | 243 | ConstantOrRegister() |
michael@0 | 244 | {} |
michael@0 | 245 | |
michael@0 | 246 | ConstantOrRegister(Value value) |
michael@0 | 247 | : constant_(true) |
michael@0 | 248 | { |
michael@0 | 249 | dataValue() = value; |
michael@0 | 250 | } |
michael@0 | 251 | |
michael@0 | 252 | ConstantOrRegister(TypedOrValueRegister reg) |
michael@0 | 253 | : constant_(false) |
michael@0 | 254 | { |
michael@0 | 255 | dataReg() = reg; |
michael@0 | 256 | } |
michael@0 | 257 | |
michael@0 | 258 | bool constant() { |
michael@0 | 259 | return constant_; |
michael@0 | 260 | } |
michael@0 | 261 | |
michael@0 | 262 | Value value() { |
michael@0 | 263 | return dataValue(); |
michael@0 | 264 | } |
michael@0 | 265 | |
michael@0 | 266 | TypedOrValueRegister reg() { |
michael@0 | 267 | return dataReg(); |
michael@0 | 268 | } |
michael@0 | 269 | }; |
michael@0 | 270 | |
michael@0 | 271 | struct Int32Key { |
michael@0 | 272 | bool isRegister_; |
michael@0 | 273 | union { |
michael@0 | 274 | Register reg_; |
michael@0 | 275 | int32_t constant_; |
michael@0 | 276 | }; |
michael@0 | 277 | |
michael@0 | 278 | explicit Int32Key(Register reg) |
michael@0 | 279 | : isRegister_(true), reg_(reg) |
michael@0 | 280 | { } |
michael@0 | 281 | |
michael@0 | 282 | explicit Int32Key(int32_t index) |
michael@0 | 283 | : isRegister_(false), constant_(index) |
michael@0 | 284 | { } |
michael@0 | 285 | |
michael@0 | 286 | inline void bumpConstant(int diff) { |
michael@0 | 287 | JS_ASSERT(!isRegister_); |
michael@0 | 288 | constant_ += diff; |
michael@0 | 289 | } |
michael@0 | 290 | inline Register reg() const { |
michael@0 | 291 | JS_ASSERT(isRegister_); |
michael@0 | 292 | return reg_; |
michael@0 | 293 | } |
michael@0 | 294 | inline int32_t constant() const { |
michael@0 | 295 | JS_ASSERT(!isRegister_); |
michael@0 | 296 | return constant_; |
michael@0 | 297 | } |
michael@0 | 298 | inline bool isRegister() const { |
michael@0 | 299 | return isRegister_; |
michael@0 | 300 | } |
michael@0 | 301 | inline bool isConstant() const { |
michael@0 | 302 | return !isRegister_; |
michael@0 | 303 | } |
michael@0 | 304 | }; |
michael@0 | 305 | |
michael@0 | 306 | template <typename T> |
michael@0 | 307 | class TypedRegisterSet |
michael@0 | 308 | { |
michael@0 | 309 | uint32_t bits_; |
michael@0 | 310 | |
michael@0 | 311 | public: |
michael@0 | 312 | explicit MOZ_CONSTEXPR TypedRegisterSet(uint32_t bits) |
michael@0 | 313 | : bits_(bits) |
michael@0 | 314 | { } |
michael@0 | 315 | |
michael@0 | 316 | MOZ_CONSTEXPR TypedRegisterSet() : bits_(0) |
michael@0 | 317 | { } |
michael@0 | 318 | MOZ_CONSTEXPR TypedRegisterSet(const TypedRegisterSet<T> &set) : bits_(set.bits_) |
michael@0 | 319 | { } |
michael@0 | 320 | |
michael@0 | 321 | static inline TypedRegisterSet All() { |
michael@0 | 322 | return TypedRegisterSet(T::Codes::AllocatableMask); |
michael@0 | 323 | } |
michael@0 | 324 | static inline TypedRegisterSet Intersect(const TypedRegisterSet &lhs, |
michael@0 | 325 | const TypedRegisterSet &rhs) { |
michael@0 | 326 | return TypedRegisterSet(lhs.bits_ & rhs.bits_); |
michael@0 | 327 | } |
michael@0 | 328 | static inline TypedRegisterSet Union(const TypedRegisterSet &lhs, |
michael@0 | 329 | const TypedRegisterSet &rhs) { |
michael@0 | 330 | return TypedRegisterSet(lhs.bits_ | rhs.bits_); |
michael@0 | 331 | } |
michael@0 | 332 | static inline TypedRegisterSet Not(const TypedRegisterSet &in) { |
michael@0 | 333 | return TypedRegisterSet(~in.bits_ & T::Codes::AllocatableMask); |
michael@0 | 334 | } |
michael@0 | 335 | static inline TypedRegisterSet VolatileNot(const TypedRegisterSet &in) { |
michael@0 | 336 | const uint32_t allocatableVolatile = |
michael@0 | 337 | T::Codes::AllocatableMask & T::Codes::VolatileMask; |
michael@0 | 338 | return TypedRegisterSet(~in.bits_ & allocatableVolatile); |
michael@0 | 339 | } |
michael@0 | 340 | static inline TypedRegisterSet Volatile() { |
michael@0 | 341 | return TypedRegisterSet(T::Codes::AllocatableMask & T::Codes::VolatileMask); |
michael@0 | 342 | } |
michael@0 | 343 | static inline TypedRegisterSet NonVolatile() { |
michael@0 | 344 | return TypedRegisterSet(T::Codes::AllocatableMask & T::Codes::NonVolatileMask); |
michael@0 | 345 | } |
michael@0 | 346 | bool has(T reg) const { |
michael@0 | 347 | return !!(bits_ & (1 << reg.code())); |
michael@0 | 348 | } |
michael@0 | 349 | void addUnchecked(T reg) { |
michael@0 | 350 | bits_ |= (1 << reg.code()); |
michael@0 | 351 | } |
michael@0 | 352 | void add(T reg) { |
michael@0 | 353 | JS_ASSERT(!has(reg)); |
michael@0 | 354 | addUnchecked(reg); |
michael@0 | 355 | } |
michael@0 | 356 | void add(ValueOperand value) { |
michael@0 | 357 | #if defined(JS_NUNBOX32) |
michael@0 | 358 | add(value.payloadReg()); |
michael@0 | 359 | add(value.typeReg()); |
michael@0 | 360 | #elif defined(JS_PUNBOX64) |
michael@0 | 361 | add(value.valueReg()); |
michael@0 | 362 | #else |
michael@0 | 363 | #error "Bad architecture" |
michael@0 | 364 | #endif |
michael@0 | 365 | } |
michael@0 | 366 | // Determemine if some register are still allocated. This function should |
michael@0 | 367 | // be used with the set of allocatable registers used for the initialization |
michael@0 | 368 | // of the current set. |
michael@0 | 369 | bool someAllocated(const TypedRegisterSet &allocatable) const { |
michael@0 | 370 | return allocatable.bits_ & ~bits_; |
michael@0 | 371 | } |
michael@0 | 372 | bool empty() const { |
michael@0 | 373 | return !bits_; |
michael@0 | 374 | } |
michael@0 | 375 | void take(T reg) { |
michael@0 | 376 | JS_ASSERT(has(reg)); |
michael@0 | 377 | takeUnchecked(reg); |
michael@0 | 378 | } |
michael@0 | 379 | void takeUnchecked(T reg) { |
michael@0 | 380 | bits_ &= ~(1 << reg.code()); |
michael@0 | 381 | } |
michael@0 | 382 | void take(ValueOperand value) { |
michael@0 | 383 | #if defined(JS_NUNBOX32) |
michael@0 | 384 | take(value.payloadReg()); |
michael@0 | 385 | take(value.typeReg()); |
michael@0 | 386 | #elif defined(JS_PUNBOX64) |
michael@0 | 387 | take(value.valueReg()); |
michael@0 | 388 | #else |
michael@0 | 389 | #error "Bad architecture" |
michael@0 | 390 | #endif |
michael@0 | 391 | } |
michael@0 | 392 | void takeUnchecked(ValueOperand value) { |
michael@0 | 393 | #if defined(JS_NUNBOX32) |
michael@0 | 394 | takeUnchecked(value.payloadReg()); |
michael@0 | 395 | takeUnchecked(value.typeReg()); |
michael@0 | 396 | #elif defined(JS_PUNBOX64) |
michael@0 | 397 | takeUnchecked(value.valueReg()); |
michael@0 | 398 | #else |
michael@0 | 399 | #error "Bad architecture" |
michael@0 | 400 | #endif |
michael@0 | 401 | } |
michael@0 | 402 | ValueOperand takeValueOperand() { |
michael@0 | 403 | #if defined(JS_NUNBOX32) |
michael@0 | 404 | return ValueOperand(takeAny(), takeAny()); |
michael@0 | 405 | #elif defined(JS_PUNBOX64) |
michael@0 | 406 | return ValueOperand(takeAny()); |
michael@0 | 407 | #else |
michael@0 | 408 | #error "Bad architecture" |
michael@0 | 409 | #endif |
michael@0 | 410 | } |
michael@0 | 411 | T getAny() const { |
michael@0 | 412 | // The choice of first or last here is mostly arbitrary, as they are |
michael@0 | 413 | // about the same speed on popular architectures. We choose first, as |
michael@0 | 414 | // it has the advantage of using the "lower" registers more often. These |
michael@0 | 415 | // registers are sometimes more efficient (e.g. optimized encodings for |
michael@0 | 416 | // EAX on x86). |
michael@0 | 417 | return getFirst(); |
michael@0 | 418 | } |
michael@0 | 419 | T getAnyExcluding(T preclude) { |
michael@0 | 420 | JS_ASSERT(!empty()); |
michael@0 | 421 | if (!has(preclude)) |
michael@0 | 422 | return getAny(); |
michael@0 | 423 | |
michael@0 | 424 | take(preclude); |
michael@0 | 425 | JS_ASSERT(!empty()); |
michael@0 | 426 | T result = getAny(); |
michael@0 | 427 | add(preclude); |
michael@0 | 428 | return result; |
michael@0 | 429 | } |
michael@0 | 430 | T getFirst() const { |
michael@0 | 431 | JS_ASSERT(!empty()); |
michael@0 | 432 | return T::FromCode(mozilla::CountTrailingZeroes32(bits_)); |
michael@0 | 433 | } |
michael@0 | 434 | T getLast() const { |
michael@0 | 435 | JS_ASSERT(!empty()); |
michael@0 | 436 | int ireg = 31 - mozilla::CountLeadingZeroes32(bits_); |
michael@0 | 437 | return T::FromCode(ireg); |
michael@0 | 438 | } |
michael@0 | 439 | T takeAny() { |
michael@0 | 440 | JS_ASSERT(!empty()); |
michael@0 | 441 | T reg = getAny(); |
michael@0 | 442 | take(reg); |
michael@0 | 443 | return reg; |
michael@0 | 444 | } |
michael@0 | 445 | T takeAnyExcluding(T preclude) { |
michael@0 | 446 | T reg = getAnyExcluding(preclude); |
michael@0 | 447 | take(reg); |
michael@0 | 448 | return reg; |
michael@0 | 449 | } |
michael@0 | 450 | ValueOperand takeAnyValue() { |
michael@0 | 451 | #if defined(JS_NUNBOX32) |
michael@0 | 452 | T type = takeAny(); |
michael@0 | 453 | T payload = takeAny(); |
michael@0 | 454 | return ValueOperand(type, payload); |
michael@0 | 455 | #elif defined(JS_PUNBOX64) |
michael@0 | 456 | T reg = takeAny(); |
michael@0 | 457 | return ValueOperand(reg); |
michael@0 | 458 | #else |
michael@0 | 459 | #error "Bad architecture" |
michael@0 | 460 | #endif |
michael@0 | 461 | } |
michael@0 | 462 | T takeFirst() { |
michael@0 | 463 | JS_ASSERT(!empty()); |
michael@0 | 464 | T reg = getFirst(); |
michael@0 | 465 | take(reg); |
michael@0 | 466 | return reg; |
michael@0 | 467 | } |
michael@0 | 468 | T takeLast() { |
michael@0 | 469 | JS_ASSERT(!empty()); |
michael@0 | 470 | T reg = getLast(); |
michael@0 | 471 | take(reg); |
michael@0 | 472 | return reg; |
michael@0 | 473 | } |
michael@0 | 474 | void clear() { |
michael@0 | 475 | bits_ = 0; |
michael@0 | 476 | } |
michael@0 | 477 | uint32_t bits() const { |
michael@0 | 478 | return bits_; |
michael@0 | 479 | } |
michael@0 | 480 | uint32_t size() const { |
michael@0 | 481 | return mozilla::CountPopulation32(bits_); |
michael@0 | 482 | } |
michael@0 | 483 | bool operator ==(const TypedRegisterSet<T> &other) const { |
michael@0 | 484 | return other.bits_ == bits_; |
michael@0 | 485 | } |
michael@0 | 486 | }; |
michael@0 | 487 | |
michael@0 | 488 | typedef TypedRegisterSet<Register> GeneralRegisterSet; |
michael@0 | 489 | typedef TypedRegisterSet<FloatRegister> FloatRegisterSet; |
michael@0 | 490 | |
michael@0 | 491 | class AnyRegisterIterator; |
michael@0 | 492 | |
michael@0 | 493 | class RegisterSet { |
michael@0 | 494 | GeneralRegisterSet gpr_; |
michael@0 | 495 | FloatRegisterSet fpu_; |
michael@0 | 496 | |
michael@0 | 497 | friend class AnyRegisterIterator; |
michael@0 | 498 | |
michael@0 | 499 | public: |
michael@0 | 500 | RegisterSet() |
michael@0 | 501 | { } |
michael@0 | 502 | MOZ_CONSTEXPR RegisterSet(const GeneralRegisterSet &gpr, const FloatRegisterSet &fpu) |
michael@0 | 503 | : gpr_(gpr), |
michael@0 | 504 | fpu_(fpu) |
michael@0 | 505 | { } |
michael@0 | 506 | static inline RegisterSet All() { |
michael@0 | 507 | return RegisterSet(GeneralRegisterSet::All(), FloatRegisterSet::All()); |
michael@0 | 508 | } |
michael@0 | 509 | static inline RegisterSet Intersect(const RegisterSet &lhs, const RegisterSet &rhs) { |
michael@0 | 510 | return RegisterSet(GeneralRegisterSet::Intersect(lhs.gpr_, rhs.gpr_), |
michael@0 | 511 | FloatRegisterSet::Intersect(lhs.fpu_, rhs.fpu_)); |
michael@0 | 512 | } |
michael@0 | 513 | static inline RegisterSet Union(const RegisterSet &lhs, const RegisterSet &rhs) { |
michael@0 | 514 | return RegisterSet(GeneralRegisterSet::Union(lhs.gpr_, rhs.gpr_), |
michael@0 | 515 | FloatRegisterSet::Union(lhs.fpu_, rhs.fpu_)); |
michael@0 | 516 | } |
michael@0 | 517 | static inline RegisterSet Not(const RegisterSet &in) { |
michael@0 | 518 | return RegisterSet(GeneralRegisterSet::Not(in.gpr_), |
michael@0 | 519 | FloatRegisterSet::Not(in.fpu_)); |
michael@0 | 520 | } |
michael@0 | 521 | static inline RegisterSet VolatileNot(const RegisterSet &in) { |
michael@0 | 522 | return RegisterSet(GeneralRegisterSet::VolatileNot(in.gpr_), |
michael@0 | 523 | FloatRegisterSet::VolatileNot(in.fpu_)); |
michael@0 | 524 | } |
michael@0 | 525 | static inline RegisterSet Volatile() { |
michael@0 | 526 | return RegisterSet(GeneralRegisterSet::Volatile(), FloatRegisterSet::Volatile()); |
michael@0 | 527 | } |
michael@0 | 528 | bool has(Register reg) const { |
michael@0 | 529 | return gpr_.has(reg); |
michael@0 | 530 | } |
michael@0 | 531 | bool has(FloatRegister reg) const { |
michael@0 | 532 | return fpu_.has(reg); |
michael@0 | 533 | } |
michael@0 | 534 | bool has(AnyRegister reg) const { |
michael@0 | 535 | return reg.isFloat() ? has(reg.fpu()) : has(reg.gpr()); |
michael@0 | 536 | } |
michael@0 | 537 | void add(Register reg) { |
michael@0 | 538 | gpr_.add(reg); |
michael@0 | 539 | } |
michael@0 | 540 | void add(FloatRegister reg) { |
michael@0 | 541 | fpu_.add(reg); |
michael@0 | 542 | } |
michael@0 | 543 | void add(const AnyRegister &any) { |
michael@0 | 544 | if (any.isFloat()) |
michael@0 | 545 | add(any.fpu()); |
michael@0 | 546 | else |
michael@0 | 547 | add(any.gpr()); |
michael@0 | 548 | } |
michael@0 | 549 | void add(ValueOperand value) { |
michael@0 | 550 | #if defined(JS_NUNBOX32) |
michael@0 | 551 | add(value.payloadReg()); |
michael@0 | 552 | add(value.typeReg()); |
michael@0 | 553 | #elif defined(JS_PUNBOX64) |
michael@0 | 554 | add(value.valueReg()); |
michael@0 | 555 | #else |
michael@0 | 556 | #error "Bad architecture" |
michael@0 | 557 | #endif |
michael@0 | 558 | } |
michael@0 | 559 | void add(TypedOrValueRegister reg) { |
michael@0 | 560 | if (reg.hasValue()) |
michael@0 | 561 | add(reg.valueReg()); |
michael@0 | 562 | else if (reg.hasTyped()) |
michael@0 | 563 | add(reg.typedReg()); |
michael@0 | 564 | } |
michael@0 | 565 | void addUnchecked(Register reg) { |
michael@0 | 566 | gpr_.addUnchecked(reg); |
michael@0 | 567 | } |
michael@0 | 568 | void addUnchecked(FloatRegister reg) { |
michael@0 | 569 | fpu_.addUnchecked(reg); |
michael@0 | 570 | } |
michael@0 | 571 | void addUnchecked(const AnyRegister &any) { |
michael@0 | 572 | if (any.isFloat()) |
michael@0 | 573 | addUnchecked(any.fpu()); |
michael@0 | 574 | else |
michael@0 | 575 | addUnchecked(any.gpr()); |
michael@0 | 576 | } |
michael@0 | 577 | bool empty(bool floats) const { |
michael@0 | 578 | return floats ? fpu_.empty() : gpr_.empty(); |
michael@0 | 579 | } |
michael@0 | 580 | FloatRegister takeFloat() { |
michael@0 | 581 | return fpu_.takeAny(); |
michael@0 | 582 | } |
michael@0 | 583 | Register takeGeneral() { |
michael@0 | 584 | return gpr_.takeAny(); |
michael@0 | 585 | } |
michael@0 | 586 | ValueOperand takeValueOperand() { |
michael@0 | 587 | #if defined(JS_NUNBOX32) |
michael@0 | 588 | return ValueOperand(takeGeneral(), takeGeneral()); |
michael@0 | 589 | #elif defined(JS_PUNBOX64) |
michael@0 | 590 | return ValueOperand(takeGeneral()); |
michael@0 | 591 | #else |
michael@0 | 592 | #error "Bad architecture" |
michael@0 | 593 | #endif |
michael@0 | 594 | } |
michael@0 | 595 | void take(const AnyRegister ®) { |
michael@0 | 596 | if (reg.isFloat()) |
michael@0 | 597 | fpu_.take(reg.fpu()); |
michael@0 | 598 | else |
michael@0 | 599 | gpr_.take(reg.gpr()); |
michael@0 | 600 | } |
michael@0 | 601 | AnyRegister takeAny(bool isFloat) { |
michael@0 | 602 | if (isFloat) |
michael@0 | 603 | return AnyRegister(takeFloat()); |
michael@0 | 604 | return AnyRegister(takeGeneral()); |
michael@0 | 605 | } |
michael@0 | 606 | void clear() { |
michael@0 | 607 | gpr_.clear(); |
michael@0 | 608 | fpu_.clear(); |
michael@0 | 609 | } |
michael@0 | 610 | MOZ_CONSTEXPR GeneralRegisterSet gprs() const { |
michael@0 | 611 | return gpr_; |
michael@0 | 612 | } |
michael@0 | 613 | MOZ_CONSTEXPR FloatRegisterSet fpus() const { |
michael@0 | 614 | return fpu_; |
michael@0 | 615 | } |
michael@0 | 616 | bool operator ==(const RegisterSet &other) const { |
michael@0 | 617 | return other.gpr_ == gpr_ && other.fpu_ == fpu_; |
michael@0 | 618 | } |
michael@0 | 619 | |
michael@0 | 620 | void takeUnchecked(Register reg) { |
michael@0 | 621 | gpr_.takeUnchecked(reg); |
michael@0 | 622 | } |
michael@0 | 623 | void takeUnchecked(FloatRegister reg) { |
michael@0 | 624 | fpu_.takeUnchecked(reg); |
michael@0 | 625 | } |
michael@0 | 626 | void takeUnchecked(AnyRegister reg) { |
michael@0 | 627 | if (reg.isFloat()) |
michael@0 | 628 | fpu_.takeUnchecked(reg.fpu()); |
michael@0 | 629 | else |
michael@0 | 630 | gpr_.takeUnchecked(reg.gpr()); |
michael@0 | 631 | } |
michael@0 | 632 | void takeUnchecked(ValueOperand value) { |
michael@0 | 633 | gpr_.takeUnchecked(value); |
michael@0 | 634 | } |
michael@0 | 635 | void takeUnchecked(TypedOrValueRegister reg) { |
michael@0 | 636 | if (reg.hasValue()) |
michael@0 | 637 | takeUnchecked(reg.valueReg()); |
michael@0 | 638 | else if (reg.hasTyped()) |
michael@0 | 639 | takeUnchecked(reg.typedReg()); |
michael@0 | 640 | } |
michael@0 | 641 | }; |
michael@0 | 642 | |
michael@0 | 643 | // iterates in whatever order happens to be convenient. |
michael@0 | 644 | // Use TypedRegisterBackwardIterator or TypedRegisterForwardIterator if a |
michael@0 | 645 | // specific order is required. |
michael@0 | 646 | template <typename T> |
michael@0 | 647 | class TypedRegisterIterator |
michael@0 | 648 | { |
michael@0 | 649 | TypedRegisterSet<T> regset_; |
michael@0 | 650 | |
michael@0 | 651 | public: |
michael@0 | 652 | TypedRegisterIterator(TypedRegisterSet<T> regset) : regset_(regset) |
michael@0 | 653 | { } |
michael@0 | 654 | TypedRegisterIterator(const TypedRegisterIterator &other) : regset_(other.regset_) |
michael@0 | 655 | { } |
michael@0 | 656 | |
michael@0 | 657 | bool more() const { |
michael@0 | 658 | return !regset_.empty(); |
michael@0 | 659 | } |
michael@0 | 660 | TypedRegisterIterator<T> operator ++(int) { |
michael@0 | 661 | TypedRegisterIterator<T> old(*this); |
michael@0 | 662 | regset_.takeAny(); |
michael@0 | 663 | return old; |
michael@0 | 664 | } |
michael@0 | 665 | TypedRegisterIterator<T>& operator ++() { |
michael@0 | 666 | regset_.takeAny(); |
michael@0 | 667 | return *this; |
michael@0 | 668 | } |
michael@0 | 669 | T operator *() const { |
michael@0 | 670 | return regset_.getAny(); |
michael@0 | 671 | } |
michael@0 | 672 | }; |
michael@0 | 673 | |
michael@0 | 674 | // iterates backwards, that is, rn to r0 |
michael@0 | 675 | template <typename T> |
michael@0 | 676 | class TypedRegisterBackwardIterator |
michael@0 | 677 | { |
michael@0 | 678 | TypedRegisterSet<T> regset_; |
michael@0 | 679 | |
michael@0 | 680 | public: |
michael@0 | 681 | TypedRegisterBackwardIterator(TypedRegisterSet<T> regset) : regset_(regset) |
michael@0 | 682 | { } |
michael@0 | 683 | TypedRegisterBackwardIterator(const TypedRegisterBackwardIterator &other) |
michael@0 | 684 | : regset_(other.regset_) |
michael@0 | 685 | { } |
michael@0 | 686 | |
michael@0 | 687 | bool more() const { |
michael@0 | 688 | return !regset_.empty(); |
michael@0 | 689 | } |
michael@0 | 690 | TypedRegisterBackwardIterator<T> operator ++(int) { |
michael@0 | 691 | TypedRegisterBackwardIterator<T> old(*this); |
michael@0 | 692 | regset_.takeLast(); |
michael@0 | 693 | return old; |
michael@0 | 694 | } |
michael@0 | 695 | TypedRegisterBackwardIterator<T>& operator ++() { |
michael@0 | 696 | regset_.takeLast(); |
michael@0 | 697 | return *this; |
michael@0 | 698 | } |
michael@0 | 699 | T operator *() const { |
michael@0 | 700 | return regset_.getLast(); |
michael@0 | 701 | } |
michael@0 | 702 | }; |
michael@0 | 703 | |
michael@0 | 704 | // iterates forwards, that is r0 to rn |
michael@0 | 705 | template <typename T> |
michael@0 | 706 | class TypedRegisterForwardIterator |
michael@0 | 707 | { |
michael@0 | 708 | TypedRegisterSet<T> regset_; |
michael@0 | 709 | |
michael@0 | 710 | public: |
michael@0 | 711 | TypedRegisterForwardIterator(TypedRegisterSet<T> regset) : regset_(regset) |
michael@0 | 712 | { } |
michael@0 | 713 | TypedRegisterForwardIterator(const TypedRegisterForwardIterator &other) : regset_(other.regset_) |
michael@0 | 714 | { } |
michael@0 | 715 | |
michael@0 | 716 | bool more() const { |
michael@0 | 717 | return !regset_.empty(); |
michael@0 | 718 | } |
michael@0 | 719 | TypedRegisterForwardIterator<T> operator ++(int) { |
michael@0 | 720 | TypedRegisterForwardIterator<T> old(*this); |
michael@0 | 721 | regset_.takeFirst(); |
michael@0 | 722 | return old; |
michael@0 | 723 | } |
michael@0 | 724 | TypedRegisterForwardIterator<T>& operator ++() { |
michael@0 | 725 | regset_.takeFirst(); |
michael@0 | 726 | return *this; |
michael@0 | 727 | } |
michael@0 | 728 | T operator *() const { |
michael@0 | 729 | return regset_.getFirst(); |
michael@0 | 730 | } |
michael@0 | 731 | }; |
michael@0 | 732 | |
michael@0 | 733 | typedef TypedRegisterIterator<Register> GeneralRegisterIterator; |
michael@0 | 734 | typedef TypedRegisterIterator<FloatRegister> FloatRegisterIterator; |
michael@0 | 735 | typedef TypedRegisterBackwardIterator<Register> GeneralRegisterBackwardIterator; |
michael@0 | 736 | typedef TypedRegisterBackwardIterator<FloatRegister> FloatRegisterBackwardIterator; |
michael@0 | 737 | typedef TypedRegisterForwardIterator<Register> GeneralRegisterForwardIterator; |
michael@0 | 738 | typedef TypedRegisterForwardIterator<FloatRegister> FloatRegisterForwardIterator; |
michael@0 | 739 | |
michael@0 | 740 | class AnyRegisterIterator |
michael@0 | 741 | { |
michael@0 | 742 | GeneralRegisterIterator geniter_; |
michael@0 | 743 | FloatRegisterIterator floatiter_; |
michael@0 | 744 | |
michael@0 | 745 | public: |
michael@0 | 746 | AnyRegisterIterator() |
michael@0 | 747 | : geniter_(GeneralRegisterSet::All()), floatiter_(FloatRegisterSet::All()) |
michael@0 | 748 | { } |
michael@0 | 749 | AnyRegisterIterator(GeneralRegisterSet genset, FloatRegisterSet floatset) |
michael@0 | 750 | : geniter_(genset), floatiter_(floatset) |
michael@0 | 751 | { } |
michael@0 | 752 | AnyRegisterIterator(const RegisterSet &set) |
michael@0 | 753 | : geniter_(set.gpr_), floatiter_(set.fpu_) |
michael@0 | 754 | { } |
michael@0 | 755 | AnyRegisterIterator(const AnyRegisterIterator &other) |
michael@0 | 756 | : geniter_(other.geniter_), floatiter_(other.floatiter_) |
michael@0 | 757 | { } |
michael@0 | 758 | bool more() const { |
michael@0 | 759 | return geniter_.more() || floatiter_.more(); |
michael@0 | 760 | } |
michael@0 | 761 | AnyRegisterIterator operator ++(int) { |
michael@0 | 762 | AnyRegisterIterator old(*this); |
michael@0 | 763 | if (geniter_.more()) |
michael@0 | 764 | geniter_++; |
michael@0 | 765 | else |
michael@0 | 766 | floatiter_++; |
michael@0 | 767 | return old; |
michael@0 | 768 | } |
michael@0 | 769 | AnyRegister operator *() const { |
michael@0 | 770 | if (geniter_.more()) |
michael@0 | 771 | return AnyRegister(*geniter_); |
michael@0 | 772 | return AnyRegister(*floatiter_); |
michael@0 | 773 | } |
michael@0 | 774 | }; |
michael@0 | 775 | |
michael@0 | 776 | class ABIArg |
michael@0 | 777 | { |
michael@0 | 778 | public: |
michael@0 | 779 | enum Kind { GPR, FPU, Stack }; |
michael@0 | 780 | |
michael@0 | 781 | private: |
michael@0 | 782 | Kind kind_; |
michael@0 | 783 | union { |
michael@0 | 784 | Registers::Code gpr_; |
michael@0 | 785 | FloatRegisters::Code fpu_; |
michael@0 | 786 | uint32_t offset_; |
michael@0 | 787 | } u; |
michael@0 | 788 | |
michael@0 | 789 | public: |
michael@0 | 790 | ABIArg() : kind_(Kind(-1)) { u.offset_ = -1; } |
michael@0 | 791 | ABIArg(Register gpr) : kind_(GPR) { u.gpr_ = gpr.code(); } |
michael@0 | 792 | ABIArg(FloatRegister fpu) : kind_(FPU) { u.fpu_ = fpu.code(); } |
michael@0 | 793 | ABIArg(uint32_t offset) : kind_(Stack) { u.offset_ = offset; } |
michael@0 | 794 | |
michael@0 | 795 | Kind kind() const { return kind_; } |
michael@0 | 796 | Register gpr() const { JS_ASSERT(kind() == GPR); return Register::FromCode(u.gpr_); } |
michael@0 | 797 | FloatRegister fpu() const { JS_ASSERT(kind() == FPU); return FloatRegister::FromCode(u.fpu_); } |
michael@0 | 798 | uint32_t offsetFromArgBase() const { JS_ASSERT(kind() == Stack); return u.offset_; } |
michael@0 | 799 | |
michael@0 | 800 | bool argInRegister() const { return kind() != Stack; } |
michael@0 | 801 | AnyRegister reg() const { return kind_ == GPR ? AnyRegister(gpr()) : AnyRegister(fpu()); } |
michael@0 | 802 | }; |
michael@0 | 803 | |
michael@0 | 804 | } // namespace jit |
michael@0 | 805 | } // namespace js |
michael@0 | 806 | |
michael@0 | 807 | #endif /* jit_RegisterSets_h */ |