media/libopus/celt/arm/armcpu.c@6474c204b198 (annotated)
media/libopus/celt/arm/armcpu.c
Wed, 31 Dec 2014 06:09:35 +0100
- author
- Michael Schloh von Bennewitz <michael@schloh.com>
- date
- Wed, 31 Dec 2014 06:09:35 +0100
- changeset 0
- 6474c204b198
- permissions
- -rw-r--r--
Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.
| michael@0 | 1 | /* Copyright (c) 2010 Xiph.Org Foundation |
| michael@0 | 2 | * Copyright (c) 2013 Parrot */ |
| michael@0 | 3 | /* |
| michael@0 | 4 | Redistribution and use in source and binary forms, with or without |
| michael@0 | 5 | modification, are permitted provided that the following conditions |
| michael@0 | 6 | are met: |
| michael@0 | 7 | |
| michael@0 | 8 | - Redistributions of source code must retain the above copyright |
| michael@0 | 9 | notice, this list of conditions and the following disclaimer. |
| michael@0 | 10 | |
| michael@0 | 11 | - Redistributions in binary form must reproduce the above copyright |
| michael@0 | 12 | notice, this list of conditions and the following disclaimer in the |
| michael@0 | 13 | documentation and/or other materials provided with the distribution. |
| michael@0 | 14 | |
| michael@0 | 15 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| michael@0 | 16 | ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| michael@0 | 17 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| michael@0 | 18 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER |
| michael@0 | 19 | OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| michael@0 | 20 | EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| michael@0 | 21 | PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
| michael@0 | 22 | PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
| michael@0 | 23 | LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
| michael@0 | 24 | NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| michael@0 | 25 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| michael@0 | 26 | */ |
| michael@0 | 27 | |
| michael@0 | 28 | /* Original code from libtheora modified to suit to Opus */ |
| michael@0 | 29 | |
| michael@0 | 30 | #ifdef HAVE_CONFIG_H |
| michael@0 | 31 | #include "config.h" |
| michael@0 | 32 | #endif |
| michael@0 | 33 | |
| michael@0 | 34 | #ifdef OPUS_HAVE_RTCD |
| michael@0 | 35 | |
| michael@0 | 36 | #include "armcpu.h" |
| michael@0 | 37 | #include "cpu_support.h" |
| michael@0 | 38 | #include "os_support.h" |
| michael@0 | 39 | #include "opus_types.h" |
| michael@0 | 40 | |
| michael@0 | 41 | #define OPUS_CPU_ARM_V4 (1) |
| michael@0 | 42 | #define OPUS_CPU_ARM_EDSP (1<<1) |
| michael@0 | 43 | #define OPUS_CPU_ARM_MEDIA (1<<2) |
| michael@0 | 44 | #define OPUS_CPU_ARM_NEON (1<<3) |
| michael@0 | 45 | |
| michael@0 | 46 | #if defined(_MSC_VER) |
| michael@0 | 47 | /*For GetExceptionCode() and EXCEPTION_ILLEGAL_INSTRUCTION.*/ |
| michael@0 | 48 | # define WIN32_LEAN_AND_MEAN |
| michael@0 | 49 | # define WIN32_EXTRA_LEAN |
| michael@0 | 50 | # include <windows.h> |
| michael@0 | 51 | |
| michael@0 | 52 | static OPUS_INLINE opus_uint32 opus_cpu_capabilities(void){ |
| michael@0 | 53 | opus_uint32 flags; |
| michael@0 | 54 | flags=0; |
| michael@0 | 55 | /* MSVC has no OPUS_INLINE __asm support for ARM, but it does let you __emit |
| michael@0 | 56 | * instructions via their assembled hex code. |
| michael@0 | 57 | * All of these instructions should be essentially nops. */ |
| michael@0 | 58 | # if defined(OPUS_ARM_MAY_HAVE_EDSP) |
| michael@0 | 59 | __try{ |
| michael@0 | 60 | /*PLD [r13]*/ |
| michael@0 | 61 | __emit(0xF5DDF000); |
| michael@0 | 62 | flags|=OPUS_CPU_ARM_EDSP; |
| michael@0 | 63 | } |
| michael@0 | 64 | __except(GetExceptionCode()==EXCEPTION_ILLEGAL_INSTRUCTION){ |
| michael@0 | 65 | /*Ignore exception.*/ |
| michael@0 | 66 | } |
| michael@0 | 67 | # if defined(OPUS_ARM_MAY_HAVE_MEDIA) |
| michael@0 | 68 | __try{ |
| michael@0 | 69 | /*SHADD8 r3,r3,r3*/ |
| michael@0 | 70 | __emit(0xE6333F93); |
| michael@0 | 71 | flags|=OPUS_CPU_ARM_MEDIA; |
| michael@0 | 72 | } |
| michael@0 | 73 | __except(GetExceptionCode()==EXCEPTION_ILLEGAL_INSTRUCTION){ |
| michael@0 | 74 | /*Ignore exception.*/ |
| michael@0 | 75 | } |
| michael@0 | 76 | # if defined(OPUS_ARM_MAY_HAVE_NEON) |
| michael@0 | 77 | __try{ |
| michael@0 | 78 | /*VORR q0,q0,q0*/ |
| michael@0 | 79 | __emit(0xF2200150); |
| michael@0 | 80 | flags|=OPUS_CPU_ARM_NEON; |
| michael@0 | 81 | } |
| michael@0 | 82 | __except(GetExceptionCode()==EXCEPTION_ILLEGAL_INSTRUCTION){ |
| michael@0 | 83 | /*Ignore exception.*/ |
| michael@0 | 84 | } |
| michael@0 | 85 | # endif |
| michael@0 | 86 | # endif |
| michael@0 | 87 | # endif |
| michael@0 | 88 | return flags; |
| michael@0 | 89 | } |
| michael@0 | 90 | |
| michael@0 | 91 | #elif defined(__linux__) |
| michael@0 | 92 | /* Linux based */ |
| michael@0 | 93 | opus_uint32 opus_cpu_capabilities(void) |
| michael@0 | 94 | { |
| michael@0 | 95 | opus_uint32 flags = 0; |
| michael@0 | 96 | FILE *cpuinfo; |
| michael@0 | 97 | |
| michael@0 | 98 | /* Reading /proc/self/auxv would be easier, but that doesn't work reliably on |
| michael@0 | 99 | * Android */ |
| michael@0 | 100 | cpuinfo = fopen("/proc/cpuinfo", "r"); |
| michael@0 | 101 | |
| michael@0 | 102 | if(cpuinfo != NULL) |
| michael@0 | 103 | { |
| michael@0 | 104 | /* 512 should be enough for anybody (it's even enough for all the flags that |
| michael@0 | 105 | * x86 has accumulated... so far). */ |
| michael@0 | 106 | char buf[512]; |
| michael@0 | 107 | |
| michael@0 | 108 | while(fgets(buf, 512, cpuinfo) != NULL) |
| michael@0 | 109 | { |
| michael@0 | 110 | # if defined(OPUS_ARM_MAY_HAVE_EDSP) || defined(OPUS_ARM_MAY_HAVE_NEON) |
| michael@0 | 111 | /* Search for edsp and neon flag */ |
| michael@0 | 112 | if(memcmp(buf, "Features", 8) == 0) |
| michael@0 | 113 | { |
| michael@0 | 114 | char *p; |
| michael@0 | 115 | # if defined(OPUS_ARM_MAY_HAVE_EDSP) |
| michael@0 | 116 | p = strstr(buf, " edsp"); |
| michael@0 | 117 | if(p != NULL && (p[5] == ' ' || p[5] == '\n')) |
| michael@0 | 118 | flags |= OPUS_CPU_ARM_EDSP; |
| michael@0 | 119 | # endif |
| michael@0 | 120 | |
| michael@0 | 121 | # if defined(OPUS_ARM_MAY_HAVE_NEON) |
| michael@0 | 122 | p = strstr(buf, " neon"); |
| michael@0 | 123 | if(p != NULL && (p[5] == ' ' || p[5] == '\n')) |
| michael@0 | 124 | flags |= OPUS_CPU_ARM_NEON; |
| michael@0 | 125 | # endif |
| michael@0 | 126 | } |
| michael@0 | 127 | # endif |
| michael@0 | 128 | |
| michael@0 | 129 | # if defined(OPUS_ARM_MAY_HAVE_MEDIA) |
| michael@0 | 130 | /* Search for media capabilities (>= ARMv6) */ |
| michael@0 | 131 | if(memcmp(buf, "CPU architecture:", 17) == 0) |
| michael@0 | 132 | { |
| michael@0 | 133 | int version; |
| michael@0 | 134 | version = atoi(buf+17); |
| michael@0 | 135 | |
| michael@0 | 136 | if(version >= 6) |
| michael@0 | 137 | flags |= OPUS_CPU_ARM_MEDIA; |
| michael@0 | 138 | } |
| michael@0 | 139 | # endif |
| michael@0 | 140 | } |
| michael@0 | 141 | |
| michael@0 | 142 | fclose(cpuinfo); |
| michael@0 | 143 | } |
| michael@0 | 144 | return flags; |
| michael@0 | 145 | } |
| michael@0 | 146 | #else |
| michael@0 | 147 | /* The feature registers which can tell us what the processor supports are |
| michael@0 | 148 | * accessible in priveleged modes only, so we can't have a general user-space |
| michael@0 | 149 | * detection method like on x86.*/ |
| michael@0 | 150 | # error "Configured to use ARM asm but no CPU detection method available for " \ |
| michael@0 | 151 | "your platform. Reconfigure with --disable-rtcd (or send patches)." |
| michael@0 | 152 | #endif |
| michael@0 | 153 | |
| michael@0 | 154 | int opus_select_arch(void) |
| michael@0 | 155 | { |
| michael@0 | 156 | opus_uint32 flags = opus_cpu_capabilities(); |
| michael@0 | 157 | int arch = 0; |
| michael@0 | 158 | |
| michael@0 | 159 | if(!(flags & OPUS_CPU_ARM_EDSP)) |
| michael@0 | 160 | return arch; |
| michael@0 | 161 | arch++; |
| michael@0 | 162 | |
| michael@0 | 163 | if(!(flags & OPUS_CPU_ARM_MEDIA)) |
| michael@0 | 164 | return arch; |
| michael@0 | 165 | arch++; |
| michael@0 | 166 | |
| michael@0 | 167 | if(!(flags & OPUS_CPU_ARM_NEON)) |
| michael@0 | 168 | return arch; |
| michael@0 | 169 | arch++; |
| michael@0 | 170 | |
| michael@0 | 171 | return arch; |
| michael@0 | 172 | } |
| michael@0 | 173 | |
| michael@0 | 174 | #endif |
