Wed, 31 Dec 2014 06:09:35 +0100
Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.
michael@0 | 1 | ! |
michael@0 | 2 | ! This Source Code Form is subject to the terms of the Mozilla Public |
michael@0 | 3 | ! License, v. 2.0. If a copy of the MPL was not distributed with this |
michael@0 | 4 | ! file, You can obtain one at http://mozilla.org/MPL/2.0/. |
michael@0 | 5 | |
michael@0 | 6 | ! The interface to the VIS instructions as declared below (and in the VIS |
michael@0 | 7 | ! User's Manual) will not change, but the macro implementation might change |
michael@0 | 8 | ! in the future. |
michael@0 | 9 | |
michael@0 | 10 | !-------------------------------------------------------------------- |
michael@0 | 11 | ! Pure edge handling instructions |
michael@0 | 12 | ! |
michael@0 | 13 | ! int vis_edge8(void */*frs1*/, void */*frs2*/); |
michael@0 | 14 | ! |
michael@0 | 15 | .inline vis_edge8,8 |
michael@0 | 16 | edge8 %o0,%o1,%o0 |
michael@0 | 17 | .end |
michael@0 | 18 | ! |
michael@0 | 19 | ! int vis_edge8l(void */*frs1*/, void */*frs2*/); |
michael@0 | 20 | ! |
michael@0 | 21 | .inline vis_edge8l,8 |
michael@0 | 22 | edge8l %o0,%o1,%o0 |
michael@0 | 23 | .end |
michael@0 | 24 | ! |
michael@0 | 25 | ! int vis_edge16(void */*frs1*/, void */*frs2*/); |
michael@0 | 26 | ! |
michael@0 | 27 | .inline vis_edge16,8 |
michael@0 | 28 | edge16 %o0,%o1,%o0 |
michael@0 | 29 | .end |
michael@0 | 30 | ! |
michael@0 | 31 | ! int vis_edge16l(void */*frs1*/, void */*frs2*/); |
michael@0 | 32 | ! |
michael@0 | 33 | .inline vis_edge16l,8 |
michael@0 | 34 | edge16l %o0,%o1,%o0 |
michael@0 | 35 | .end |
michael@0 | 36 | ! |
michael@0 | 37 | ! int vis_edge32(void */*frs1*/, void */*frs2*/); |
michael@0 | 38 | ! |
michael@0 | 39 | .inline vis_edge32,8 |
michael@0 | 40 | edge32 %o0,%o1,%o0 |
michael@0 | 41 | .end |
michael@0 | 42 | ! |
michael@0 | 43 | ! int vis_edge32l(void */*frs1*/, void */*frs2*/); |
michael@0 | 44 | ! |
michael@0 | 45 | .inline vis_edge32l,8 |
michael@0 | 46 | edge32l %o0,%o1,%o0 |
michael@0 | 47 | .end |
michael@0 | 48 | |
michael@0 | 49 | !-------------------------------------------------------------------- |
michael@0 | 50 | ! Edge handling instructions with negative return values if cc set |
michael@0 | 51 | ! |
michael@0 | 52 | ! int vis_edge8cc(void */*frs1*/, void */*frs2*/); |
michael@0 | 53 | ! |
michael@0 | 54 | .inline vis_edge8cc,8 |
michael@0 | 55 | edge8 %o0,%o1,%o0 |
michael@0 | 56 | mov 0,%o1 |
michael@0 | 57 | movgu %icc,-1024,%o1 |
michael@0 | 58 | or %o1,%o0,%o0 |
michael@0 | 59 | .end |
michael@0 | 60 | ! |
michael@0 | 61 | ! int vis_edge8lcc(void */*frs1*/, void */*frs2*/); |
michael@0 | 62 | ! |
michael@0 | 63 | .inline vis_edge8lcc,8 |
michael@0 | 64 | edge8l %o0,%o1,%o0 |
michael@0 | 65 | mov 0,%o1 |
michael@0 | 66 | movgu %icc,-1024,%o1 |
michael@0 | 67 | or %o1,%o0,%o0 |
michael@0 | 68 | .end |
michael@0 | 69 | ! |
michael@0 | 70 | ! int vis_edge16cc(void */*frs1*/, void */*frs2*/); |
michael@0 | 71 | ! |
michael@0 | 72 | .inline vis_edge16cc,8 |
michael@0 | 73 | edge16 %o0,%o1,%o0 |
michael@0 | 74 | mov 0,%o1 |
michael@0 | 75 | movgu %icc,-1024,%o1 |
michael@0 | 76 | or %o1,%o0,%o0 |
michael@0 | 77 | .end |
michael@0 | 78 | ! |
michael@0 | 79 | ! int vis_edge16lcc(void */*frs1*/, void */*frs2*/); |
michael@0 | 80 | ! |
michael@0 | 81 | .inline vis_edge16lcc,8 |
michael@0 | 82 | edge16l %o0,%o1,%o0 |
michael@0 | 83 | mov 0,%o1 |
michael@0 | 84 | movgu %icc,-1024,%o1 |
michael@0 | 85 | or %o1,%o0,%o0 |
michael@0 | 86 | .end |
michael@0 | 87 | ! |
michael@0 | 88 | ! int vis_edge32cc(void */*frs1*/, void */*frs2*/); |
michael@0 | 89 | ! |
michael@0 | 90 | .inline vis_edge32cc,8 |
michael@0 | 91 | edge32 %o0,%o1,%o0 |
michael@0 | 92 | mov 0,%o1 |
michael@0 | 93 | movgu %icc,-1024,%o1 |
michael@0 | 94 | or %o1,%o0,%o0 |
michael@0 | 95 | .end |
michael@0 | 96 | ! |
michael@0 | 97 | ! int vis_edge32lcc(void */*frs1*/, void */*frs2*/); |
michael@0 | 98 | ! |
michael@0 | 99 | .inline vis_edge32lcc,8 |
michael@0 | 100 | edge32l %o0,%o1,%o0 |
michael@0 | 101 | mov 0,%o1 |
michael@0 | 102 | movgu %icc,-1024,%o1 |
michael@0 | 103 | or %o1,%o0,%o0 |
michael@0 | 104 | .end |
michael@0 | 105 | |
michael@0 | 106 | !-------------------------------------------------------------------- |
michael@0 | 107 | ! Alignment instructions |
michael@0 | 108 | ! |
michael@0 | 109 | ! void *vis_alignaddr(void */*rs1*/, int /*rs2*/); |
michael@0 | 110 | ! |
michael@0 | 111 | .inline vis_alignaddr,8 |
michael@0 | 112 | alignaddr %o0,%o1,%o0 |
michael@0 | 113 | .end |
michael@0 | 114 | ! |
michael@0 | 115 | ! void *vis_alignaddrl(void */*rs1*/, int /*rs2*/); |
michael@0 | 116 | ! |
michael@0 | 117 | .inline vis_alignaddrl,8 |
michael@0 | 118 | alignaddrl %o0,%o1,%o0 |
michael@0 | 119 | .end |
michael@0 | 120 | ! |
michael@0 | 121 | ! double vis_faligndata(double /*frs1*/, double /*frs2*/); |
michael@0 | 122 | ! |
michael@0 | 123 | .inline vis_faligndata,16 |
michael@0 | 124 | std %o0,[%sp+0x48] |
michael@0 | 125 | ldd [%sp+0x48],%f4 |
michael@0 | 126 | std %o2,[%sp+0x48] |
michael@0 | 127 | ldd [%sp+0x48],%f10 |
michael@0 | 128 | faligndata %f4,%f10,%f0 |
michael@0 | 129 | .end |
michael@0 | 130 | |
michael@0 | 131 | !-------------------------------------------------------------------- |
michael@0 | 132 | ! Partitioned comparison instructions |
michael@0 | 133 | ! |
michael@0 | 134 | ! int vis_fcmple16(double /*frs1*/, double /*frs2*/); |
michael@0 | 135 | ! |
michael@0 | 136 | .inline vis_fcmple16,16 |
michael@0 | 137 | std %o0,[%sp+0x48] |
michael@0 | 138 | ldd [%sp+0x48],%f4 |
michael@0 | 139 | std %o2,[%sp+0x48] |
michael@0 | 140 | ldd [%sp+0x48],%f10 |
michael@0 | 141 | fcmple16 %f4,%f10,%o0 |
michael@0 | 142 | .end |
michael@0 | 143 | ! |
michael@0 | 144 | ! int vis_fcmpne16(double /*frs1*/, double /*frs2*/); |
michael@0 | 145 | ! |
michael@0 | 146 | .inline vis_fcmpne16,16 |
michael@0 | 147 | std %o0,[%sp+0x48] |
michael@0 | 148 | ldd [%sp+0x48],%f4 |
michael@0 | 149 | std %o2,[%sp+0x48] |
michael@0 | 150 | ldd [%sp+0x48],%f10 |
michael@0 | 151 | fcmpne16 %f4,%f10,%o0 |
michael@0 | 152 | .end |
michael@0 | 153 | ! |
michael@0 | 154 | ! int vis_fcmple32(double /*frs1*/, double /*frs2*/); |
michael@0 | 155 | ! |
michael@0 | 156 | .inline vis_fcmple32,16 |
michael@0 | 157 | std %o0,[%sp+0x48] |
michael@0 | 158 | ldd [%sp+0x48],%f4 |
michael@0 | 159 | std %o2,[%sp+0x48] |
michael@0 | 160 | ldd [%sp+0x48],%f10 |
michael@0 | 161 | fcmple32 %f4,%f10,%o0 |
michael@0 | 162 | .end |
michael@0 | 163 | ! |
michael@0 | 164 | ! int vis_fcmpne32(double /*frs1*/, double /*frs2*/); |
michael@0 | 165 | ! |
michael@0 | 166 | .inline vis_fcmpne32,16 |
michael@0 | 167 | std %o0,[%sp+0x48] |
michael@0 | 168 | ldd [%sp+0x48],%f4 |
michael@0 | 169 | std %o2,[%sp+0x48] |
michael@0 | 170 | ldd [%sp+0x48],%f10 |
michael@0 | 171 | fcmpne32 %f4,%f10,%o0 |
michael@0 | 172 | .end |
michael@0 | 173 | ! |
michael@0 | 174 | ! int vis_fcmpgt16(double /*frs1*/, double /*frs2*/); |
michael@0 | 175 | ! |
michael@0 | 176 | .inline vis_fcmpgt16,16 |
michael@0 | 177 | std %o0,[%sp+0x48] |
michael@0 | 178 | ldd [%sp+0x48],%f4 |
michael@0 | 179 | std %o2,[%sp+0x48] |
michael@0 | 180 | ldd [%sp+0x48],%f10 |
michael@0 | 181 | fcmpgt16 %f4,%f10,%o0 |
michael@0 | 182 | .end |
michael@0 | 183 | ! |
michael@0 | 184 | ! int vis_fcmpeq16(double /*frs1*/, double /*frs2*/); |
michael@0 | 185 | ! |
michael@0 | 186 | .inline vis_fcmpeq16,16 |
michael@0 | 187 | std %o0,[%sp+0x48] |
michael@0 | 188 | ldd [%sp+0x48],%f4 |
michael@0 | 189 | std %o2,[%sp+0x48] |
michael@0 | 190 | ldd [%sp+0x48],%f10 |
michael@0 | 191 | fcmpeq16 %f4,%f10,%o0 |
michael@0 | 192 | .end |
michael@0 | 193 | ! |
michael@0 | 194 | ! int vis_fcmpgt32(double /*frs1*/, double /*frs2*/); |
michael@0 | 195 | ! |
michael@0 | 196 | .inline vis_fcmpgt32,16 |
michael@0 | 197 | std %o0,[%sp+0x48] |
michael@0 | 198 | ldd [%sp+0x48],%f4 |
michael@0 | 199 | std %o2,[%sp+0x48] |
michael@0 | 200 | ldd [%sp+0x48],%f10 |
michael@0 | 201 | fcmpgt32 %f4,%f10,%o0 |
michael@0 | 202 | .end |
michael@0 | 203 | ! |
michael@0 | 204 | ! int vis_fcmpeq32(double /*frs1*/, double /*frs2*/); |
michael@0 | 205 | ! |
michael@0 | 206 | .inline vis_fcmpeq32,16 |
michael@0 | 207 | std %o0,[%sp+0x48] |
michael@0 | 208 | ldd [%sp+0x48],%f4 |
michael@0 | 209 | std %o2,[%sp+0x48] |
michael@0 | 210 | ldd [%sp+0x48],%f10 |
michael@0 | 211 | fcmpeq32 %f4,%f10,%o0 |
michael@0 | 212 | .end |
michael@0 | 213 | |
michael@0 | 214 | !-------------------------------------------------------------------- |
michael@0 | 215 | ! Partitioned arithmetic |
michael@0 | 216 | ! |
michael@0 | 217 | ! double vis_fmul8x16(float /*frs1*/, double /*frs2*/); |
michael@0 | 218 | ! |
michael@0 | 219 | .inline vis_fmul8x16,12 |
michael@0 | 220 | st %o0,[%sp+0x44] |
michael@0 | 221 | ld [%sp+0x44],%f4 |
michael@0 | 222 | st %o1,[%sp+0x48] |
michael@0 | 223 | st %o2,[%sp+0x4c] |
michael@0 | 224 | ldd [%sp+0x48],%f10 |
michael@0 | 225 | fmul8x16 %f4,%f10,%f0 |
michael@0 | 226 | .end |
michael@0 | 227 | ! |
michael@0 | 228 | ! double vis_fmul8x16_dummy(float /*frs1*/, int /*dummy*/, double /*frs2*/); |
michael@0 | 229 | ! |
michael@0 | 230 | .inline vis_fmul8x16_dummy,16 |
michael@0 | 231 | st %o0,[%sp+0x44] |
michael@0 | 232 | ld [%sp+0x44],%f4 |
michael@0 | 233 | std %o2,[%sp+0x48] |
michael@0 | 234 | ldd [%sp+0x48],%f10 |
michael@0 | 235 | fmul8x16 %f4,%f10,%f0 |
michael@0 | 236 | .end |
michael@0 | 237 | ! |
michael@0 | 238 | ! double vis_fmul8x16au(float /*frs1*/, float /*frs2*/); |
michael@0 | 239 | ! |
michael@0 | 240 | .inline vis_fmul8x16au,8 |
michael@0 | 241 | st %o0,[%sp+0x48] |
michael@0 | 242 | ld [%sp+0x48],%f4 |
michael@0 | 243 | st %o1,[%sp+0x48] |
michael@0 | 244 | ld [%sp+0x48],%f10 |
michael@0 | 245 | fmul8x16au %f4,%f10,%f0 |
michael@0 | 246 | .end |
michael@0 | 247 | ! |
michael@0 | 248 | ! double vis_fmul8x16al(float /*frs1*/, float /*frs2*/); |
michael@0 | 249 | ! |
michael@0 | 250 | .inline vis_fmul8x16al,8 |
michael@0 | 251 | st %o0,[%sp+0x44] |
michael@0 | 252 | ld [%sp+0x44],%f4 |
michael@0 | 253 | st %o1,[%sp+0x48] |
michael@0 | 254 | ld [%sp+0x48],%f10 |
michael@0 | 255 | fmul8x16al %f4,%f10,%f0 |
michael@0 | 256 | .end |
michael@0 | 257 | ! |
michael@0 | 258 | ! double vis_fmul8sux16(double /*frs1*/, double /*frs2*/); |
michael@0 | 259 | ! |
michael@0 | 260 | .inline vis_fmul8sux16,16 |
michael@0 | 261 | std %o0,[%sp+0x48] |
michael@0 | 262 | ldd [%sp+0x48],%f4 |
michael@0 | 263 | std %o2,[%sp+0x48] |
michael@0 | 264 | ldd [%sp+0x48],%f10 |
michael@0 | 265 | fmul8sux16 %f4,%f10,%f0 |
michael@0 | 266 | .end |
michael@0 | 267 | ! |
michael@0 | 268 | ! double vis_fmul8ulx16(double /*frs1*/, double /*frs2*/); |
michael@0 | 269 | ! |
michael@0 | 270 | .inline vis_fmul8ulx16,16 |
michael@0 | 271 | std %o0,[%sp+0x48] |
michael@0 | 272 | ldd [%sp+0x48],%f4 |
michael@0 | 273 | std %o2,[%sp+0x48] |
michael@0 | 274 | ldd [%sp+0x48],%f10 |
michael@0 | 275 | fmul8ulx16 %f4,%f10,%f0 |
michael@0 | 276 | .end |
michael@0 | 277 | ! |
michael@0 | 278 | ! double vis_fmuld8sux16(float /*frs1*/, float /*frs2*/); |
michael@0 | 279 | ! |
michael@0 | 280 | .inline vis_fmuld8sux16,8 |
michael@0 | 281 | st %o0,[%sp+0x48] |
michael@0 | 282 | ld [%sp+0x48],%f4 |
michael@0 | 283 | st %o1,[%sp+0x48] |
michael@0 | 284 | ld [%sp+0x48],%f10 |
michael@0 | 285 | fmuld8sux16 %f4,%f10,%f0 |
michael@0 | 286 | .end |
michael@0 | 287 | ! |
michael@0 | 288 | ! double vis_fmuld8ulx16(float /*frs1*/, float /*frs2*/); |
michael@0 | 289 | ! |
michael@0 | 290 | .inline vis_fmuld8ulx16,8 |
michael@0 | 291 | st %o0,[%sp+0x48] |
michael@0 | 292 | ld [%sp+0x48],%f4 |
michael@0 | 293 | st %o1,[%sp+0x48] |
michael@0 | 294 | ld [%sp+0x48],%f10 |
michael@0 | 295 | fmuld8ulx16 %f4,%f10,%f0 |
michael@0 | 296 | .end |
michael@0 | 297 | ! |
michael@0 | 298 | ! double vis_fpadd16(double /*frs1*/, double /*frs2*/); |
michael@0 | 299 | ! |
michael@0 | 300 | .inline vis_fpadd16,16 |
michael@0 | 301 | std %o0,[%sp+0x40] |
michael@0 | 302 | ldd [%sp+0x40],%f4 |
michael@0 | 303 | std %o2,[%sp+0x48] |
michael@0 | 304 | ldd [%sp+0x48],%f10 |
michael@0 | 305 | fpadd16 %f4,%f10,%f0 |
michael@0 | 306 | .end |
michael@0 | 307 | ! |
michael@0 | 308 | ! float vis_fpadd16s(float /*frs1*/, float /*frs2*/); |
michael@0 | 309 | ! |
michael@0 | 310 | .inline vis_fpadd16s,8 |
michael@0 | 311 | st %o0,[%sp+0x48] |
michael@0 | 312 | ld [%sp+0x48],%f4 |
michael@0 | 313 | st %o1,[%sp+0x48] |
michael@0 | 314 | ld [%sp+0x48],%f10 |
michael@0 | 315 | fpadd16s %f4,%f10,%f0 |
michael@0 | 316 | .end |
michael@0 | 317 | ! |
michael@0 | 318 | ! double vis_fpadd32(double /*frs1*/, double /*frs2*/); |
michael@0 | 319 | ! |
michael@0 | 320 | .inline vis_fpadd32,16 |
michael@0 | 321 | std %o0,[%sp+0x48] |
michael@0 | 322 | ldd [%sp+0x48],%f4 |
michael@0 | 323 | std %o2,[%sp+0x48] |
michael@0 | 324 | ldd [%sp+0x48],%f10 |
michael@0 | 325 | fpadd32 %f4,%f10,%f0 |
michael@0 | 326 | .end |
michael@0 | 327 | ! |
michael@0 | 328 | ! float vis_fpadd32s(float /*frs1*/, float /*frs2*/); |
michael@0 | 329 | ! |
michael@0 | 330 | .inline vis_fpadd32s,8 |
michael@0 | 331 | st %o0,[%sp+0x48] |
michael@0 | 332 | ld [%sp+0x48],%f4 |
michael@0 | 333 | st %o1,[%sp+0x48] |
michael@0 | 334 | ld [%sp+0x48],%f10 |
michael@0 | 335 | fpadd32s %f4,%f10,%f0 |
michael@0 | 336 | .end |
michael@0 | 337 | ! |
michael@0 | 338 | ! double vis_fpsub16(double /*frs1*/, double /*frs2*/); |
michael@0 | 339 | ! |
michael@0 | 340 | .inline vis_fpsub16,16 |
michael@0 | 341 | std %o0,[%sp+0x48] |
michael@0 | 342 | ldd [%sp+0x48],%f4 |
michael@0 | 343 | std %o2,[%sp+0x48] |
michael@0 | 344 | ldd [%sp+0x48],%f10 |
michael@0 | 345 | fpsub16 %f4,%f10,%f0 |
michael@0 | 346 | .end |
michael@0 | 347 | ! |
michael@0 | 348 | ! float vis_fpsub16s(float /*frs1*/, float /*frs2*/); |
michael@0 | 349 | ! |
michael@0 | 350 | .inline vis_fpsub16s,8 |
michael@0 | 351 | st %o0,[%sp+0x48] |
michael@0 | 352 | ld [%sp+0x48],%f4 |
michael@0 | 353 | st %o1,[%sp+0x48] |
michael@0 | 354 | ld [%sp+0x48],%f10 |
michael@0 | 355 | fpsub16s %f4,%f10,%f0 |
michael@0 | 356 | .end |
michael@0 | 357 | ! |
michael@0 | 358 | ! double vis_fpsub32(double /*frs1*/, double /*frs2*/); |
michael@0 | 359 | ! |
michael@0 | 360 | .inline vis_fpsub32,16 |
michael@0 | 361 | std %o0,[%sp+0x48] |
michael@0 | 362 | ldd [%sp+0x48],%f4 |
michael@0 | 363 | std %o2,[%sp+0x48] |
michael@0 | 364 | ldd [%sp+0x48],%f10 |
michael@0 | 365 | fpsub32 %f4,%f10,%f0 |
michael@0 | 366 | .end |
michael@0 | 367 | ! |
michael@0 | 368 | ! float vis_fpsub32s(float /*frs1*/, float /*frs2*/); |
michael@0 | 369 | ! |
michael@0 | 370 | .inline vis_fpsub32s,8 |
michael@0 | 371 | st %o0,[%sp+0x48] |
michael@0 | 372 | ld [%sp+0x48],%f4 |
michael@0 | 373 | st %o1,[%sp+0x48] |
michael@0 | 374 | ld [%sp+0x48],%f10 |
michael@0 | 375 | fpsub32s %f4,%f10,%f0 |
michael@0 | 376 | .end |
michael@0 | 377 | |
michael@0 | 378 | !-------------------------------------------------------------------- |
michael@0 | 379 | ! Pixel packing |
michael@0 | 380 | ! |
michael@0 | 381 | ! float vis_fpack16(double /*frs2*/); |
michael@0 | 382 | ! |
michael@0 | 383 | .inline vis_fpack16,8 |
michael@0 | 384 | std %o0,[%sp+0x48] |
michael@0 | 385 | ldd [%sp+0x48],%f4 |
michael@0 | 386 | fpack16 %f4,%f0 |
michael@0 | 387 | .end |
michael@0 | 388 | |
michael@0 | 389 | ! |
michael@0 | 390 | ! double vis_fpack16_pair(double /*frs2*/, double /*frs2*/); |
michael@0 | 391 | ! |
michael@0 | 392 | .inline vis_fpack16_pair,16 |
michael@0 | 393 | std %o0,[%sp+0x48] |
michael@0 | 394 | ldd [%sp+0x48],%f4 |
michael@0 | 395 | std %o2,[%sp+0x48] |
michael@0 | 396 | ldd [%sp+0x48],%f10 |
michael@0 | 397 | fpack16 %f4,%f0 |
michael@0 | 398 | fpack16 %f10,%f1 |
michael@0 | 399 | .end |
michael@0 | 400 | ! |
michael@0 | 401 | ! void vis_st2_fpack16(double, double, double *) |
michael@0 | 402 | ! |
michael@0 | 403 | .inline vis_st2_fpack16,20 |
michael@0 | 404 | std %o0,[%sp+0x48] |
michael@0 | 405 | ldd [%sp+0x48],%f4 |
michael@0 | 406 | std %o2,[%sp+0x48] |
michael@0 | 407 | ldd [%sp+0x48],%f10 |
michael@0 | 408 | fpack16 %f4,%f0 |
michael@0 | 409 | fpack16 %f10,%f1 |
michael@0 | 410 | st %f0,[%o4+0] |
michael@0 | 411 | st %f1,[%o4+4] |
michael@0 | 412 | .end |
michael@0 | 413 | ! |
michael@0 | 414 | ! void vis_std_fpack16(double, double, double *) |
michael@0 | 415 | ! |
michael@0 | 416 | .inline vis_std_fpack16,20 |
michael@0 | 417 | std %o0,[%sp+0x48] |
michael@0 | 418 | ldd [%sp+0x48],%f4 |
michael@0 | 419 | std %o2,[%sp+0x48] |
michael@0 | 420 | ldd [%sp+0x48],%f10 |
michael@0 | 421 | fpack16 %f4,%f0 |
michael@0 | 422 | fpack16 %f10,%f1 |
michael@0 | 423 | std %f0,[%o4] |
michael@0 | 424 | .end |
michael@0 | 425 | ! |
michael@0 | 426 | ! void vis_st2_fpackfix(double, double, double *) |
michael@0 | 427 | ! |
michael@0 | 428 | .inline vis_st2_fpackfix,20 |
michael@0 | 429 | std %o0,[%sp+0x48] |
michael@0 | 430 | ldd [%sp+0x48],%f4 |
michael@0 | 431 | std %o2,[%sp+0x48] |
michael@0 | 432 | ldd [%sp+0x48],%f10 |
michael@0 | 433 | fpackfix %f4,%f0 |
michael@0 | 434 | fpackfix %f10,%f1 |
michael@0 | 435 | st %f0,[%o4+0] |
michael@0 | 436 | st %f1,[%o4+4] |
michael@0 | 437 | .end |
michael@0 | 438 | ! |
michael@0 | 439 | ! double vis_fpack16_to_hi(double /*frs1*/, double /*frs2*/); |
michael@0 | 440 | ! |
michael@0 | 441 | .inline vis_fpack16_to_hi,16 |
michael@0 | 442 | std %o0,[%sp+0x48] |
michael@0 | 443 | ldd [%sp+0x48],%f0 |
michael@0 | 444 | std %o2,[%sp+0x48] |
michael@0 | 445 | ldd [%sp+0x48],%f4 |
michael@0 | 446 | fpack16 %f4,%f0 |
michael@0 | 447 | .end |
michael@0 | 448 | |
michael@0 | 449 | ! double vis_fpack16_to_lo(double /*frs1*/, double /*frs2*/); |
michael@0 | 450 | ! |
michael@0 | 451 | .inline vis_fpack16_to_lo,16 |
michael@0 | 452 | std %o0,[%sp+0x48] |
michael@0 | 453 | ldd [%sp+0x48],%f0 |
michael@0 | 454 | std %o2,[%sp+0x48] |
michael@0 | 455 | ldd [%sp+0x48],%f4 |
michael@0 | 456 | fpack16 %f4,%f3 |
michael@0 | 457 | fmovs %f3,%f1 /* without this, optimizer goes wrong */ |
michael@0 | 458 | .end |
michael@0 | 459 | |
michael@0 | 460 | ! |
michael@0 | 461 | ! double vis_fpack32(double /*frs1*/, double /*frs2*/); |
michael@0 | 462 | ! |
michael@0 | 463 | .inline vis_fpack32,16 |
michael@0 | 464 | std %o0,[%sp+0x48] |
michael@0 | 465 | ldd [%sp+0x48],%f4 |
michael@0 | 466 | std %o2,[%sp+0x48] |
michael@0 | 467 | ldd [%sp+0x48],%f10 |
michael@0 | 468 | fpack32 %f4,%f10,%f0 |
michael@0 | 469 | .end |
michael@0 | 470 | ! |
michael@0 | 471 | ! float vis_fpackfix(double /*frs2*/); |
michael@0 | 472 | ! |
michael@0 | 473 | .inline vis_fpackfix,8 |
michael@0 | 474 | std %o0,[%sp+0x48] |
michael@0 | 475 | ldd [%sp+0x48],%f4 |
michael@0 | 476 | fpackfix %f4,%f0 |
michael@0 | 477 | .end |
michael@0 | 478 | ! |
michael@0 | 479 | ! double vis_fpackfix_pair(double /*frs2*/, double /*frs2*/); |
michael@0 | 480 | ! |
michael@0 | 481 | .inline vis_fpackfix_pair,16 |
michael@0 | 482 | std %o0,[%sp+0x48] |
michael@0 | 483 | ldd [%sp+0x48],%f4 |
michael@0 | 484 | std %o2,[%sp+0x48] |
michael@0 | 485 | ldd [%sp+0x48],%f6 |
michael@0 | 486 | fpackfix %f4,%f0 |
michael@0 | 487 | fpackfix %f6,%f1 |
michael@0 | 488 | .end |
michael@0 | 489 | |
michael@0 | 490 | !-------------------------------------------------------------------- |
michael@0 | 491 | ! Motion estimation |
michael@0 | 492 | ! |
michael@0 | 493 | ! double vis_pdist(double /*frs1*/, double /*frs2*/, double /*frd*/); |
michael@0 | 494 | ! |
michael@0 | 495 | .inline vis_pdist,24 |
michael@0 | 496 | std %o4,[%sp+0x48] |
michael@0 | 497 | ldd [%sp+0x48],%f0 |
michael@0 | 498 | std %o0,[%sp+0x48] |
michael@0 | 499 | ldd [%sp+0x48],%f4 |
michael@0 | 500 | std %o2,[%sp+0x48] |
michael@0 | 501 | ldd [%sp+0x48],%f10 |
michael@0 | 502 | pdist %f4,%f10,%f0 |
michael@0 | 503 | .end |
michael@0 | 504 | |
michael@0 | 505 | !-------------------------------------------------------------------- |
michael@0 | 506 | ! Channel merging |
michael@0 | 507 | ! |
michael@0 | 508 | ! double vis_fpmerge(float /*frs1*/, float /*frs2*/); |
michael@0 | 509 | ! |
michael@0 | 510 | .inline vis_fpmerge,8 |
michael@0 | 511 | st %o0,[%sp+0x48] |
michael@0 | 512 | ld [%sp+0x48],%f4 |
michael@0 | 513 | st %o1,[%sp+0x48] |
michael@0 | 514 | ld [%sp+0x48],%f10 |
michael@0 | 515 | fpmerge %f4,%f10,%f0 |
michael@0 | 516 | .end |
michael@0 | 517 | |
michael@0 | 518 | !-------------------------------------------------------------------- |
michael@0 | 519 | ! Pixel expansion |
michael@0 | 520 | ! |
michael@0 | 521 | ! double vis_fexpand(float /*frs2*/); |
michael@0 | 522 | ! |
michael@0 | 523 | .inline vis_fexpand,4 |
michael@0 | 524 | st %o0,[%sp+0x48] |
michael@0 | 525 | ld [%sp+0x48],%f4 |
michael@0 | 526 | fexpand %f4,%f0 |
michael@0 | 527 | .end |
michael@0 | 528 | |
michael@0 | 529 | ! double vis_fexpand_hi(double /*frs2*/); |
michael@0 | 530 | ! |
michael@0 | 531 | .inline vis_fexpand_hi,8 |
michael@0 | 532 | std %o0,[%sp+0x48] |
michael@0 | 533 | ldd [%sp+0x48],%f4 |
michael@0 | 534 | fexpand %f4,%f0 |
michael@0 | 535 | .end |
michael@0 | 536 | |
michael@0 | 537 | ! double vis_fexpand_lo(double /*frs2*/); |
michael@0 | 538 | ! |
michael@0 | 539 | .inline vis_fexpand_lo,8 |
michael@0 | 540 | std %o0,[%sp+0x48] |
michael@0 | 541 | ldd [%sp+0x48],%f4 |
michael@0 | 542 | fmovs %f5, %f2 |
michael@0 | 543 | fexpand %f2,%f0 |
michael@0 | 544 | .end |
michael@0 | 545 | |
michael@0 | 546 | !-------------------------------------------------------------------- |
michael@0 | 547 | ! Bitwise logical operations |
michael@0 | 548 | ! |
michael@0 | 549 | ! double vis_fnor(double /*frs1*/, double /*frs2*/); |
michael@0 | 550 | ! |
michael@0 | 551 | .inline vis_fnor,16 |
michael@0 | 552 | std %o0,[%sp+0x48] |
michael@0 | 553 | ldd [%sp+0x48],%f4 |
michael@0 | 554 | std %o2,[%sp+0x48] |
michael@0 | 555 | ldd [%sp+0x48],%f10 |
michael@0 | 556 | fnor %f4,%f10,%f0 |
michael@0 | 557 | .end |
michael@0 | 558 | ! |
michael@0 | 559 | ! float vis_fnors(float /*frs1*/, float /*frs2*/); |
michael@0 | 560 | ! |
michael@0 | 561 | .inline vis_fnors,8 |
michael@0 | 562 | st %o0,[%sp+0x48] |
michael@0 | 563 | ld [%sp+0x48],%f4 |
michael@0 | 564 | st %o1,[%sp+0x48] |
michael@0 | 565 | ld [%sp+0x48],%f10 |
michael@0 | 566 | fnors %f4,%f10,%f0 |
michael@0 | 567 | .end |
michael@0 | 568 | ! |
michael@0 | 569 | ! double vis_fandnot(double /*frs1*/, double /*frs2*/); |
michael@0 | 570 | ! |
michael@0 | 571 | .inline vis_fandnot,16 |
michael@0 | 572 | std %o0,[%sp+0x48] |
michael@0 | 573 | ldd [%sp+0x48],%f4 |
michael@0 | 574 | std %o2,[%sp+0x48] |
michael@0 | 575 | ldd [%sp+0x48],%f10 |
michael@0 | 576 | fandnot1 %f4,%f10,%f0 |
michael@0 | 577 | .end |
michael@0 | 578 | ! |
michael@0 | 579 | ! float vis_fandnots(float /*frs1*/, float /*frs2*/); |
michael@0 | 580 | ! |
michael@0 | 581 | .inline vis_fandnots,8 |
michael@0 | 582 | st %o0,[%sp+0x48] |
michael@0 | 583 | ld [%sp+0x48],%f4 |
michael@0 | 584 | st %o1,[%sp+0x48] |
michael@0 | 585 | ld [%sp+0x48],%f10 |
michael@0 | 586 | fandnot1s %f4,%f10,%f0 |
michael@0 | 587 | .end |
michael@0 | 588 | ! |
michael@0 | 589 | ! double vis_fnot(double /*frs1*/); |
michael@0 | 590 | ! |
michael@0 | 591 | .inline vis_fnot,8 |
michael@0 | 592 | std %o0,[%sp+0x48] |
michael@0 | 593 | ldd [%sp+0x48],%f4 |
michael@0 | 594 | fnot1 %f4,%f0 |
michael@0 | 595 | .end |
michael@0 | 596 | ! |
michael@0 | 597 | ! float vis_fnots(float /*frs1*/); |
michael@0 | 598 | ! |
michael@0 | 599 | .inline vis_fnots,4 |
michael@0 | 600 | st %o0,[%sp+0x48] |
michael@0 | 601 | ld [%sp+0x48],%f4 |
michael@0 | 602 | fnot1s %f4,%f0 |
michael@0 | 603 | .end |
michael@0 | 604 | ! |
michael@0 | 605 | ! double vis_fxor(double /*frs1*/, double /*frs2*/); |
michael@0 | 606 | ! |
michael@0 | 607 | .inline vis_fxor,16 |
michael@0 | 608 | std %o0,[%sp+0x48] |
michael@0 | 609 | ldd [%sp+0x48],%f4 |
michael@0 | 610 | std %o2,[%sp+0x48] |
michael@0 | 611 | ldd [%sp+0x48],%f10 |
michael@0 | 612 | fxor %f4,%f10,%f0 |
michael@0 | 613 | .end |
michael@0 | 614 | ! |
michael@0 | 615 | ! float vis_fxors(float /*frs1*/, float /*frs2*/); |
michael@0 | 616 | ! |
michael@0 | 617 | .inline vis_fxors,8 |
michael@0 | 618 | st %o0,[%sp+0x48] |
michael@0 | 619 | ld [%sp+0x48],%f4 |
michael@0 | 620 | st %o1,[%sp+0x48] |
michael@0 | 621 | ld [%sp+0x48],%f10 |
michael@0 | 622 | fxors %f4,%f10,%f0 |
michael@0 | 623 | .end |
michael@0 | 624 | ! |
michael@0 | 625 | ! double vis_fnand(double /*frs1*/, double /*frs2*/); |
michael@0 | 626 | ! |
michael@0 | 627 | .inline vis_fnand,16 |
michael@0 | 628 | std %o0,[%sp+0x48] |
michael@0 | 629 | ldd [%sp+0x48],%f4 |
michael@0 | 630 | std %o2,[%sp+0x48] |
michael@0 | 631 | ldd [%sp+0x48],%f10 |
michael@0 | 632 | fnand %f4,%f10,%f0 |
michael@0 | 633 | .end |
michael@0 | 634 | ! |
michael@0 | 635 | ! float vis_fnands(float /*frs1*/, float /*frs2*/); |
michael@0 | 636 | ! |
michael@0 | 637 | .inline vis_fnands,8 |
michael@0 | 638 | st %o0,[%sp+0x48] |
michael@0 | 639 | ld [%sp+0x48],%f4 |
michael@0 | 640 | st %o1,[%sp+0x48] |
michael@0 | 641 | ld [%sp+0x48],%f10 |
michael@0 | 642 | fnands %f4,%f10,%f0 |
michael@0 | 643 | .end |
michael@0 | 644 | ! |
michael@0 | 645 | ! double vis_fand(double /*frs1*/, double /*frs2*/); |
michael@0 | 646 | ! |
michael@0 | 647 | .inline vis_fand,16 |
michael@0 | 648 | std %o0,[%sp+0x48] |
michael@0 | 649 | ldd [%sp+0x48],%f4 |
michael@0 | 650 | std %o2,[%sp+0x48] |
michael@0 | 651 | ldd [%sp+0x48],%f10 |
michael@0 | 652 | fand %f4,%f10,%f0 |
michael@0 | 653 | .end |
michael@0 | 654 | ! |
michael@0 | 655 | ! float vis_fands(float /*frs1*/, float /*frs2*/); |
michael@0 | 656 | ! |
michael@0 | 657 | .inline vis_fands,8 |
michael@0 | 658 | st %o0,[%sp+0x48] |
michael@0 | 659 | ld [%sp+0x48],%f4 |
michael@0 | 660 | st %o1,[%sp+0x48] |
michael@0 | 661 | ld [%sp+0x48],%f10 |
michael@0 | 662 | fands %f4,%f10,%f0 |
michael@0 | 663 | .end |
michael@0 | 664 | ! |
michael@0 | 665 | ! double vis_fxnor(double /*frs1*/, double /*frs2*/); |
michael@0 | 666 | ! |
michael@0 | 667 | .inline vis_fxnor,16 |
michael@0 | 668 | std %o0,[%sp+0x48] |
michael@0 | 669 | ldd [%sp+0x48],%f4 |
michael@0 | 670 | std %o2,[%sp+0x48] |
michael@0 | 671 | ldd [%sp+0x48],%f10 |
michael@0 | 672 | fxnor %f4,%f10,%f0 |
michael@0 | 673 | .end |
michael@0 | 674 | ! |
michael@0 | 675 | ! float vis_fxnors(float /*frs1*/, float /*frs2*/); |
michael@0 | 676 | ! |
michael@0 | 677 | .inline vis_fxnors,8 |
michael@0 | 678 | st %o0,[%sp+0x48] |
michael@0 | 679 | ld [%sp+0x48],%f4 |
michael@0 | 680 | st %o1,[%sp+0x48] |
michael@0 | 681 | ld [%sp+0x48],%f10 |
michael@0 | 682 | fxnors %f4,%f10,%f0 |
michael@0 | 683 | .end |
michael@0 | 684 | ! |
michael@0 | 685 | ! double vis_fsrc(double /*frs1*/); |
michael@0 | 686 | ! |
michael@0 | 687 | .inline vis_fsrc,8 |
michael@0 | 688 | std %o0,[%sp+0x48] |
michael@0 | 689 | ldd [%sp+0x48],%f4 |
michael@0 | 690 | fsrc1 %f4,%f0 |
michael@0 | 691 | .end |
michael@0 | 692 | ! |
michael@0 | 693 | ! float vis_fsrcs(float /*frs1*/); |
michael@0 | 694 | ! |
michael@0 | 695 | .inline vis_fsrcs,4 |
michael@0 | 696 | st %o0,[%sp+0x48] |
michael@0 | 697 | ld [%sp+0x48],%f4 |
michael@0 | 698 | fsrc1s %f4,%f0 |
michael@0 | 699 | .end |
michael@0 | 700 | ! |
michael@0 | 701 | ! double vis_fornot(double /*frs1*/, double /*frs2*/); |
michael@0 | 702 | ! |
michael@0 | 703 | .inline vis_fornot,16 |
michael@0 | 704 | std %o0,[%sp+0x48] |
michael@0 | 705 | ldd [%sp+0x48],%f4 |
michael@0 | 706 | std %o2,[%sp+0x48] |
michael@0 | 707 | ldd [%sp+0x48],%f10 |
michael@0 | 708 | fornot1 %f4,%f10,%f0 |
michael@0 | 709 | .end |
michael@0 | 710 | ! |
michael@0 | 711 | ! float vis_fornots(float /*frs1*/, float /*frs2*/); |
michael@0 | 712 | ! |
michael@0 | 713 | .inline vis_fornots,8 |
michael@0 | 714 | st %o0,[%sp+0x48] |
michael@0 | 715 | ld [%sp+0x48],%f4 |
michael@0 | 716 | st %o1,[%sp+0x48] |
michael@0 | 717 | ld [%sp+0x48],%f10 |
michael@0 | 718 | fornot1s %f4,%f10,%f0 |
michael@0 | 719 | .end |
michael@0 | 720 | ! |
michael@0 | 721 | ! double vis_for(double /*frs1*/, double /*frs2*/); |
michael@0 | 722 | ! |
michael@0 | 723 | .inline vis_for,16 |
michael@0 | 724 | std %o0,[%sp+0x48] |
michael@0 | 725 | ldd [%sp+0x48],%f4 |
michael@0 | 726 | std %o2,[%sp+0x48] |
michael@0 | 727 | ldd [%sp+0x48],%f10 |
michael@0 | 728 | for %f4,%f10,%f0 |
michael@0 | 729 | .end |
michael@0 | 730 | ! |
michael@0 | 731 | ! float vis_fors(float /*frs1*/, float /*frs2*/); |
michael@0 | 732 | ! |
michael@0 | 733 | .inline vis_fors,8 |
michael@0 | 734 | st %o0,[%sp+0x48] |
michael@0 | 735 | ld [%sp+0x48],%f4 |
michael@0 | 736 | st %o1,[%sp+0x48] |
michael@0 | 737 | ld [%sp+0x48],%f10 |
michael@0 | 738 | fors %f4,%f10,%f0 |
michael@0 | 739 | .end |
michael@0 | 740 | ! |
michael@0 | 741 | ! double vis_fzero(/* void */) |
michael@0 | 742 | ! |
michael@0 | 743 | .inline vis_fzero,0 |
michael@0 | 744 | fzero %f0 |
michael@0 | 745 | .end |
michael@0 | 746 | ! |
michael@0 | 747 | ! float vis_fzeros(/* void */) |
michael@0 | 748 | ! |
michael@0 | 749 | .inline vis_fzeros,0 |
michael@0 | 750 | fzeros %f0 |
michael@0 | 751 | .end |
michael@0 | 752 | ! |
michael@0 | 753 | ! double vis_fone(/* void */) |
michael@0 | 754 | ! |
michael@0 | 755 | .inline vis_fone,0 |
michael@0 | 756 | fone %f0 |
michael@0 | 757 | .end |
michael@0 | 758 | ! |
michael@0 | 759 | ! float vis_fones(/* void */) |
michael@0 | 760 | ! |
michael@0 | 761 | .inline vis_fones,0 |
michael@0 | 762 | fones %f0 |
michael@0 | 763 | .end |
michael@0 | 764 | |
michael@0 | 765 | !-------------------------------------------------------------------- |
michael@0 | 766 | ! Partial store instructions |
michael@0 | 767 | ! |
michael@0 | 768 | ! vis_stdfa_ASI_PST8P(double frd, void *rs1, int rmask) |
michael@0 | 769 | ! |
michael@0 | 770 | .inline vis_stdfa_ASI_PST8P,16 |
michael@0 | 771 | std %o0,[%sp+0x48] |
michael@0 | 772 | ldd [%sp+0x48],%f4 |
michael@0 | 773 | stda %f4,[%o2]%o3,0xc0 ! ASI_PST8_P |
michael@0 | 774 | .end |
michael@0 | 775 | ! |
michael@0 | 776 | ! vis_stdfa_ASI_PST8PL(double frd, void *rs1, int rmask) |
michael@0 | 777 | ! |
michael@0 | 778 | .inline vis_stdfa_ASI_PST8PL,16 |
michael@0 | 779 | std %o0,[%sp+0x48] |
michael@0 | 780 | ldd [%sp+0x48],%f4 |
michael@0 | 781 | stda %f4,[%o2]%o3,0xc8 ! ASI_PST8_PL |
michael@0 | 782 | .end |
michael@0 | 783 | ! |
michael@0 | 784 | ! vis_stdfa_ASI_PST8P_int_pair(void *rs1, void *rs2, void *rs3, int rmask); |
michael@0 | 785 | ! |
michael@0 | 786 | .inline vis_stdfa_ASI_PST8P_int_pair,16 |
michael@0 | 787 | ld [%o0],%f4 |
michael@0 | 788 | ld [%o1],%f5 |
michael@0 | 789 | stda %f4,[%o2]%o3,0xc0 ! ASI_PST8_P |
michael@0 | 790 | .end |
michael@0 | 791 | ! |
michael@0 | 792 | ! vis_stdfa_ASI_PST8S(double frd, void *rs1, int rmask) |
michael@0 | 793 | ! |
michael@0 | 794 | .inline vis_stdfa_ASI_PST8S,16 |
michael@0 | 795 | std %o0,[%sp+0x48] |
michael@0 | 796 | ldd [%sp+0x48],%f4 |
michael@0 | 797 | stda %f4,[%o2]%o3,0xc1 ! ASI_PST8_S |
michael@0 | 798 | .end |
michael@0 | 799 | ! |
michael@0 | 800 | ! vis_stdfa_ASI_PST16P(double frd, void *rs1, int rmask) |
michael@0 | 801 | ! |
michael@0 | 802 | .inline vis_stdfa_ASI_PST16P,16 |
michael@0 | 803 | std %o0,[%sp+0x48] |
michael@0 | 804 | ldd [%sp+0x48],%f4 |
michael@0 | 805 | stda %f4,[%o2]%o3,0xc2 ! ASI_PST16_P |
michael@0 | 806 | .end |
michael@0 | 807 | ! |
michael@0 | 808 | ! vis_stdfa_ASI_PST16S(double frd, void *rs1, int rmask) |
michael@0 | 809 | ! |
michael@0 | 810 | .inline vis_stdfa_ASI_PST16S,16 |
michael@0 | 811 | std %o0,[%sp+0x48] |
michael@0 | 812 | ldd [%sp+0x48],%f4 |
michael@0 | 813 | stda %f4,[%o2]%o3,0xc3 ! ASI_PST16_S |
michael@0 | 814 | .end |
michael@0 | 815 | ! |
michael@0 | 816 | ! vis_stdfa_ASI_PST32P(double frd, void *rs1, int rmask) |
michael@0 | 817 | ! |
michael@0 | 818 | .inline vis_stdfa_ASI_PST32P,16 |
michael@0 | 819 | std %o0,[%sp+0x48] |
michael@0 | 820 | ldd [%sp+0x48],%f4 |
michael@0 | 821 | stda %f4,[%o2]%o3,0xc4 ! ASI_PST32_P |
michael@0 | 822 | .end |
michael@0 | 823 | ! |
michael@0 | 824 | ! vis_stdfa_ASI_PST32S(double frd, void *rs1, int rmask) |
michael@0 | 825 | ! |
michael@0 | 826 | .inline vis_stdfa_ASI_PST32S,16 |
michael@0 | 827 | std %o0,[%sp+0x48] |
michael@0 | 828 | ldd [%sp+0x48],%f4 |
michael@0 | 829 | stda %f4,[%o2]%o3,0xc5 ! ASI_PST32_S |
michael@0 | 830 | .end |
michael@0 | 831 | |
michael@0 | 832 | !-------------------------------------------------------------------- |
michael@0 | 833 | ! Short store instructions |
michael@0 | 834 | ! |
michael@0 | 835 | ! vis_stdfa_ASI_FL8P(double frd, void *rs1) |
michael@0 | 836 | ! |
michael@0 | 837 | .inline vis_stdfa_ASI_FL8P,12 |
michael@0 | 838 | std %o0,[%sp+0x48] |
michael@0 | 839 | ldd [%sp+0x48],%f4 |
michael@0 | 840 | stda %f4,[%o2]0xd0 ! ASI_FL8_P |
michael@0 | 841 | .end |
michael@0 | 842 | ! |
michael@0 | 843 | ! vis_stdfa_ASI_FL8P_index(double frd, void *rs1, long index) |
michael@0 | 844 | ! |
michael@0 | 845 | .inline vis_stdfa_ASI_FL8P_index,16 |
michael@0 | 846 | std %o0,[%sp+0x48] |
michael@0 | 847 | ldd [%sp+0x48],%f4 |
michael@0 | 848 | stda %f4,[%o2+%o3]0xd0 ! ASI_FL8_P |
michael@0 | 849 | .end |
michael@0 | 850 | ! |
michael@0 | 851 | ! vis_stdfa_ASI_FL8S(double frd, void *rs1) |
michael@0 | 852 | ! |
michael@0 | 853 | .inline vis_stdfa_ASI_FL8S,12 |
michael@0 | 854 | std %o0,[%sp+0x48] |
michael@0 | 855 | ldd [%sp+0x48],%f4 |
michael@0 | 856 | stda %f4,[%o2]0xd1 ! ASI_FL8_S |
michael@0 | 857 | .end |
michael@0 | 858 | ! |
michael@0 | 859 | ! vis_stdfa_ASI_FL16P(double frd, void *rs1) |
michael@0 | 860 | ! |
michael@0 | 861 | .inline vis_stdfa_ASI_FL16P,12 |
michael@0 | 862 | std %o0,[%sp+0x48] |
michael@0 | 863 | ldd [%sp+0x48],%f4 |
michael@0 | 864 | stda %f4,[%o2]0xd2 ! ASI_FL16_P |
michael@0 | 865 | .end |
michael@0 | 866 | ! |
michael@0 | 867 | ! vis_stdfa_ASI_FL16P_index(double frd, void *rs1, long index) |
michael@0 | 868 | ! |
michael@0 | 869 | .inline vis_stdfa_ASI_FL16P_index,16 |
michael@0 | 870 | std %o0,[%sp+0x48] |
michael@0 | 871 | ldd [%sp+0x48],%f4 |
michael@0 | 872 | stda %f4,[%o2+%o3]0xd2 ! ASI_FL16_P |
michael@0 | 873 | .end |
michael@0 | 874 | ! |
michael@0 | 875 | ! vis_stdfa_ASI_FL16S(double frd, void *rs1) |
michael@0 | 876 | ! |
michael@0 | 877 | .inline vis_stdfa_ASI_FL16S,12 |
michael@0 | 878 | std %o0,[%sp+0x48] |
michael@0 | 879 | ldd [%sp+0x48],%f4 |
michael@0 | 880 | stda %f4,[%o2]0xd3 ! ASI_FL16_S |
michael@0 | 881 | .end |
michael@0 | 882 | ! |
michael@0 | 883 | ! vis_stdfa_ASI_FL8PL(double frd, void *rs1) |
michael@0 | 884 | ! |
michael@0 | 885 | .inline vis_stdfa_ASI_FL8PL,12 |
michael@0 | 886 | std %o0,[%sp+0x48] |
michael@0 | 887 | ldd [%sp+0x48],%f4 |
michael@0 | 888 | stda %f4,[%o2]0xd8 ! ASI_FL8_PL |
michael@0 | 889 | .end |
michael@0 | 890 | ! |
michael@0 | 891 | ! vis_stdfa_ASI_FL8SL(double frd, void *rs1) |
michael@0 | 892 | ! |
michael@0 | 893 | .inline vis_stdfa_ASI_FL8SL,12 |
michael@0 | 894 | std %o0,[%sp+0x48] |
michael@0 | 895 | ldd [%sp+0x48],%f4 |
michael@0 | 896 | stda %f4,[%o2]0xd9 ! ASI_FL8_SL |
michael@0 | 897 | .end |
michael@0 | 898 | ! |
michael@0 | 899 | ! vis_stdfa_ASI_FL16PL(double frd, void *rs1) |
michael@0 | 900 | ! |
michael@0 | 901 | .inline vis_stdfa_ASI_FL16PL,12 |
michael@0 | 902 | std %o0,[%sp+0x48] |
michael@0 | 903 | ldd [%sp+0x48],%f4 |
michael@0 | 904 | stda %f4,[%o2]0xda ! ASI_FL16_PL |
michael@0 | 905 | .end |
michael@0 | 906 | ! |
michael@0 | 907 | ! vis_stdfa_ASI_FL16SL(double frd, void *rs1) |
michael@0 | 908 | ! |
michael@0 | 909 | .inline vis_stdfa_ASI_FL16SL,12 |
michael@0 | 910 | std %o0,[%sp+0x48] |
michael@0 | 911 | ldd [%sp+0x48],%f4 |
michael@0 | 912 | stda %f4,[%o2]0xdb ! ASI_FL16_SL |
michael@0 | 913 | .end |
michael@0 | 914 | |
michael@0 | 915 | !-------------------------------------------------------------------- |
michael@0 | 916 | ! Short load instructions |
michael@0 | 917 | ! |
michael@0 | 918 | ! double vis_lddfa_ASI_FL8P(void *rs1) |
michael@0 | 919 | ! |
michael@0 | 920 | .inline vis_lddfa_ASI_FL8P,4 |
michael@0 | 921 | ldda [%o0]0xd0,%f4 ! ASI_FL8_P |
michael@0 | 922 | fmovd %f4,%f0 ! Compiler can clean this up |
michael@0 | 923 | .end |
michael@0 | 924 | ! |
michael@0 | 925 | ! double vis_lddfa_ASI_FL8P_index(void *rs1, long index) |
michael@0 | 926 | ! |
michael@0 | 927 | .inline vis_lddfa_ASI_FL8P_index,8 |
michael@0 | 928 | ldda [%o0+%o1]0xd0,%f4 |
michael@0 | 929 | fmovd %f4,%f0 |
michael@0 | 930 | .end |
michael@0 | 931 | ! |
michael@0 | 932 | ! double vis_lddfa_ASI_FL8P_hi(void *rs1, unsigned int index) |
michael@0 | 933 | ! |
michael@0 | 934 | .inline vis_lddfa_ASI_FL8P_hi,8 |
michael@0 | 935 | sra %o1,16,%o1 |
michael@0 | 936 | ldda [%o0+%o1]0xd0,%f4 |
michael@0 | 937 | fmovd %f4,%f0 |
michael@0 | 938 | .end |
michael@0 | 939 | ! |
michael@0 | 940 | ! double vis_lddfa_ASI_FL8P_lo(void *rs1, unsigned int index) |
michael@0 | 941 | ! |
michael@0 | 942 | .inline vis_lddfa_ASI_FL8P_lo,8 |
michael@0 | 943 | sll %o1,16,%o1 |
michael@0 | 944 | sra %o1,16,%o1 |
michael@0 | 945 | ldda [%o0+%o1]0xd0,%f4 |
michael@0 | 946 | fmovd %f4,%f0 |
michael@0 | 947 | .end |
michael@0 | 948 | ! |
michael@0 | 949 | ! double vis_lddfa_ASI_FL8S(void *rs1) |
michael@0 | 950 | ! |
michael@0 | 951 | .inline vis_lddfa_ASI_FL8S,4 |
michael@0 | 952 | ldda [%o0]0xd1,%f4 ! ASI_FL8_S |
michael@0 | 953 | fmovd %f4,%f0 |
michael@0 | 954 | .end |
michael@0 | 955 | ! |
michael@0 | 956 | ! double vis_lddfa_ASI_FL16P(void *rs1) |
michael@0 | 957 | ! |
michael@0 | 958 | .inline vis_lddfa_ASI_FL16P,4 |
michael@0 | 959 | ldda [%o0]0xd2,%f4 ! ASI_FL16_P |
michael@0 | 960 | fmovd %f4,%f0 |
michael@0 | 961 | .end |
michael@0 | 962 | ! |
michael@0 | 963 | ! double vis_lddfa_ASI_FL16P_index(void *rs1, long index) |
michael@0 | 964 | ! |
michael@0 | 965 | .inline vis_lddfa_ASI_FL16P_index,8 |
michael@0 | 966 | ldda [%o0+%o1]0xd2,%f4 ! ASI_FL16_P |
michael@0 | 967 | fmovd %f4,%f0 |
michael@0 | 968 | .end |
michael@0 | 969 | ! |
michael@0 | 970 | ! double vis_lddfa_ASI_FL16S(void *rs1) |
michael@0 | 971 | ! |
michael@0 | 972 | .inline vis_lddfa_ASI_FL16S,4 |
michael@0 | 973 | ldda [%o0]0xd3,%f4 ! ASI_FL16_S |
michael@0 | 974 | fmovd %f4,%f0 |
michael@0 | 975 | .end |
michael@0 | 976 | ! |
michael@0 | 977 | ! double vis_lddfa_ASI_FL8PL(void *rs1) |
michael@0 | 978 | ! |
michael@0 | 979 | .inline vis_lddfa_ASI_FL8PL,4 |
michael@0 | 980 | ldda [%o0]0xd8,%f4 ! ASI_FL8_PL |
michael@0 | 981 | fmovd %f4,%f0 |
michael@0 | 982 | .end |
michael@0 | 983 | ! |
michael@0 | 984 | ! double vis_lddfa_ASI_FL8PL_index(void *rs1, long index) |
michael@0 | 985 | ! |
michael@0 | 986 | .inline vis_lddfa_ASI_FL8PL_index,8 |
michael@0 | 987 | ldda [%o0+%o1]0xd8,%f4 ! ASI_FL8_PL |
michael@0 | 988 | fmovd %f4,%f0 |
michael@0 | 989 | .end |
michael@0 | 990 | ! |
michael@0 | 991 | ! double vis_lddfa_ASI_FL8SL(void *rs1) |
michael@0 | 992 | ! |
michael@0 | 993 | .inline vis_lddfa_ASI_FL8SL,4 |
michael@0 | 994 | ldda [%o0]0xd9,%f4 ! ASI_FL8_SL |
michael@0 | 995 | fmovd %f4,%f0 |
michael@0 | 996 | .end |
michael@0 | 997 | ! |
michael@0 | 998 | ! double vis_lddfa_ASI_FL16PL(void *rs1) |
michael@0 | 999 | ! |
michael@0 | 1000 | .inline vis_lddfa_ASI_FL16PL,4 |
michael@0 | 1001 | ldda [%o0]0xda,%f4 ! ASI_FL16_PL |
michael@0 | 1002 | fmovd %f4,%f0 |
michael@0 | 1003 | .end |
michael@0 | 1004 | ! |
michael@0 | 1005 | ! double vis_lddfa_ASI_FL16PL_index(void *rs1, long index) |
michael@0 | 1006 | ! |
michael@0 | 1007 | .inline vis_lddfa_ASI_FL16PL_index,8 |
michael@0 | 1008 | ldda [%o0+%o1]0xda,%f4 ! ASI_FL16_PL |
michael@0 | 1009 | fmovd %f4,%f0 |
michael@0 | 1010 | .end |
michael@0 | 1011 | ! |
michael@0 | 1012 | ! double vis_lddfa_ASI_FL16SL(void *rs1) |
michael@0 | 1013 | ! |
michael@0 | 1014 | .inline vis_lddfa_ASI_FL16SL,4 |
michael@0 | 1015 | ldda [%o0]0xdb,%f4 ! ASI_FL16_SL |
michael@0 | 1016 | fmovd %f4,%f0 |
michael@0 | 1017 | .end |
michael@0 | 1018 | |
michael@0 | 1019 | !-------------------------------------------------------------------- |
michael@0 | 1020 | ! Graphics status register |
michael@0 | 1021 | ! |
michael@0 | 1022 | ! unsigned int vis_read_gsr(void) |
michael@0 | 1023 | ! |
michael@0 | 1024 | .inline vis_read_gsr,0 |
michael@0 | 1025 | rd %gsr,%o0 |
michael@0 | 1026 | .end |
michael@0 | 1027 | ! |
michael@0 | 1028 | ! void vis_write_gsr(unsigned int /* GSR */) |
michael@0 | 1029 | ! |
michael@0 | 1030 | .inline vis_write_gsr,4 |
michael@0 | 1031 | wr %g0,%o0,%gsr |
michael@0 | 1032 | .end |
michael@0 | 1033 | |
michael@0 | 1034 | !-------------------------------------------------------------------- |
michael@0 | 1035 | ! Voxel texture mapping |
michael@0 | 1036 | ! |
michael@0 | 1037 | ! unsigned long vis_array8(unsigned long long /*rs1 */, int /*rs2*/) |
michael@0 | 1038 | ! |
michael@0 | 1039 | .inline vis_array8,12 |
michael@0 | 1040 | sllx %o0,32,%o0 |
michael@0 | 1041 | srl %o1,0,%o1 ! clear the most significant 32 bits of %o1 |
michael@0 | 1042 | or %o0,%o1,%o3 ! join %o0 and %o1 into %o3 |
michael@0 | 1043 | array8 %o3,%o2,%o0 |
michael@0 | 1044 | .end |
michael@0 | 1045 | ! |
michael@0 | 1046 | ! unsigned long vis_array16(unsigned long long /*rs1*/, int /*rs2*/) |
michael@0 | 1047 | ! |
michael@0 | 1048 | .inline vis_array16,12 |
michael@0 | 1049 | sllx %o0,32,%o0 |
michael@0 | 1050 | srl %o1,0,%o1 ! clear the most significant 32 bits of %o1 |
michael@0 | 1051 | or %o0,%o1,%o3 ! join %o0 and %o1 into %o3 |
michael@0 | 1052 | array16 %o3,%o2,%o0 |
michael@0 | 1053 | .end |
michael@0 | 1054 | ! |
michael@0 | 1055 | ! unsigned long vis_array32(unsigned long long /*rs1*/, int /*rs2*/) |
michael@0 | 1056 | ! |
michael@0 | 1057 | .inline vis_array32,12 |
michael@0 | 1058 | sllx %o0,32,%o0 |
michael@0 | 1059 | srl %o1,0,%o1 ! clear the most significant 32 bits of %o1 |
michael@0 | 1060 | or %o0,%o1,%o3 ! join %o0 and %o1 into %o3 |
michael@0 | 1061 | array32 %o3,%o2,%o0 |
michael@0 | 1062 | .end |
michael@0 | 1063 | |
michael@0 | 1064 | !-------------------------------------------------------------------- |
michael@0 | 1065 | ! Register aliasing and type casts |
michael@0 | 1066 | ! |
michael@0 | 1067 | ! float vis_read_hi(double /* frs1 */); |
michael@0 | 1068 | ! |
michael@0 | 1069 | .inline vis_read_hi,8 |
michael@0 | 1070 | std %o0,[%sp+0x48] ! store double frs1 |
michael@0 | 1071 | ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1; return %f0; |
michael@0 | 1072 | .end |
michael@0 | 1073 | ! |
michael@0 | 1074 | ! float vis_read_lo(double /* frs1 */); |
michael@0 | 1075 | ! |
michael@0 | 1076 | .inline vis_read_lo,8 |
michael@0 | 1077 | std %o0,[%sp+0x48] ! store double frs1 |
michael@0 | 1078 | ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1; |
michael@0 | 1079 | fmovs %f1,%f0 ! %f0 = low word (frs1); return %f0; |
michael@0 | 1080 | .end |
michael@0 | 1081 | ! |
michael@0 | 1082 | ! double vis_write_hi(double /* frs1 */, float /* frs2 */); |
michael@0 | 1083 | ! |
michael@0 | 1084 | .inline vis_write_hi,12 |
michael@0 | 1085 | std %o0,[%sp+0x48] ! store double frs1; |
michael@0 | 1086 | ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1; |
michael@0 | 1087 | st %o2,[%sp+0x44] ! store float frs2; |
michael@0 | 1088 | ld [%sp+0x44],%f2 ! %f2 = float frs2; |
michael@0 | 1089 | fmovs %f2,%f0 ! %f0 = float frs2; return %f0:f1; |
michael@0 | 1090 | .end |
michael@0 | 1091 | ! |
michael@0 | 1092 | ! double vis_write_lo(double /* frs1 */, float /* frs2 */); |
michael@0 | 1093 | ! |
michael@0 | 1094 | .inline vis_write_lo,12 |
michael@0 | 1095 | std %o0,[%sp+0x48] ! store double frs1; |
michael@0 | 1096 | ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1; |
michael@0 | 1097 | st %o2,[%sp+0x44] ! store float frs2; |
michael@0 | 1098 | ld [%sp+0x44],%f2 ! %f2 = float frs2; |
michael@0 | 1099 | fmovs %f2,%f1 ! %f1 = float frs2; return %f0:f1; |
michael@0 | 1100 | .end |
michael@0 | 1101 | ! |
michael@0 | 1102 | ! double vis_freg_pair(float /* frs1 */, float /* frs2 */); |
michael@0 | 1103 | ! |
michael@0 | 1104 | .inline vis_freg_pair,8 |
michael@0 | 1105 | st %o0,[%sp+0x48] ! store float frs1 |
michael@0 | 1106 | ld [%sp+0x48],%f0 |
michael@0 | 1107 | st %o1,[%sp+0x48] ! store float frs2 |
michael@0 | 1108 | ld [%sp+0x48],%f1 |
michael@0 | 1109 | .end |
michael@0 | 1110 | ! |
michael@0 | 1111 | ! float vis_to_float(unsigned int /*value*/); |
michael@0 | 1112 | ! |
michael@0 | 1113 | .inline vis_to_float,4 |
michael@0 | 1114 | st %o0,[%sp+0x48] |
michael@0 | 1115 | ld [%sp+0x48],%f0 |
michael@0 | 1116 | .end |
michael@0 | 1117 | ! |
michael@0 | 1118 | ! double vis_to_double(unsigned int /*value1*/, unsigned int /*value2*/); |
michael@0 | 1119 | ! |
michael@0 | 1120 | .inline vis_to_double,8 |
michael@0 | 1121 | std %o0,[%sp+0x48] |
michael@0 | 1122 | ldd [%sp+0x48],%f0 |
michael@0 | 1123 | .end |
michael@0 | 1124 | ! |
michael@0 | 1125 | ! double vis_to_double_dup(unsigned int /*value*/); |
michael@0 | 1126 | ! |
michael@0 | 1127 | .inline vis_to_double_dup,4 |
michael@0 | 1128 | st %o0,[%sp+0x48] |
michael@0 | 1129 | ld [%sp+0x48],%f1 |
michael@0 | 1130 | fmovs %f1,%f0 ! duplicate value |
michael@0 | 1131 | .end |
michael@0 | 1132 | ! |
michael@0 | 1133 | ! double vis_ll_to_double(unsigned long long /*value*/); |
michael@0 | 1134 | ! |
michael@0 | 1135 | .inline vis_ll_to_double,8 |
michael@0 | 1136 | std %o0,[%sp+0x48] |
michael@0 | 1137 | ldd [%sp+0x48],%f0 |
michael@0 | 1138 | .end |
michael@0 | 1139 | |
michael@0 | 1140 | !-------------------------------------------------------------------- |
michael@0 | 1141 | ! Address space identifier (ASI) register |
michael@0 | 1142 | ! |
michael@0 | 1143 | ! unsigned int vis_read_asi(void) |
michael@0 | 1144 | ! |
michael@0 | 1145 | .inline vis_read_asi,0 |
michael@0 | 1146 | rd %asi,%o0 |
michael@0 | 1147 | .end |
michael@0 | 1148 | ! |
michael@0 | 1149 | ! void vis_write_asi(unsigned int /* ASI */) |
michael@0 | 1150 | ! |
michael@0 | 1151 | .inline vis_write_asi,4 |
michael@0 | 1152 | wr %g0,%o0,%asi |
michael@0 | 1153 | .end |
michael@0 | 1154 | |
michael@0 | 1155 | !-------------------------------------------------------------------- |
michael@0 | 1156 | ! Load/store from/into alternate space |
michael@0 | 1157 | ! |
michael@0 | 1158 | ! float vis_ldfa_ASI_REG(void *rs1) |
michael@0 | 1159 | ! |
michael@0 | 1160 | .inline vis_ldfa_ASI_REG,4 |
michael@0 | 1161 | lda [%o0+0]%asi,%f4 |
michael@0 | 1162 | fmovs %f4,%f0 ! Compiler can clean this up |
michael@0 | 1163 | .end |
michael@0 | 1164 | ! |
michael@0 | 1165 | ! float vis_ldfa_ASI_P(void *rs1) |
michael@0 | 1166 | ! |
michael@0 | 1167 | .inline vis_ldfa_ASI_P,4 |
michael@0 | 1168 | lda [%o0]0x80,%f4 ! ASI_P |
michael@0 | 1169 | fmovs %f4,%f0 ! Compiler can clean this up |
michael@0 | 1170 | .end |
michael@0 | 1171 | ! |
michael@0 | 1172 | ! float vis_ldfa_ASI_PL(void *rs1) |
michael@0 | 1173 | ! |
michael@0 | 1174 | .inline vis_ldfa_ASI_PL,4 |
michael@0 | 1175 | lda [%o0]0x88,%f4 ! ASI_PL |
michael@0 | 1176 | fmovs %f4,%f0 ! Compiler can clean this up |
michael@0 | 1177 | .end |
michael@0 | 1178 | ! |
michael@0 | 1179 | ! double vis_lddfa_ASI_REG(void *rs1) |
michael@0 | 1180 | ! |
michael@0 | 1181 | .inline vis_lddfa_ASI_REG,4 |
michael@0 | 1182 | ldda [%o0+0]%asi,%f4 |
michael@0 | 1183 | fmovd %f4,%f0 ! Compiler can clean this up |
michael@0 | 1184 | .end |
michael@0 | 1185 | ! |
michael@0 | 1186 | ! double vis_lddfa_ASI_P(void *rs1) |
michael@0 | 1187 | ! |
michael@0 | 1188 | .inline vis_lddfa_ASI_P,4 |
michael@0 | 1189 | ldda [%o0]0x80,%f4 ! ASI_P |
michael@0 | 1190 | fmovd %f4,%f0 ! Compiler can clean this up |
michael@0 | 1191 | .end |
michael@0 | 1192 | ! |
michael@0 | 1193 | ! double vis_lddfa_ASI_PL(void *rs1) |
michael@0 | 1194 | ! |
michael@0 | 1195 | .inline vis_lddfa_ASI_PL,4 |
michael@0 | 1196 | ldda [%o0]0x88,%f4 ! ASI_PL |
michael@0 | 1197 | fmovd %f4,%f0 ! Compiler can clean this up |
michael@0 | 1198 | .end |
michael@0 | 1199 | ! |
michael@0 | 1200 | ! vis_stfa_ASI_REG(float frs, void *rs1) |
michael@0 | 1201 | ! |
michael@0 | 1202 | .inline vis_stfa_ASI_REG,8 |
michael@0 | 1203 | st %o0,[%sp+0x48] |
michael@0 | 1204 | ld [%sp+0x48],%f4 |
michael@0 | 1205 | sta %f4,[%o1+0]%asi |
michael@0 | 1206 | .end |
michael@0 | 1207 | ! |
michael@0 | 1208 | ! vis_stfa_ASI_P(float frs, void *rs1) |
michael@0 | 1209 | ! |
michael@0 | 1210 | .inline vis_stfa_ASI_P,8 |
michael@0 | 1211 | st %o0,[%sp+0x48] |
michael@0 | 1212 | ld [%sp+0x48],%f4 |
michael@0 | 1213 | sta %f4,[%o1]0x80 ! ASI_P |
michael@0 | 1214 | .end |
michael@0 | 1215 | ! |
michael@0 | 1216 | ! vis_stfa_ASI_PL(float frs, void *rs1) |
michael@0 | 1217 | ! |
michael@0 | 1218 | .inline vis_stfa_ASI_PL,8 |
michael@0 | 1219 | st %o0,[%sp+0x48] |
michael@0 | 1220 | ld [%sp+0x48],%f4 |
michael@0 | 1221 | sta %f4,[%o1]0x88 ! ASI_PL |
michael@0 | 1222 | .end |
michael@0 | 1223 | ! |
michael@0 | 1224 | ! vis_stdfa_ASI_REG(double frd, void *rs1) |
michael@0 | 1225 | ! |
michael@0 | 1226 | .inline vis_stdfa_ASI_REG,12 |
michael@0 | 1227 | std %o0,[%sp+0x48] |
michael@0 | 1228 | ldd [%sp+0x48],%f4 |
michael@0 | 1229 | stda %f4,[%o2+0]%asi |
michael@0 | 1230 | .end |
michael@0 | 1231 | ! |
michael@0 | 1232 | ! vis_stdfa_ASI_P(double frd, void *rs1) |
michael@0 | 1233 | ! |
michael@0 | 1234 | .inline vis_stdfa_ASI_P,12 |
michael@0 | 1235 | std %o0,[%sp+0x48] |
michael@0 | 1236 | ldd [%sp+0x48],%f4 |
michael@0 | 1237 | stda %f4,[%o2]0x80 ! ASI_P |
michael@0 | 1238 | .end |
michael@0 | 1239 | ! |
michael@0 | 1240 | ! vis_stdfa_ASI_PL(double frd, void *rs1) |
michael@0 | 1241 | ! |
michael@0 | 1242 | .inline vis_stdfa_ASI_PL,12 |
michael@0 | 1243 | std %o0,[%sp+0x48] |
michael@0 | 1244 | ldd [%sp+0x48],%f4 |
michael@0 | 1245 | stda %f4,[%o2]0x88 ! ASI_PL |
michael@0 | 1246 | .end |
michael@0 | 1247 | ! |
michael@0 | 1248 | ! unsigned short vis_lduha_ASI_REG(void *rs1) |
michael@0 | 1249 | ! |
michael@0 | 1250 | .inline vis_lduha_ASI_REG,4 |
michael@0 | 1251 | lduha [%o0+0]%asi,%o0 |
michael@0 | 1252 | .end |
michael@0 | 1253 | ! |
michael@0 | 1254 | ! unsigned short vis_lduha_ASI_P(void *rs1) |
michael@0 | 1255 | ! |
michael@0 | 1256 | .inline vis_lduha_ASI_P,4 |
michael@0 | 1257 | lduha [%o0]0x80,%o0 ! ASI_P |
michael@0 | 1258 | .end |
michael@0 | 1259 | ! |
michael@0 | 1260 | ! unsigned short vis_lduha_ASI_PL(void *rs1) |
michael@0 | 1261 | ! |
michael@0 | 1262 | .inline vis_lduha_ASI_PL,4 |
michael@0 | 1263 | lduha [%o0]0x88,%o0 ! ASI_PL |
michael@0 | 1264 | .end |
michael@0 | 1265 | ! |
michael@0 | 1266 | ! unsigned short vis_lduha_ASI_P_index(void *rs1, long index) |
michael@0 | 1267 | ! |
michael@0 | 1268 | .inline vis_lduha_ASI_P_index,8 |
michael@0 | 1269 | lduha [%o0+%o1]0x80,%o0 ! ASI_P |
michael@0 | 1270 | .end |
michael@0 | 1271 | ! |
michael@0 | 1272 | ! unsigned short vis_lduha_ASI_PL_index(void *rs1, long index) |
michael@0 | 1273 | ! |
michael@0 | 1274 | .inline vis_lduha_ASI_PL_index,8 |
michael@0 | 1275 | lduha [%o0+%o1]0x88,%o0 ! ASI_PL |
michael@0 | 1276 | .end |
michael@0 | 1277 | |
michael@0 | 1278 | !-------------------------------------------------------------------- |
michael@0 | 1279 | ! Prefetch |
michael@0 | 1280 | ! |
michael@0 | 1281 | ! void vis_prefetch_read(void * /*address*/); |
michael@0 | 1282 | ! |
michael@0 | 1283 | .inline vis_prefetch_read,4 |
michael@0 | 1284 | prefetch [%o0+0],0 |
michael@0 | 1285 | .end |
michael@0 | 1286 | ! |
michael@0 | 1287 | ! void vis_prefetch_write(void * /*address*/); |
michael@0 | 1288 | ! |
michael@0 | 1289 | .inline vis_prefetch_write,4 |
michael@0 | 1290 | prefetch [%o0+0],2 |
michael@0 | 1291 | .end |