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security/nss/lib/freebl/mpi/vis_64.il@6474c204b198 (annotated)

security/nss/lib/freebl/mpi/vis_64.il

Wed, 31 Dec 2014 06:09:35 +0100

author

Michael Schloh von Bennewitz <michael@schloh.com>

date

Wed, 31 Dec 2014 06:09:35 +0100

changeset 0

6474c204b198

permissions

-rw-r--r--

Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.

michael@0	1	!
michael@0	2	! This Source Code Form is subject to the terms of the Mozilla Public
michael@0	3	! License, v. 2.0. If a copy of the MPL was not distributed with this
michael@0	4	! file, You can obtain one at http://mozilla.org/MPL/2.0/.
michael@0	5
michael@0	6	! This file is to be used in place of vis.il in 64-bit builds.
michael@0	7
michael@0	8	!--------------------------------------------------------------------
michael@0	9	! Pure edge handling instructions
michael@0	10	!
michael@0	11	! int vis_edge8(void */*frs1*/, void */*frs2*/);
michael@0	12	!
michael@0	13	.inline vis_edge8,16
michael@0	14	edge8 %o0,%o1,%o0
michael@0	15	.end
michael@0	16	!
michael@0	17	! int vis_edge8l(void */*frs1*/, void */*frs2*/);
michael@0	18	!
michael@0	19	.inline vis_edge8l,16
michael@0	20	edge8l %o0,%o1,%o0
michael@0	21	.end
michael@0	22	!
michael@0	23	! int vis_edge16(void */*frs1*/, void */*frs2*/);
michael@0	24	!
michael@0	25	.inline vis_edge16,16
michael@0	26	edge16 %o0,%o1,%o0
michael@0	27	.end
michael@0	28	!
michael@0	29	! int vis_edge16l(void */*frs1*/, void */*frs2*/);
michael@0	30	!
michael@0	31	.inline vis_edge16l,16
michael@0	32	edge16l %o0,%o1,%o0
michael@0	33	.end
michael@0	34	!
michael@0	35	! int vis_edge32(void */*frs1*/, void */*frs2*/);
michael@0	36	!
michael@0	37	.inline vis_edge32,16
michael@0	38	edge32 %o0,%o1,%o0
michael@0	39	.end
michael@0	40	!
michael@0	41	! int vis_edge32l(void */*frs1*/, void */*frs2*/);
michael@0	42	!
michael@0	43	.inline vis_edge32l,16
michael@0	44	edge32l %o0,%o1,%o0
michael@0	45	.end
michael@0	46
michael@0	47	!--------------------------------------------------------------------
michael@0	48	! Edge handling instructions with negative return values if cc set
michael@0	49	!
michael@0	50	! int vis_edge8cc(void */*frs1*/, void */*frs2*/);
michael@0	51	!
michael@0	52	.inline vis_edge8cc,16
michael@0	53	edge8 %o0,%o1,%o0
michael@0	54	mov 0,%o1
michael@0	55	movgu %xcc,-1024,%o1
michael@0	56	or %o1,%o0,%o0
michael@0	57	.end
michael@0	58	!
michael@0	59	! int vis_edge8lcc(void */*frs1*/, void */*frs2*/);
michael@0	60	!
michael@0	61	.inline vis_edge8lcc,16
michael@0	62	edge8l %o0,%o1,%o0
michael@0	63	mov 0,%o1
michael@0	64	movgu %xcc,-1024,%o1
michael@0	65	or %o1,%o0,%o0
michael@0	66	.end
michael@0	67	!
michael@0	68	! int vis_edge16cc(void */*frs1*/, void */*frs2*/);
michael@0	69	!
michael@0	70	.inline vis_edge16cc,16
michael@0	71	edge16 %o0,%o1,%o0
michael@0	72	mov 0,%o1
michael@0	73	movgu %xcc,-1024,%o1
michael@0	74	or %o1,%o0,%o0
michael@0	75	.end
michael@0	76	!
michael@0	77	! int vis_edge16lcc(void */*frs1*/, void */*frs2*/);
michael@0	78	!
michael@0	79	.inline vis_edge16lcc,16
michael@0	80	edge16l %o0,%o1,%o0
michael@0	81	mov 0,%o1
michael@0	82	movgu %xcc,-1024,%o1
michael@0	83	or %o1,%o0,%o0
michael@0	84	.end
michael@0	85	!
michael@0	86	! int vis_edge32cc(void */*frs1*/, void */*frs2*/);
michael@0	87	!
michael@0	88	.inline vis_edge32cc,16
michael@0	89	edge32 %o0,%o1,%o0
michael@0	90	mov 0,%o1
michael@0	91	movgu %xcc,-1024,%o1
michael@0	92	or %o1,%o0,%o0
michael@0	93	.end
michael@0	94	!
michael@0	95	! int vis_edge32lcc(void */*frs1*/, void */*frs2*/);
michael@0	96	!
michael@0	97	.inline vis_edge32lcc,16
michael@0	98	edge32l %o0,%o1,%o0
michael@0	99	mov 0,%o1
michael@0	100	movgu %xcc,-1024,%o1
michael@0	101	or %o1,%o0,%o0
michael@0	102	.end
michael@0	103
michael@0	104	!--------------------------------------------------------------------
michael@0	105	! Alignment instructions
michael@0	106	!
michael@0	107	! void *vis_alignaddr(void */*rs1*/, int /*rs2*/);
michael@0	108	!
michael@0	109	.inline vis_alignaddr,12
michael@0	110	alignaddr %o0,%o1,%o0
michael@0	111	.end
michael@0	112	!
michael@0	113	! void *vis_alignaddrl(void */*rs1*/, int /*rs2*/);
michael@0	114	!
michael@0	115	.inline vis_alignaddrl,12
michael@0	116	alignaddrl %o0,%o1,%o0
michael@0	117	.end
michael@0	118	!
michael@0	119	! double vis_faligndata(double /*frs1*/, double /*frs2*/);
michael@0	120	!
michael@0	121	.inline vis_faligndata,16
michael@0	122	faligndata %f0,%f2,%f0
michael@0	123	.end
michael@0	124
michael@0	125	!--------------------------------------------------------------------
michael@0	126	! Partitioned comparison instructions
michael@0	127	!
michael@0	128	! int vis_fcmple16(double /*frs1*/, double /*frs2*/);
michael@0	129	!
michael@0	130	.inline vis_fcmple16,16
michael@0	131	fcmple16 %f0,%f2,%o0
michael@0	132	.end
michael@0	133	!
michael@0	134	! int vis_fcmpne16(double /*frs1*/, double /*frs2*/);
michael@0	135	!
michael@0	136	.inline vis_fcmpne16,16
michael@0	137	fcmpne16 %f0,%f2,%o0
michael@0	138	.end
michael@0	139	!
michael@0	140	! int vis_fcmple32(double /*frs1*/, double /*frs2*/);
michael@0	141	!
michael@0	142	.inline vis_fcmple32,16
michael@0	143	fcmple32 %f0,%f2,%o0
michael@0	144	.end
michael@0	145	!
michael@0	146	! int vis_fcmpne32(double /*frs1*/, double /*frs2*/);
michael@0	147	!
michael@0	148	.inline vis_fcmpne32,16
michael@0	149	fcmpne32 %f0,%f2,%o0
michael@0	150	.end
michael@0	151	!
michael@0	152	! int vis_fcmpgt16(double /*frs1*/, double /*frs2*/);
michael@0	153	!
michael@0	154	.inline vis_fcmpgt16,16
michael@0	155	fcmpgt16 %f0,%f2,%o0
michael@0	156	.end
michael@0	157	!
michael@0	158	! int vis_fcmpeq16(double /*frs1*/, double /*frs2*/);
michael@0	159	!
michael@0	160	.inline vis_fcmpeq16,16
michael@0	161	fcmpeq16 %f0,%f2,%o0
michael@0	162	.end
michael@0	163	!
michael@0	164	! int vis_fcmpgt32(double /*frs1*/, double /*frs2*/);
michael@0	165	!
michael@0	166	.inline vis_fcmpgt32,16
michael@0	167	fcmpgt32 %f0,%f2,%o0
michael@0	168	.end
michael@0	169	!
michael@0	170	! int vis_fcmpeq32(double /*frs1*/, double /*frs2*/);
michael@0	171	!
michael@0	172	.inline vis_fcmpeq32,16
michael@0	173	fcmpeq32 %f0,%f2,%o0
michael@0	174	.end
michael@0	175
michael@0	176	!--------------------------------------------------------------------
michael@0	177	! Partitioned arithmetic
michael@0	178	!
michael@0	179	! double vis_fmul8x16(float /*frs1*/, double /*frs2*/);
michael@0	180	!
michael@0	181	.inline vis_fmul8x16,12
michael@0	182	fmul8x16 %f1,%f2,%f0
michael@0	183	.end
michael@0	184	!
michael@0	185	! double vis_fmul8x16_dummy(float /*frs1*/, int /*dummy*/, double /*frs2*/);
michael@0	186	!
michael@0	187	.inline vis_fmul8x16_dummy,16
michael@0	188	fmul8x16 %f1,%f4,%f0
michael@0	189	.end
michael@0	190	!
michael@0	191	! double vis_fmul8x16au(float /*frs1*/, float /*frs2*/);
michael@0	192	!
michael@0	193	.inline vis_fmul8x16au,8
michael@0	194	fmul8x16au %f1,%f3,%f0
michael@0	195	.end
michael@0	196	!
michael@0	197	! double vis_fmul8x16al(float /*frs1*/, float /*frs2*/);
michael@0	198	!
michael@0	199	.inline vis_fmul8x16al,8
michael@0	200	fmul8x16al %f1,%f3,%f0
michael@0	201	.end
michael@0	202	!
michael@0	203	! double vis_fmul8sux16(double /*frs1*/, double /*frs2*/);
michael@0	204	!
michael@0	205	.inline vis_fmul8sux16,16
michael@0	206	fmul8sux16 %f0,%f2,%f0
michael@0	207	.end
michael@0	208	!
michael@0	209	! double vis_fmul8ulx16(double /*frs1*/, double /*frs2*/);
michael@0	210	!
michael@0	211	.inline vis_fmul8ulx16,16
michael@0	212	fmul8ulx16 %f0,%f2,%f0
michael@0	213	.end
michael@0	214	!
michael@0	215	! double vis_fmuld8sux16(float /*frs1*/, float /*frs2*/);
michael@0	216	!
michael@0	217	.inline vis_fmuld8sux16,8
michael@0	218	fmuld8sux16 %f1,%f3,%f0
michael@0	219	.end
michael@0	220	!
michael@0	221	! double vis_fmuld8ulx16(float /*frs1*/, float /*frs2*/);
michael@0	222	!
michael@0	223	.inline vis_fmuld8ulx16,8
michael@0	224	fmuld8ulx16 %f1,%f3,%f0
michael@0	225	.end
michael@0	226	!
michael@0	227	! double vis_fpadd16(double /*frs1*/, double /*frs2*/);
michael@0	228	!
michael@0	229	.inline vis_fpadd16,16
michael@0	230	fpadd16 %f0,%f2,%f0
michael@0	231	.end
michael@0	232	!
michael@0	233	! float vis_fpadd16s(float /*frs1*/, float /*frs2*/);
michael@0	234	!
michael@0	235	.inline vis_fpadd16s,8
michael@0	236	fpadd16s %f1,%f3,%f0
michael@0	237	.end
michael@0	238	!
michael@0	239	! double vis_fpadd32(double /*frs1*/, double /*frs2*/);
michael@0	240	!
michael@0	241	.inline vis_fpadd32,16
michael@0	242	fpadd32 %f0,%f2,%f0
michael@0	243	.end
michael@0	244	!
michael@0	245	! float vis_fpadd32s(float /*frs1*/, float /*frs2*/);
michael@0	246	!
michael@0	247	.inline vis_fpadd32s,8
michael@0	248	fpadd32s %f1,%f3,%f0
michael@0	249	.end
michael@0	250	!
michael@0	251	! double vis_fpsub16(double /*frs1*/, double /*frs2*/);
michael@0	252	!
michael@0	253	.inline vis_fpsub16,16
michael@0	254	fpsub16 %f0,%f2,%f0
michael@0	255	.end
michael@0	256	!
michael@0	257	! float vis_fpsub16s(float /*frs1*/, float /*frs2*/);
michael@0	258	!
michael@0	259	.inline vis_fpsub16s,8
michael@0	260	fpsub16s %f1,%f3,%f0
michael@0	261	.end
michael@0	262	!
michael@0	263	! double vis_fpsub32(double /*frs1*/, double /*frs2*/);
michael@0	264	!
michael@0	265	.inline vis_fpsub32,16
michael@0	266	fpsub32 %f0,%f2,%f0
michael@0	267	.end
michael@0	268	!
michael@0	269	! float vis_fpsub32s(float /*frs1*/, float /*frs2*/);
michael@0	270	!
michael@0	271	.inline vis_fpsub32s,8
michael@0	272	fpsub32s %f1,%f3,%f0
michael@0	273	.end
michael@0	274
michael@0	275	!--------------------------------------------------------------------
michael@0	276	! Pixel packing
michael@0	277	!
michael@0	278	! float vis_fpack16(double /*frs2*/);
michael@0	279	!
michael@0	280	.inline vis_fpack16,8
michael@0	281	fpack16 %f0,%f0
michael@0	282	.end
michael@0	283	!
michael@0	284	! double vis_fpack16_pair(double /*frs2*/, double /*frs2*/);
michael@0	285	!
michael@0	286	.inline vis_fpack16_pair,16
michael@0	287	fpack16 %f0,%f0
michael@0	288	fpack16 %f2,%f1
michael@0	289	.end
michael@0	290	!
michael@0	291	! void vis_st2_fpack16(double, double, double *)
michael@0	292	!
michael@0	293	.inline vis_st2_fpack16,24
michael@0	294	fpack16 %f0,%f0
michael@0	295	fpack16 %f2,%f1
michael@0	296	st %f0,[%o2+0]
michael@0	297	st %f1,[%o2+4]
michael@0	298	.end
michael@0	299	!
michael@0	300	! void vis_std_fpack16(double, double, double *)
michael@0	301	!
michael@0	302	.inline vis_std_fpack16,24
michael@0	303	fpack16 %f0,%f0
michael@0	304	fpack16 %f2,%f1
michael@0	305	std %f0,[%o2]
michael@0	306	.end
michael@0	307	!
michael@0	308	! void vis_st2_fpackfix(double, double, double *)
michael@0	309	!
michael@0	310	.inline vis_st2_fpackfix,24
michael@0	311	fpackfix %f0,%f0
michael@0	312	fpackfix %f2,%f1
michael@0	313	st %f0,[%o2+0]
michael@0	314	st %f1,[%o2+4]
michael@0	315	.end
michael@0	316	!
michael@0	317	! double vis_fpack16_to_hi(double /*frs1*/, double /*frs2*/);
michael@0	318	!
michael@0	319	.inline vis_fpack16_to_hi,16
michael@0	320	fpack16 %f2,%f0
michael@0	321	.end
michael@0	322
michael@0	323	! double vis_fpack16_to_lo(double /*frs1*/, double /*frs2*/);
michael@0	324	!
michael@0	325	.inline vis_fpack16_to_lo,16
michael@0	326	fpack16 %f2,%f3
michael@0	327	fmovs %f3,%f1 /* without this, optimizer goes wrong */
michael@0	328	.end
michael@0	329
michael@0	330	!
michael@0	331	! double vis_fpack32(double /*frs1*/, double /*frs2*/);
michael@0	332	!
michael@0	333	.inline vis_fpack32,16
michael@0	334	fpack32 %f0,%f2,%f0
michael@0	335	.end
michael@0	336	!
michael@0	337	! float vis_fpackfix(double /*frs2*/);
michael@0	338	!
michael@0	339	.inline vis_fpackfix,8
michael@0	340	fpackfix %f0,%f0
michael@0	341	.end
michael@0	342	!
michael@0	343	! double vis_fpackfix_pair(double /*frs2*/, double /*frs2*/);
michael@0	344	!
michael@0	345	.inline vis_fpackfix_pair,16
michael@0	346	fpackfix %f0,%f0
michael@0	347	fpackfix %f2,%f1
michael@0	348	.end
michael@0	349
michael@0	350	!--------------------------------------------------------------------
michael@0	351	! Motion estimation
michael@0	352	!
michael@0	353	! double vis_pxldist64(double accum /*frd*/, double pxls1 /*frs1*/,
michael@0	354	! double pxls2 /*frs2*/);
michael@0	355	!
michael@0	356	.inline vis_pxldist64,24
michael@0	357	pdist %f2,%f4,%f0
michael@0	358	.end
michael@0	359
michael@0	360	!--------------------------------------------------------------------
michael@0	361	! Channel merging
michael@0	362	!
michael@0	363	! double vis_fpmerge(float /*frs1*/, float /*frs2*/);
michael@0	364	!
michael@0	365	.inline vis_fpmerge,8
michael@0	366	fpmerge %f1,%f3,%f0
michael@0	367	.end
michael@0	368
michael@0	369	!--------------------------------------------------------------------
michael@0	370	! Pixel expansion
michael@0	371	!
michael@0	372	! double vis_fexpand(float /*frs2*/);
michael@0	373	!
michael@0	374	.inline vis_fexpand,4
michael@0	375	fexpand %f1,%f0
michael@0	376	.end
michael@0	377
michael@0	378	! double vis_fexpand_hi(double /*frs2*/);
michael@0	379	!
michael@0	380	.inline vis_fexpand_hi,8
michael@0	381	fexpand %f0,%f0
michael@0	382	.end
michael@0	383
michael@0	384	! double vis_fexpand_lo(double /*frs2*/);
michael@0	385	!
michael@0	386	.inline vis_fexpand_lo,8
michael@0	387	fexpand %f1,%f0
michael@0	388	.end
michael@0	389
michael@0	390	!--------------------------------------------------------------------
michael@0	391	! Bitwise logical operations
michael@0	392	!
michael@0	393	! double vis_fnor(double /*frs1*/, double /*frs2*/);
michael@0	394	!
michael@0	395	.inline vis_fnor,16
michael@0	396	fnor %f0,%f2,%f0
michael@0	397	.end
michael@0	398	!
michael@0	399	! float vis_fnors(float /*frs1*/, float /*frs2*/);
michael@0	400	!
michael@0	401	.inline vis_fnors,8
michael@0	402	fnors %f1,%f3,%f0
michael@0	403	.end
michael@0	404	!
michael@0	405	! double vis_fandnot(double /*frs1*/, double /*frs2*/);
michael@0	406	!
michael@0	407	.inline vis_fandnot,16
michael@0	408	fandnot1 %f0,%f2,%f0
michael@0	409	.end
michael@0	410	!
michael@0	411	! float vis_fandnots(float /*frs1*/, float /*frs2*/);
michael@0	412	!
michael@0	413	.inline vis_fandnots,8
michael@0	414	fandnot1s %f1,%f3,%f0
michael@0	415	.end
michael@0	416	!
michael@0	417	! double vis_fnot(double /*frs1*/);
michael@0	418	!
michael@0	419	.inline vis_fnot,8
michael@0	420	fnot1 %f0,%f0
michael@0	421	.end
michael@0	422	!
michael@0	423	! float vis_fnots(float /*frs1*/);
michael@0	424	!
michael@0	425	.inline vis_fnots,4
michael@0	426	fnot1s %f1,%f0
michael@0	427	.end
michael@0	428	!
michael@0	429	! double vis_fxor(double /*frs1*/, double /*frs2*/);
michael@0	430	!
michael@0	431	.inline vis_fxor,16
michael@0	432	fxor %f0,%f2,%f0
michael@0	433	.end
michael@0	434	!
michael@0	435	! float vis_fxors(float /*frs1*/, float /*frs2*/);
michael@0	436	!
michael@0	437	.inline vis_fxors,8
michael@0	438	fxors %f1,%f3,%f0
michael@0	439	.end
michael@0	440	!
michael@0	441	! double vis_fnand(double /*frs1*/, double /*frs2*/);
michael@0	442	!
michael@0	443	.inline vis_fnand,16
michael@0	444	fnand %f0,%f2,%f0
michael@0	445	.end
michael@0	446	!
michael@0	447	! float vis_fnands(float /*frs1*/, float /*frs2*/);
michael@0	448	!
michael@0	449	.inline vis_fnands,8
michael@0	450	fnands %f1,%f3,%f0
michael@0	451	.end
michael@0	452	!
michael@0	453	! double vis_fand(double /*frs1*/, double /*frs2*/);
michael@0	454	!
michael@0	455	.inline vis_fand,16
michael@0	456	fand %f0,%f2,%f0
michael@0	457	.end
michael@0	458	!
michael@0	459	! float vis_fands(float /*frs1*/, float /*frs2*/);
michael@0	460	!
michael@0	461	.inline vis_fands,8
michael@0	462	fands %f1,%f3,%f0
michael@0	463	.end
michael@0	464	!
michael@0	465	! double vis_fxnor(double /*frs1*/, double /*frs2*/);
michael@0	466	!
michael@0	467	.inline vis_fxnor,16
michael@0	468	fxnor %f0,%f2,%f0
michael@0	469	.end
michael@0	470	!
michael@0	471	! float vis_fxnors(float /*frs1*/, float /*frs2*/);
michael@0	472	!
michael@0	473	.inline vis_fxnors,8
michael@0	474	fxnors %f1,%f3,%f0
michael@0	475	.end
michael@0	476	!
michael@0	477	! double vis_fsrc(double /*frs1*/);
michael@0	478	!
michael@0	479	.inline vis_fsrc,8
michael@0	480	fsrc1 %f0,%f0
michael@0	481	.end
michael@0	482	!
michael@0	483	! float vis_fsrcs(float /*frs1*/);
michael@0	484	!
michael@0	485	.inline vis_fsrcs,4
michael@0	486	fsrc1s %f1,%f0
michael@0	487	.end
michael@0	488	!
michael@0	489	! double vis_fornot(double /*frs1*/, double /*frs2*/);
michael@0	490	!
michael@0	491	.inline vis_fornot,16
michael@0	492	fornot1 %f0,%f2,%f0
michael@0	493	.end
michael@0	494	!
michael@0	495	! float vis_fornots(float /*frs1*/, float /*frs2*/);
michael@0	496	!
michael@0	497	.inline vis_fornots,8
michael@0	498	fornot1s %f1,%f3,%f0
michael@0	499	.end
michael@0	500	!
michael@0	501	! double vis_for(double /*frs1*/, double /*frs2*/);
michael@0	502	!
michael@0	503	.inline vis_for,16
michael@0	504	for %f0,%f2,%f0
michael@0	505	.end
michael@0	506	!
michael@0	507	! float vis_fors(float /*frs1*/, float /*frs2*/);
michael@0	508	!
michael@0	509	.inline vis_fors,8
michael@0	510	fors %f1,%f3,%f0
michael@0	511	.end
michael@0	512	!
michael@0	513	! double vis_fzero(/* void */)
michael@0	514	!
michael@0	515	.inline vis_fzero,0
michael@0	516	fzero %f0
michael@0	517	.end
michael@0	518	!
michael@0	519	! float vis_fzeros(/* void */)
michael@0	520	!
michael@0	521	.inline vis_fzeros,0
michael@0	522	fzeros %f0
michael@0	523	.end
michael@0	524	!
michael@0	525	! double vis_fone(/* void */)
michael@0	526	!
michael@0	527	.inline vis_fone,0
michael@0	528	fone %f0
michael@0	529	.end
michael@0	530	!
michael@0	531	! float vis_fones(/* void */)
michael@0	532	!
michael@0	533	.inline vis_fones,0
michael@0	534	fones %f0
michael@0	535	.end
michael@0	536
michael@0	537	!--------------------------------------------------------------------
michael@0	538	! Partial store instructions
michael@0	539	!
michael@0	540	! vis_stdfa_ASI_PST8P(double frd, void *rs1, int rmask)
michael@0	541	!
michael@0	542	.inline vis_stdfa_ASI_PST8P,20
michael@0	543	stda %f0,[%o1]%o2,0xc0 ! ASI_PST8_P
michael@0	544	.end
michael@0	545	!
michael@0	546	! vis_stdfa_ASI_PST8PL(double frd, void *rs1, int rmask)
michael@0	547	!
michael@0	548	.inline vis_stdfa_ASI_PST8PL,20
michael@0	549	stda %f0,[%o1]%o2,0xc8 ! ASI_PST8_PL
michael@0	550	.end
michael@0	551	!
michael@0	552	! vis_stdfa_ASI_PST8P_int_pair(void *rs1, void *rs2, void *rs3, int rmask);
michael@0	553	!
michael@0	554	.inline vis_stdfa_ASI_PST8P_int_pair,28
michael@0	555	ld [%o0],%f4
michael@0	556	ld [%o1],%f5
michael@0	557	stda %f4,[%o2]%o3,0xc0 ! ASI_PST8_P
michael@0	558	.end
michael@0	559	!
michael@0	560	! vis_stdfa_ASI_PST8S(double frd, void *rs1, int rmask)
michael@0	561	!
michael@0	562	.inline vis_stdfa_ASI_PST8S,20
michael@0	563	stda %f0,[%o1]%o2,0xc1 ! ASI_PST8_S
michael@0	564	.end
michael@0	565	!
michael@0	566	! vis_stdfa_ASI_PST16P(double frd, void *rs1, int rmask)
michael@0	567	!
michael@0	568	.inline vis_stdfa_ASI_PST16P,20
michael@0	569	stda %f0,[%o1]%o2,0xc2 ! ASI_PST16_P
michael@0	570	.end
michael@0	571	!
michael@0	572	! vis_stdfa_ASI_PST16S(double frd, void *rs1, int rmask)
michael@0	573	!
michael@0	574	.inline vis_stdfa_ASI_PST16S,20
michael@0	575	stda %f0,[%o1]%o2,0xc3 ! ASI_PST16_S
michael@0	576	.end
michael@0	577	!
michael@0	578	! vis_stdfa_ASI_PST32P(double frd, void *rs1, int rmask)
michael@0	579	!
michael@0	580	.inline vis_stdfa_ASI_PST32P,20
michael@0	581	stda %f0,[%o1]%o2,0xc4 ! ASI_PST32_P
michael@0	582	.end
michael@0	583	!
michael@0	584	! vis_stdfa_ASI_PST32S(double frd, void *rs1, int rmask)
michael@0	585	!
michael@0	586	.inline vis_stdfa_ASI_PST32S,20
michael@0	587	stda %f0,[%o1]%o2,0xc5 ! ASI_PST32_S
michael@0	588	.end
michael@0	589
michael@0	590	!--------------------------------------------------------------------
michael@0	591	! Short store instructions
michael@0	592	!
michael@0	593	! vis_stdfa_ASI_FL8P(double frd, void *rs1)
michael@0	594	!
michael@0	595	.inline vis_stdfa_ASI_FL8P,16
michael@0	596	stda %f0,[%o1]0xd0 ! ASI_FL8_P
michael@0	597	.end
michael@0	598	!
michael@0	599	! vis_stdfa_ASI_FL8P_index(double frd, void *rs1, long index)
michael@0	600	!
michael@0	601	.inline vis_stdfa_ASI_FL8P_index,24
michael@0	602	stda %f0,[%o1+%o2]0xd0 ! ASI_FL8_P
michael@0	603	.end
michael@0	604	!
michael@0	605	! vis_stdfa_ASI_FL8S(double frd, void *rs1)
michael@0	606	!
michael@0	607	.inline vis_stdfa_ASI_FL8S,16
michael@0	608	stda %f0,[%o1]0xd1 ! ASI_FL8_S
michael@0	609	.end
michael@0	610	!
michael@0	611	! vis_stdfa_ASI_FL16P(double frd, void *rs1)
michael@0	612	!
michael@0	613	.inline vis_stdfa_ASI_FL16P,16
michael@0	614	stda %f0,[%o1]0xd2 ! ASI_FL16_P
michael@0	615	.end
michael@0	616	!
michael@0	617	! vis_stdfa_ASI_FL16P_index(double frd, void *rs1, long index)
michael@0	618	!
michael@0	619	.inline vis_stdfa_ASI_FL16P_index,24
michael@0	620	stda %f0,[%o1+%o2]0xd2 ! ASI_FL16_P
michael@0	621	.end
michael@0	622	!
michael@0	623	! vis_stdfa_ASI_FL16S(double frd, void *rs1)
michael@0	624	!
michael@0	625	.inline vis_stdfa_ASI_FL16S,16
michael@0	626	stda %f0,[%o1]0xd3 ! ASI_FL16_S
michael@0	627	.end
michael@0	628	!
michael@0	629	! vis_stdfa_ASI_FL8PL(double frd, void *rs1)
michael@0	630	!
michael@0	631	.inline vis_stdfa_ASI_FL8PL,16
michael@0	632	stda %f0,[%o1]0xd8 ! ASI_FL8_PL
michael@0	633	.end
michael@0	634	!
michael@0	635	! vis_stdfa_ASI_FL8SL(double frd, void *rs1)
michael@0	636	!
michael@0	637	.inline vis_stdfa_ASI_FL8SL,16
michael@0	638	stda %f0,[%o1]0xd9 ! ASI_FL8_SL
michael@0	639	.end
michael@0	640	!
michael@0	641	! vis_stdfa_ASI_FL16PL(double frd, void *rs1)
michael@0	642	!
michael@0	643	.inline vis_stdfa_ASI_FL16PL,16
michael@0	644	stda %f0,[%o1]0xda ! ASI_FL16_PL
michael@0	645	.end
michael@0	646	!
michael@0	647	! vis_stdfa_ASI_FL16SL(double frd, void *rs1)
michael@0	648	!
michael@0	649	.inline vis_stdfa_ASI_FL16SL,16
michael@0	650	stda %f0,[%o1]0xdb ! ASI_FL16_SL
michael@0	651	.end
michael@0	652
michael@0	653	!--------------------------------------------------------------------
michael@0	654	! Short load instructions
michael@0	655	!
michael@0	656	! double vis_lddfa_ASI_FL8P(void *rs1)
michael@0	657	!
michael@0	658	.inline vis_lddfa_ASI_FL8P,8
michael@0	659	ldda [%o0]0xd0,%f4 ! ASI_FL8_P
michael@0	660	fmovd %f4,%f0 ! Compiler can clean this up
michael@0	661	.end
michael@0	662	!
michael@0	663	! double vis_lddfa_ASI_FL8P_index(void *rs1, long index)
michael@0	664	!
michael@0	665	.inline vis_lddfa_ASI_FL8P_index,16
michael@0	666	ldda [%o0+%o1]0xd0,%f4
michael@0	667	fmovd %f4,%f0
michael@0	668	.end
michael@0	669	!
michael@0	670	! double vis_lddfa_ASI_FL8P_hi(void *rs1, unsigned int index)
michael@0	671	!
michael@0	672	.inline vis_lddfa_ASI_FL8P_hi,12
michael@0	673	sra %o1,16,%o1
michael@0	674	ldda [%o0+%o1]0xd0,%f4
michael@0	675	fmovd %f4,%f0
michael@0	676	.end
michael@0	677	!
michael@0	678	! double vis_lddfa_ASI_FL8P_lo(void *rs1, unsigned int index)
michael@0	679	!
michael@0	680	.inline vis_lddfa_ASI_FL8P_lo,12
michael@0	681	sll %o1,16,%o1
michael@0	682	sra %o1,16,%o1
michael@0	683	ldda [%o0+%o1]0xd0,%f4
michael@0	684	fmovd %f4,%f0
michael@0	685	.end
michael@0	686	!
michael@0	687	! double vis_lddfa_ASI_FL8S(void *rs1)
michael@0	688	!
michael@0	689	.inline vis_lddfa_ASI_FL8S,8
michael@0	690	ldda [%o0]0xd1,%f4 ! ASI_FL8_S
michael@0	691	fmovd %f4,%f0
michael@0	692	.end
michael@0	693	!
michael@0	694	! double vis_lddfa_ASI_FL16P(void *rs1)
michael@0	695	!
michael@0	696	.inline vis_lddfa_ASI_FL16P,8
michael@0	697	ldda [%o0]0xd2,%f4 ! ASI_FL16_P
michael@0	698	fmovd %f4,%f0
michael@0	699	.end
michael@0	700	!
michael@0	701	! double vis_lddfa_ASI_FL16P_index(void *rs1, long index)
michael@0	702	!
michael@0	703	.inline vis_lddfa_ASI_FL16P_index,16
michael@0	704	ldda [%o0+%o1]0xd2,%f4 ! ASI_FL16_P
michael@0	705	fmovd %f4,%f0
michael@0	706	.end
michael@0	707	!
michael@0	708	! double vis_lddfa_ASI_FL16S(void *rs1)
michael@0	709	!
michael@0	710	.inline vis_lddfa_ASI_FL16S,8
michael@0	711	ldda [%o0]0xd3,%f4 ! ASI_FL16_S
michael@0	712	fmovd %f4,%f0
michael@0	713	.end
michael@0	714	!
michael@0	715	! double vis_lddfa_ASI_FL8PL(void *rs1)
michael@0	716	!
michael@0	717	.inline vis_lddfa_ASI_FL8PL,8
michael@0	718	ldda [%o0]0xd8,%f4 ! ASI_FL8_PL
michael@0	719	fmovd %f4,%f0
michael@0	720	.end
michael@0	721	!
michael@0	722	! double vis_lddfa_ASI_FL8PL_index(void *rs1, long index)
michael@0	723	!
michael@0	724	.inline vis_lddfa_ASI_FL8PL_index,16
michael@0	725	ldda [%o0+%o1]0xd8,%f4 ! ASI_FL8_PL
michael@0	726	fmovd %f4,%f0
michael@0	727	.end
michael@0	728	!
michael@0	729	! double vis_lddfa_ASI_FL8SL(void *rs1)
michael@0	730	!
michael@0	731	.inline vis_lddfa_ASI_FL8SL,8
michael@0	732	ldda [%o0]0xd9,%f4 ! ASI_FL8_SL
michael@0	733	fmovd %f4,%f0
michael@0	734	.end
michael@0	735	!
michael@0	736	! double vis_lddfa_ASI_FL16PL(void *rs1)
michael@0	737	!
michael@0	738	.inline vis_lddfa_ASI_FL16PL,8
michael@0	739	ldda [%o0]0xda,%f4 ! ASI_FL16_PL
michael@0	740	fmovd %f4,%f0
michael@0	741	.end
michael@0	742	!
michael@0	743	! double vis_lddfa_ASI_FL16PL_index(void *rs1, long index)
michael@0	744	!
michael@0	745	.inline vis_lddfa_ASI_FL16PL_index,16
michael@0	746	ldda [%o0+%o1]0xda,%f4 ! ASI_FL16_PL
michael@0	747	fmovd %f4,%f0
michael@0	748	.end
michael@0	749	!
michael@0	750	! double vis_lddfa_ASI_FL16SL(void *rs1)
michael@0	751	!
michael@0	752	.inline vis_lddfa_ASI_FL16SL,8
michael@0	753	ldda [%o0]0xdb,%f4 ! ASI_FL16_SL
michael@0	754	fmovd %f4,%f0
michael@0	755	.end
michael@0	756
michael@0	757	!--------------------------------------------------------------------
michael@0	758	! Graphics status register
michael@0	759	!
michael@0	760	! unsigned int vis_read_gsr(void)
michael@0	761	!
michael@0	762	.inline vis_read_gsr,0
michael@0	763	rd %gsr,%o0
michael@0	764	.end
michael@0	765	!
michael@0	766	! void vis_write_gsr(unsigned int /* GSR */)
michael@0	767	!
michael@0	768	.inline vis_write_gsr,4
michael@0	769	wr %g0,%o0,%gsr
michael@0	770	.end
michael@0	771
michael@0	772	!--------------------------------------------------------------------
michael@0	773	! Voxel texture mapping
michael@0	774	!
michael@0	775	! unsigned long vis_array8(unsigned long long /*rs1 */, int /*rs2*/)
michael@0	776	!
michael@0	777	.inline vis_array8,12
michael@0	778	array8 %o0,%o1,%o0
michael@0	779	.end
michael@0	780	!
michael@0	781	! unsigned long vis_array16(unsigned long long /*rs1*/, int /*rs2*/)
michael@0	782	!
michael@0	783	.inline vis_array16,12
michael@0	784	array16 %o0,%o1,%o0
michael@0	785	.end
michael@0	786	!
michael@0	787	! unsigned long vis_array32(unsigned long long /*rs1*/, int /*rs2*/)
michael@0	788	!
michael@0	789	.inline vis_array32,12
michael@0	790	array32 %o0,%o1,%o0
michael@0	791	.end
michael@0	792
michael@0	793	!--------------------------------------------------------------------
michael@0	794	! Register aliasing and type casts
michael@0	795	!
michael@0	796	! float vis_read_hi(double /* frs1 */);
michael@0	797	!
michael@0	798	.inline vis_read_hi,8
michael@0	799	fmovs %f0,%f0
michael@0	800	.end
michael@0	801	!
michael@0	802	! float vis_read_lo(double /* frs1 */);
michael@0	803	!
michael@0	804	.inline vis_read_lo,8
michael@0	805	fmovs %f1,%f0 ! %f0 = low word (frs1); return %f0;
michael@0	806	.end
michael@0	807	!
michael@0	808	! double vis_write_hi(double /* frs1 */, float /* frs2 */);
michael@0	809	!
michael@0	810	.inline vis_write_hi,12
michael@0	811	fmovs %f3,%f0 ! %f3 = float frs2; return %f0:f1;
michael@0	812	.end
michael@0	813	!
michael@0	814	! double vis_write_lo(double /* frs1 */, float /* frs2 */);
michael@0	815	!
michael@0	816	.inline vis_write_lo,12
michael@0	817	fmovs %f3,%f1 ! %f3 = float frs2; return %f0:f1;
michael@0	818	.end
michael@0	819	!
michael@0	820	! double vis_freg_pair(float /* frs1 */, float /* frs2 */);
michael@0	821	!
michael@0	822	.inline vis_freg_pair,8
michael@0	823	fmovs %f1,%f0 ! %f1 = float frs1; put in hi;
michael@0	824	fmovs %f3,%f1 ! %f3 = float frs2; put in lo; return %f0:f1;
michael@0	825	.end
michael@0	826	!
michael@0	827	! float vis_to_float(unsigned int /*value*/);
michael@0	828	!
michael@0	829	.inline vis_to_float,4
michael@0	830	st %o0,[%sp+2183]
michael@0	831	ld [%sp+2183],%f0
michael@0	832	.end
michael@0	833	!
michael@0	834	! double vis_to_double(unsigned int /*value1*/, unsigned int /*value2*/);
michael@0	835	!
michael@0	836	.inline vis_to_double,8
michael@0	837	st %o0,[%sp+2183]
michael@0	838	ld [%sp+2183],%f0
michael@0	839	st %o1,[%sp+2183]
michael@0	840	ld [%sp+2183],%f1
michael@0	841	.end
michael@0	842	!
michael@0	843	! double vis_to_double_dup(unsigned int /*value*/);
michael@0	844	!
michael@0	845	.inline vis_to_double_dup,4
michael@0	846	st %o0,[%sp+2183]
michael@0	847	ld [%sp+2183],%f1
michael@0	848	fmovs %f1,%f0 ! duplicate value
michael@0	849	.end
michael@0	850	!
michael@0	851	! double vis_ll_to_double(unsigned long long /*value*/);
michael@0	852	!
michael@0	853	.inline vis_ll_to_double,8
michael@0	854	stx %o0,[%sp+2183]
michael@0	855	ldd [%sp+2183],%f0
michael@0	856	.end
michael@0	857
michael@0	858	!--------------------------------------------------------------------
michael@0	859	! Address space identifier (ASI) register
michael@0	860	!
michael@0	861	! unsigned int vis_read_asi(void)
michael@0	862	!
michael@0	863	.inline vis_read_asi,0
michael@0	864	rd %asi,%o0
michael@0	865	.end
michael@0	866	!
michael@0	867	! void vis_write_asi(unsigned int /* ASI */)
michael@0	868	!
michael@0	869	.inline vis_write_asi,4
michael@0	870	wr %g0,%o0,%asi
michael@0	871	.end
michael@0	872
michael@0	873	!--------------------------------------------------------------------
michael@0	874	! Load/store from/into alternate space
michael@0	875	!
michael@0	876	! float vis_ldfa_ASI_REG(void *rs1)
michael@0	877	!
michael@0	878	.inline vis_ldfa_ASI_REG,8
michael@0	879	lda [%o0+0]%asi,%f4
michael@0	880	fmovs %f4,%f0 ! Compiler can clean this up
michael@0	881	.end
michael@0	882	!
michael@0	883	! float vis_ldfa_ASI_P(void *rs1)
michael@0	884	!
michael@0	885	.inline vis_ldfa_ASI_P,8
michael@0	886	lda [%o0]0x80,%f4 ! ASI_P
michael@0	887	fmovs %f4,%f0 ! Compiler can clean this up
michael@0	888	.end
michael@0	889	!
michael@0	890	! float vis_ldfa_ASI_PL(void *rs1)
michael@0	891	!
michael@0	892	.inline vis_ldfa_ASI_PL,8
michael@0	893	lda [%o0]0x88,%f4 ! ASI_PL
michael@0	894	fmovs %f4,%f0 ! Compiler can clean this up
michael@0	895	.end
michael@0	896	!
michael@0	897	! double vis_lddfa_ASI_REG(void *rs1)
michael@0	898	!
michael@0	899	.inline vis_lddfa_ASI_REG,8
michael@0	900	ldda [%o0+0]%asi,%f4
michael@0	901	fmovd %f4,%f0 ! Compiler can clean this up
michael@0	902	.end
michael@0	903	!
michael@0	904	! double vis_lddfa_ASI_P(void *rs1)
michael@0	905	!
michael@0	906	.inline vis_lddfa_ASI_P,8
michael@0	907	ldda [%o0]0x80,%f4 ! ASI_P
michael@0	908	fmovd %f4,%f0 ! Compiler can clean this up
michael@0	909	.end
michael@0	910	!
michael@0	911	! double vis_lddfa_ASI_PL(void *rs1)
michael@0	912	!
michael@0	913	.inline vis_lddfa_ASI_PL,8
michael@0	914	ldda [%o0]0x88,%f4 ! ASI_PL
michael@0	915	fmovd %f4,%f0 ! Compiler can clean this up
michael@0	916	.end
michael@0	917	!
michael@0	918	! vis_stfa_ASI_REG(float frs, void *rs1)
michael@0	919	!
michael@0	920	.inline vis_stfa_ASI_REG,12
michael@0	921	sta %f1,[%o1+0]%asi
michael@0	922	.end
michael@0	923	!
michael@0	924	! vis_stfa_ASI_P(float frs, void *rs1)
michael@0	925	!
michael@0	926	.inline vis_stfa_ASI_P,12
michael@0	927	sta %f1,[%o1]0x80 ! ASI_P
michael@0	928	.end
michael@0	929	!
michael@0	930	! vis_stfa_ASI_PL(float frs, void *rs1)
michael@0	931	!
michael@0	932	.inline vis_stfa_ASI_PL,12
michael@0	933	sta %f1,[%o1]0x88 ! ASI_PL
michael@0	934	.end
michael@0	935	!
michael@0	936	! vis_stdfa_ASI_REG(double frd, void *rs1)
michael@0	937	!
michael@0	938	.inline vis_stdfa_ASI_REG,16
michael@0	939	stda %f0,[%o1+0]%asi
michael@0	940	.end
michael@0	941	!
michael@0	942	! vis_stdfa_ASI_P(double frd, void *rs1)
michael@0	943	!
michael@0	944	.inline vis_stdfa_ASI_P,16
michael@0	945	stda %f0,[%o1]0x80 ! ASI_P
michael@0	946	.end
michael@0	947	!
michael@0	948	! vis_stdfa_ASI_PL(double frd, void *rs1)
michael@0	949	!
michael@0	950	.inline vis_stdfa_ASI_PL,16
michael@0	951	stda %f0,[%o1]0x88 ! ASI_PL
michael@0	952	.end
michael@0	953	!
michael@0	954	! unsigned short vis_lduha_ASI_REG(void *rs1)
michael@0	955	!
michael@0	956	.inline vis_lduha_ASI_REG,8
michael@0	957	lduha [%o0+0]%asi,%o0
michael@0	958	.end
michael@0	959	!
michael@0	960	! unsigned short vis_lduha_ASI_P(void *rs1)
michael@0	961	!
michael@0	962	.inline vis_lduha_ASI_P,8
michael@0	963	lduha [%o0]0x80,%o0 ! ASI_P
michael@0	964	.end
michael@0	965	!
michael@0	966	! unsigned short vis_lduha_ASI_PL(void *rs1)
michael@0	967	!
michael@0	968	.inline vis_lduha_ASI_PL,8
michael@0	969	lduha [%o0]0x88,%o0 ! ASI_PL
michael@0	970	.end
michael@0	971	!
michael@0	972	! unsigned short vis_lduha_ASI_P_index(void *rs1, long index)
michael@0	973	!
michael@0	974	.inline vis_lduha_ASI_P_index,16
michael@0	975	lduha [%o0+%o1]0x80,%o0 ! ASI_P
michael@0	976	.end
michael@0	977	!
michael@0	978	! unsigned short vis_lduha_ASI_PL_index(void *rs1, long index)
michael@0	979	!
michael@0	980	.inline vis_lduha_ASI_PL_index,16
michael@0	981	lduha [%o0+%o1]0x88,%o0 ! ASI_PL
michael@0	982	.end
michael@0	983
michael@0	984	!--------------------------------------------------------------------
michael@0	985	! Prefetch
michael@0	986	!
michael@0	987	! void vis_prefetch_read(void * /*address*/);
michael@0	988	!
michael@0	989	.inline vis_prefetch_read,8
michael@0	990	prefetch [%o0+0],0
michael@0	991	.end
michael@0	992	!
michael@0	993	! void vis_prefetch_write(void * /*address*/);
michael@0	994	!
michael@0	995	.inline vis_prefetch_write,8
michael@0	996	prefetch [%o0+0],2
michael@0	997	.end