Wed, 31 Dec 2014 06:09:35 +0100
Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.
michael@0 | 1 | // Copyright (c) 2012 The Chromium Authors. All rights reserved. |
michael@0 | 2 | // Use of this source code is governed by a BSD-style license that can be |
michael@0 | 3 | // found in the LICENSE file. |
michael@0 | 4 | |
michael@0 | 5 | #ifndef BASE_CPU_H_ |
michael@0 | 6 | #define BASE_CPU_H_ |
michael@0 | 7 | |
michael@0 | 8 | #include <string> |
michael@0 | 9 | |
michael@0 | 10 | #include "base/base_export.h" |
michael@0 | 11 | |
michael@0 | 12 | namespace base { |
michael@0 | 13 | |
michael@0 | 14 | // Query information about the processor. |
michael@0 | 15 | class BASE_EXPORT CPU { |
michael@0 | 16 | public: |
michael@0 | 17 | // Constructor |
michael@0 | 18 | CPU(); |
michael@0 | 19 | |
michael@0 | 20 | enum IntelMicroArchitecture { |
michael@0 | 21 | PENTIUM, |
michael@0 | 22 | SSE, |
michael@0 | 23 | SSE2, |
michael@0 | 24 | SSE3, |
michael@0 | 25 | SSSE3, |
michael@0 | 26 | SSE41, |
michael@0 | 27 | SSE42, |
michael@0 | 28 | AVX, |
michael@0 | 29 | MAX_INTEL_MICRO_ARCHITECTURE |
michael@0 | 30 | }; |
michael@0 | 31 | |
michael@0 | 32 | // Accessors for CPU information. |
michael@0 | 33 | const std::string& vendor_name() const { return cpu_vendor_; } |
michael@0 | 34 | int signature() const { return signature_; } |
michael@0 | 35 | int stepping() const { return stepping_; } |
michael@0 | 36 | int model() const { return model_; } |
michael@0 | 37 | int family() const { return family_; } |
michael@0 | 38 | int type() const { return type_; } |
michael@0 | 39 | int extended_model() const { return ext_model_; } |
michael@0 | 40 | int extended_family() const { return ext_family_; } |
michael@0 | 41 | bool has_mmx() const { return has_mmx_; } |
michael@0 | 42 | bool has_sse() const { return has_sse_; } |
michael@0 | 43 | bool has_sse2() const { return has_sse2_; } |
michael@0 | 44 | bool has_sse3() const { return has_sse3_; } |
michael@0 | 45 | bool has_ssse3() const { return has_ssse3_; } |
michael@0 | 46 | bool has_sse41() const { return has_sse41_; } |
michael@0 | 47 | bool has_sse42() const { return has_sse42_; } |
michael@0 | 48 | bool has_avx() const { return has_avx_; } |
michael@0 | 49 | bool has_non_stop_time_stamp_counter() const { |
michael@0 | 50 | return has_non_stop_time_stamp_counter_; |
michael@0 | 51 | } |
michael@0 | 52 | IntelMicroArchitecture GetIntelMicroArchitecture() const; |
michael@0 | 53 | const std::string& cpu_brand() const { return cpu_brand_; } |
michael@0 | 54 | |
michael@0 | 55 | private: |
michael@0 | 56 | // Query the processor for CPUID information. |
michael@0 | 57 | void Initialize(); |
michael@0 | 58 | |
michael@0 | 59 | int signature_; // raw form of type, family, model, and stepping |
michael@0 | 60 | int type_; // process type |
michael@0 | 61 | int family_; // family of the processor |
michael@0 | 62 | int model_; // model of processor |
michael@0 | 63 | int stepping_; // processor revision number |
michael@0 | 64 | int ext_model_; |
michael@0 | 65 | int ext_family_; |
michael@0 | 66 | bool has_mmx_; |
michael@0 | 67 | bool has_sse_; |
michael@0 | 68 | bool has_sse2_; |
michael@0 | 69 | bool has_sse3_; |
michael@0 | 70 | bool has_ssse3_; |
michael@0 | 71 | bool has_sse41_; |
michael@0 | 72 | bool has_sse42_; |
michael@0 | 73 | bool has_avx_; |
michael@0 | 74 | bool has_non_stop_time_stamp_counter_; |
michael@0 | 75 | std::string cpu_vendor_; |
michael@0 | 76 | std::string cpu_brand_; |
michael@0 | 77 | }; |
michael@0 | 78 | |
michael@0 | 79 | } // namespace base |
michael@0 | 80 | |
michael@0 | 81 | #endif // BASE_CPU_H_ |