toolkit/crashreporter/google-breakpad/src/common/arm_ex_reader.cc

Wed, 31 Dec 2014 06:09:35 +0100

author
Michael Schloh von Bennewitz <michael@schloh.com>
date
Wed, 31 Dec 2014 06:09:35 +0100
changeset 0
6474c204b198
permissions
-rw-r--r--

Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.

michael@0 1
michael@0 2 /* libunwind - a platform-independent unwind library
michael@0 3 Copyright 2011 Linaro Limited
michael@0 4
michael@0 5 This file is part of libunwind.
michael@0 6
michael@0 7 Permission is hereby granted, free of charge, to any person obtaining
michael@0 8 a copy of this software and associated documentation files (the
michael@0 9 "Software"), to deal in the Software without restriction, including
michael@0 10 without limitation the rights to use, copy, modify, merge, publish,
michael@0 11 distribute, sublicense, and/or sell copies of the Software, and to
michael@0 12 permit persons to whom the Software is furnished to do so, subject to
michael@0 13 the following conditions:
michael@0 14
michael@0 15 The above copyright notice and this permission notice shall be
michael@0 16 included in all copies or substantial portions of the Software.
michael@0 17
michael@0 18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
michael@0 19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
michael@0 20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
michael@0 21 NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
michael@0 22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
michael@0 23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
michael@0 24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
michael@0 25
michael@0 26 // Copyright (c) 2010 Google Inc.
michael@0 27 // All rights reserved.
michael@0 28 //
michael@0 29 // Redistribution and use in source and binary forms, with or without
michael@0 30 // modification, are permitted provided that the following conditions are
michael@0 31 // met:
michael@0 32 //
michael@0 33 // * Redistributions of source code must retain the above copyright
michael@0 34 // notice, this list of conditions and the following disclaimer.
michael@0 35 // * Redistributions in binary form must reproduce the above
michael@0 36 // copyright notice, this list of conditions and the following disclaimer
michael@0 37 // in the documentation and/or other materials provided with the
michael@0 38 // distribution.
michael@0 39 // * Neither the name of Google Inc. nor the names of its
michael@0 40 // contributors may be used to endorse or promote products derived from
michael@0 41 // this software without specific prior written permission.
michael@0 42 //
michael@0 43 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
michael@0 44 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
michael@0 45 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
michael@0 46 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
michael@0 47 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
michael@0 48 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
michael@0 49 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
michael@0 50 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
michael@0 51 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
michael@0 52 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
michael@0 53 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
michael@0 54
michael@0 55
michael@0 56 // Derived from libunwind, with extensive modifications.
michael@0 57
michael@0 58
michael@0 59 #include "common/arm_ex_reader.h"
michael@0 60 #include "common/logging.h"
michael@0 61
michael@0 62 #include <assert.h>
michael@0 63
michael@0 64 // This file, in conjunction with arm_ex_to_module.cc, translates
michael@0 65 // EXIDX unwind information into the same format that Breakpad uses
michael@0 66 // for CFI information. Hence Breakpad's CFI unwinding abilities
michael@0 67 // also become usable for EXIDX.
michael@0 68 //
michael@0 69 // See: "Exception Handling ABI for the ARM Architecture", ARM IHI 0038A
michael@0 70 // http://infocenter.arm.com/help/topic/com.arm.doc.ihi0038a/IHI0038A_ehabi.pdf
michael@0 71
michael@0 72 // EXIDX data is presented in two parts:
michael@0 73 //
michael@0 74 // * an index table. This contains two words per routine,
michael@0 75 // the first of which identifies the routine, and the second
michael@0 76 // of which is a reference to the unwind bytecode. If the
michael@0 77 // bytecode is very compact -- 3 bytes or less -- it can be
michael@0 78 // stored directly in the second word.
michael@0 79 //
michael@0 80 // * an area containing the unwind bytecodes.
michael@0 81
michael@0 82 // General flow is: ExceptionTableInfo::Start iterates over all
michael@0 83 // of the index table entries (pairs). For each entry, it:
michael@0 84 //
michael@0 85 // * calls ExceptionTableInfo::ExtabEntryExtract to copy the bytecode
michael@0 86 // out into an intermediate buffer.
michael@0 87
michael@0 88 // * uses ExceptionTableInfo::ExtabEntryDecode to parse the intermediate
michael@0 89 // buffer. Each bytecode instruction is bundled into a
michael@0 90 // arm_ex_to_module::extab_data structure, and handed to ..
michael@0 91 //
michael@0 92 // * .. ARMExToModule::ImproveStackFrame, which in turn hands it to
michael@0 93 // ARMExToModule::TranslateCmd, and that generates the pseudo-CFI
michael@0 94 // records that Breakpad stores.
michael@0 95
michael@0 96 #define ARM_EXIDX_CANT_UNWIND 0x00000001
michael@0 97 #define ARM_EXIDX_COMPACT 0x80000000
michael@0 98 #define ARM_EXTBL_OP_FINISH 0xb0
michael@0 99 #define ARM_EXIDX_TABLE_LIMIT (255*4)
michael@0 100
michael@0 101 namespace arm_ex_reader {
michael@0 102
michael@0 103 using arm_ex_to_module::ARM_EXIDX_CMD_FINISH;
michael@0 104 using arm_ex_to_module::ARM_EXIDX_CMD_SUB_FROM_VSP;
michael@0 105 using arm_ex_to_module::ARM_EXIDX_CMD_ADD_TO_VSP;
michael@0 106 using arm_ex_to_module::ARM_EXIDX_CMD_REG_POP;
michael@0 107 using arm_ex_to_module::ARM_EXIDX_CMD_REG_TO_SP;
michael@0 108 using arm_ex_to_module::ARM_EXIDX_CMD_VFP_POP;
michael@0 109 using arm_ex_to_module::ARM_EXIDX_CMD_WREG_POP;
michael@0 110 using arm_ex_to_module::ARM_EXIDX_CMD_WCGR_POP;
michael@0 111 using arm_ex_to_module::ARM_EXIDX_CMD_RESERVED;
michael@0 112 using arm_ex_to_module::ARM_EXIDX_CMD_REFUSED;
michael@0 113 using arm_ex_to_module::exidx_entry;
michael@0 114 using arm_ex_to_module::ARM_EXIDX_VFP_SHIFT_16;
michael@0 115 using arm_ex_to_module::ARM_EXIDX_VFP_FSTMD;
michael@0 116 using google_breakpad::MemoryRange;
michael@0 117
michael@0 118
michael@0 119 static void* Prel31ToAddr(const void* addr)
michael@0 120 {
michael@0 121 uint32_t offset32 = *reinterpret_cast<const uint32_t*>(addr);
michael@0 122 // sign extend offset32[30:0] to 64 bits -- copy bit 30 to positions
michael@0 123 // 63:31 inclusive.
michael@0 124 uint64_t offset64 = offset32;
michael@0 125 if (offset64 & (1ULL << 30))
michael@0 126 offset64 |= 0xFFFFFFFF80000000ULL;
michael@0 127 else
michael@0 128 offset64 &= 0x000000007FFFFFFFULL;
michael@0 129 return ((char*)addr) + (uintptr_t)offset64;
michael@0 130 }
michael@0 131
michael@0 132
michael@0 133 // Extract unwind bytecode for the function denoted by |entry| into |buf|,
michael@0 134 // and return the number of bytes of |buf| written, along with a code
michael@0 135 // indicating the outcome.
michael@0 136
michael@0 137 ExceptionTableInfo::ExExtractResult
michael@0 138 ExceptionTableInfo::ExtabEntryExtract(const struct exidx_entry* entry,
michael@0 139 uint8_t* buf, size_t buf_size,
michael@0 140 /*OUT*/size_t* buf_used)
michael@0 141 {
michael@0 142 MemoryRange mr_out(buf, buf_size);
michael@0 143
michael@0 144 *buf_used = 0;
michael@0 145
michael@0 146 # define PUT_BUF_U8(_byte) \
michael@0 147 do { if (!mr_out.Covers(*buf_used, 1)) return ExOutBufOverflow; \
michael@0 148 buf[(*buf_used)++] = (_byte); } while (0)
michael@0 149
michael@0 150 # define GET_EX_U32(_lval, _addr, _sec_mr) \
michael@0 151 do { if (!(_sec_mr).Covers(reinterpret_cast<const uint8_t*>(_addr) \
michael@0 152 - (_sec_mr).data(), 4)) \
michael@0 153 return ExInBufOverflow; \
michael@0 154 (_lval) = *(reinterpret_cast<const uint32_t*>(_addr)); } while (0)
michael@0 155
michael@0 156 # define GET_EXIDX_U32(_lval, _addr) \
michael@0 157 GET_EX_U32(_lval, _addr, mr_exidx_)
michael@0 158 # define GET_EXTAB_U32(_lval, _addr) \
michael@0 159 GET_EX_U32(_lval, _addr, mr_extab_)
michael@0 160
michael@0 161 uint32_t data;
michael@0 162 GET_EXIDX_U32(data, &entry->data);
michael@0 163
michael@0 164 // A function can be marked CANT_UNWIND if (eg) it is known to be
michael@0 165 // at the bottom of the stack.
michael@0 166 if (data == ARM_EXIDX_CANT_UNWIND)
michael@0 167 return ExCantUnwind;
michael@0 168
michael@0 169 uint32_t pers; // personality number
michael@0 170 uint32_t extra; // number of extra data words required
michael@0 171 uint32_t extra_allowed; // number of extra data words allowed
michael@0 172 uint32_t* extbl_data; // the handler entry, if not inlined
michael@0 173
michael@0 174 if (data & ARM_EXIDX_COMPACT) {
michael@0 175 // The handler table entry has been inlined into the index table entry.
michael@0 176 // In this case it can only be an ARM-defined compact model, since
michael@0 177 // bit 31 is 1. Only personalities 0, 1 and 2 are defined for the
michael@0 178 // ARM compact model, but 1 and 2 are "Long format" and may require
michael@0 179 // extra data words. Hence the allowable personalities here are:
michael@0 180 // personality 0, in which case 'extra' has no meaning
michael@0 181 // personality 1, with zero extra words
michael@0 182 // personality 2, with zero extra words
michael@0 183 extbl_data = NULL;
michael@0 184 pers = (data >> 24) & 0x0F;
michael@0 185 extra = (data >> 16) & 0xFF;
michael@0 186 extra_allowed = 0;
michael@0 187 }
michael@0 188 else {
michael@0 189 // The index table entry is a pointer to the handler entry. Note
michael@0 190 // that Prel31ToAddr will read the given address, but we already
michael@0 191 // range-checked above.
michael@0 192 extbl_data = reinterpret_cast<uint32_t*>(Prel31ToAddr(&entry->data));
michael@0 193 GET_EXTAB_U32(data, extbl_data);
michael@0 194 if (!(data & ARM_EXIDX_COMPACT)) {
michael@0 195 // This denotes a "generic model" handler. That will involve
michael@0 196 // executing arbitary machine code, which is something we
michael@0 197 // can't represent here; hence reject it.
michael@0 198 return ExCantRepresent;
michael@0 199 }
michael@0 200 // So we have a compact model representation. Again, 3 possible
michael@0 201 // personalities, but this time up to 255 allowable extra words.
michael@0 202 pers = (data >> 24) & 0x0F;
michael@0 203 extra = (data >> 16) & 0xFF;
michael@0 204 extra_allowed = 255;
michael@0 205 extbl_data++;
michael@0 206 }
michael@0 207
michael@0 208 // Now look at the the handler table entry. The first word is
michael@0 209 // |data| and subsequent words start at |*extbl_data|. The number
michael@0 210 // of extra words to use is |extra|, provided that the personality
michael@0 211 // allows extra words. Even if it does, none may be available --
michael@0 212 // extra_allowed is the maximum number of extra words allowed. */
michael@0 213 if (pers == 0) {
michael@0 214 // "Su16" in the documentation -- 3 unwinding insn bytes
michael@0 215 // |extra| has no meaning here; instead that byte is an unwind-info byte
michael@0 216 PUT_BUF_U8(data >> 16);
michael@0 217 PUT_BUF_U8(data >> 8);
michael@0 218 PUT_BUF_U8(data);
michael@0 219 }
michael@0 220 else if ((pers == 1 || pers == 2) && extra <= extra_allowed) {
michael@0 221 // "Lu16" or "Lu32" respectively -- 2 unwinding insn bytes,
michael@0 222 // and up to 255 extra words.
michael@0 223 PUT_BUF_U8(data >> 8);
michael@0 224 PUT_BUF_U8(data);
michael@0 225 for (uint32_t j = 0; j < extra; j++) {
michael@0 226 GET_EXTAB_U32(data, extbl_data);
michael@0 227 extbl_data++;
michael@0 228 PUT_BUF_U8(data >> 24);
michael@0 229 PUT_BUF_U8(data >> 16);
michael@0 230 PUT_BUF_U8(data >> 8);
michael@0 231 PUT_BUF_U8(data >> 0);
michael@0 232 }
michael@0 233 }
michael@0 234 else {
michael@0 235 // The entry is invalid.
michael@0 236 return ExInvalid;
michael@0 237 }
michael@0 238
michael@0 239 // Make sure the entry is terminated with "FINISH"
michael@0 240 if (*buf_used > 0 && buf[(*buf_used) - 1] != ARM_EXTBL_OP_FINISH)
michael@0 241 PUT_BUF_U8(ARM_EXTBL_OP_FINISH);
michael@0 242
michael@0 243 return ExSuccess;
michael@0 244
michael@0 245 # undef GET_EXTAB_U32
michael@0 246 # undef GET_EXIDX_U32
michael@0 247 # undef GET_U32
michael@0 248 # undef PUT_BUF_U8
michael@0 249 }
michael@0 250
michael@0 251
michael@0 252 // Take the unwind information extracted by ExtabEntryExtract
michael@0 253 // and parse it into frame-unwind instructions. These are as
michael@0 254 // specified in "Table 4, ARM-defined frame-unwinding instructions"
michael@0 255 // in the specification document detailed in comments at the top
michael@0 256 // of this file.
michael@0 257 //
michael@0 258 // This reads from |buf[0, +data_size)|. It checks for overruns of
michael@0 259 // the input buffer and returns a negative value if that happens, or
michael@0 260 // for any other failure cases. It returns zero in case of success.
michael@0 261 int ExceptionTableInfo::ExtabEntryDecode(const uint8_t* buf, size_t buf_size)
michael@0 262 {
michael@0 263 if (buf == NULL || buf_size == 0)
michael@0 264 return -1;
michael@0 265
michael@0 266 MemoryRange mr_in(buf, buf_size);
michael@0 267 const uint8_t* buf_initially = buf;
michael@0 268
michael@0 269 # define GET_BUF_U8(_lval) \
michael@0 270 do { if (!mr_in.Covers(buf - buf_initially, 1)) return -1; \
michael@0 271 (_lval) = *(buf++); } while (0)
michael@0 272
michael@0 273 const uint8_t* end = buf + buf_size;
michael@0 274
michael@0 275 while (buf < end) {
michael@0 276 struct arm_ex_to_module::extab_data edata;
michael@0 277 memset(&edata, 0, sizeof(edata));
michael@0 278
michael@0 279 uint8_t op;
michael@0 280 GET_BUF_U8(op);
michael@0 281 if ((op & 0xc0) == 0x00) {
michael@0 282 // vsp = vsp + (xxxxxx << 2) + 4
michael@0 283 edata.cmd = ARM_EXIDX_CMD_ADD_TO_VSP;
michael@0 284 edata.data = (((int)op & 0x3f) << 2) + 4;
michael@0 285 }
michael@0 286 else if ((op & 0xc0) == 0x40) {
michael@0 287 // vsp = vsp - (xxxxxx << 2) - 4
michael@0 288 edata.cmd = ARM_EXIDX_CMD_SUB_FROM_VSP;
michael@0 289 edata.data = (((int)op & 0x3f) << 2) + 4;
michael@0 290 }
michael@0 291 else if ((op & 0xf0) == 0x80) {
michael@0 292 uint8_t op2;
michael@0 293 GET_BUF_U8(op2);
michael@0 294 if (op == 0x80 && op2 == 0x00) {
michael@0 295 // Refuse to unwind
michael@0 296 edata.cmd = ARM_EXIDX_CMD_REFUSED;
michael@0 297 } else {
michael@0 298 // Pop up to 12 integer registers under masks {r15-r12},{r11-r4}
michael@0 299 edata.cmd = ARM_EXIDX_CMD_REG_POP;
michael@0 300 edata.data = ((op & 0xf) << 8) | op2;
michael@0 301 edata.data = edata.data << 4;
michael@0 302 }
michael@0 303 }
michael@0 304 else if ((op & 0xf0) == 0x90) {
michael@0 305 if (op == 0x9d || op == 0x9f) {
michael@0 306 // 9d: Reserved as prefix for ARM register to register moves
michael@0 307 // 9f: Reserved as perfix for Intel Wireless MMX reg to reg moves
michael@0 308 edata.cmd = ARM_EXIDX_CMD_RESERVED;
michael@0 309 } else {
michael@0 310 // Set vsp = r[nnnn]
michael@0 311 edata.cmd = ARM_EXIDX_CMD_REG_TO_SP;
michael@0 312 edata.data = op & 0x0f;
michael@0 313 }
michael@0 314 }
michael@0 315 else if ((op & 0xf0) == 0xa0) {
michael@0 316 // Pop r4 to r[4+nnn], or
michael@0 317 // Pop r4 to r[4+nnn] and r14 or
michael@0 318 unsigned end = (op & 0x07);
michael@0 319 edata.data = (1 << (end + 1)) - 1;
michael@0 320 edata.data = edata.data << 4;
michael@0 321 if (op & 0x08) edata.data |= 1 << 14;
michael@0 322 edata.cmd = ARM_EXIDX_CMD_REG_POP;
michael@0 323 }
michael@0 324 else if (op == ARM_EXTBL_OP_FINISH) {
michael@0 325 // Finish
michael@0 326 edata.cmd = ARM_EXIDX_CMD_FINISH;
michael@0 327 buf = end;
michael@0 328 }
michael@0 329 else if (op == 0xb1) {
michael@0 330 uint8_t op2;
michael@0 331 GET_BUF_U8(op2);
michael@0 332 if (op2 == 0 || (op2 & 0xf0)) {
michael@0 333 // Spare
michael@0 334 edata.cmd = ARM_EXIDX_CMD_RESERVED;
michael@0 335 } else {
michael@0 336 // Pop integer registers under mask {r3,r2,r1,r0}
michael@0 337 edata.cmd = ARM_EXIDX_CMD_REG_POP;
michael@0 338 edata.data = op2 & 0x0f;
michael@0 339 }
michael@0 340 }
michael@0 341 else if (op == 0xb2) {
michael@0 342 // vsp = vsp + 0x204 + (uleb128 << 2)
michael@0 343 uint64_t offset = 0;
michael@0 344 uint8_t byte, shift = 0;
michael@0 345 do {
michael@0 346 GET_BUF_U8(byte);
michael@0 347 offset |= (byte & 0x7f) << shift;
michael@0 348 shift += 7;
michael@0 349 } while ((byte & 0x80) && buf < end);
michael@0 350 edata.data = offset * 4 + 0x204;
michael@0 351 edata.cmd = ARM_EXIDX_CMD_ADD_TO_VSP;
michael@0 352 }
michael@0 353 else if (op == 0xb3 || op == 0xc8 || op == 0xc9) {
michael@0 354 // b3: Pop VFP regs D[ssss] to D[ssss+cccc], FSTMFDX-ishly
michael@0 355 // c8: Pop VFP regs D[16+ssss] to D[16+ssss+cccc], FSTMFDD-ishly
michael@0 356 // c9: Pop VFP regs D[ssss] to D[ssss+cccc], FSTMFDD-ishly
michael@0 357 edata.cmd = ARM_EXIDX_CMD_VFP_POP;
michael@0 358 GET_BUF_U8(edata.data);
michael@0 359 if (op == 0xc8) edata.data |= ARM_EXIDX_VFP_SHIFT_16;
michael@0 360 if (op != 0xb3) edata.data |= ARM_EXIDX_VFP_FSTMD;
michael@0 361 }
michael@0 362 else if ((op & 0xf8) == 0xb8 || (op & 0xf8) == 0xd0) {
michael@0 363 // b8: Pop VFP regs D[8] to D[8+nnn], FSTMFDX-ishly
michael@0 364 // d0: Pop VFP regs D[8] to D[8+nnn], FSTMFDD-ishly
michael@0 365 edata.cmd = ARM_EXIDX_CMD_VFP_POP;
michael@0 366 edata.data = 0x80 | (op & 0x07);
michael@0 367 if ((op & 0xf8) == 0xd0) edata.data |= ARM_EXIDX_VFP_FSTMD;
michael@0 368 }
michael@0 369 else if (op >= 0xc0 && op <= 0xc5) {
michael@0 370 // Intel Wireless MMX pop wR[10]-wr[10+nnn], nnn != 6,7
michael@0 371 edata.cmd = ARM_EXIDX_CMD_WREG_POP;
michael@0 372 edata.data = 0xa0 | (op & 0x07);
michael@0 373 }
michael@0 374 else if (op == 0xc6) {
michael@0 375 // Intel Wireless MMX pop wR[ssss] to wR[ssss+cccc]
michael@0 376 edata.cmd = ARM_EXIDX_CMD_WREG_POP;
michael@0 377 GET_BUF_U8(edata.data);
michael@0 378 }
michael@0 379 else if (op == 0xc7) {
michael@0 380 uint8_t op2;
michael@0 381 GET_BUF_U8(op2);
michael@0 382 if (op2 == 0 || (op2 & 0xf0)) {
michael@0 383 // Spare
michael@0 384 edata.cmd = ARM_EXIDX_CMD_RESERVED;
michael@0 385 } else {
michael@0 386 // Intel Wireless MMX pop wCGR registers under mask {wCGR3,2,1,0}
michael@0 387 edata.cmd = ARM_EXIDX_CMD_WCGR_POP;
michael@0 388 edata.data = op2 & 0x0f;
michael@0 389 }
michael@0 390 }
michael@0 391 else {
michael@0 392 // Spare
michael@0 393 edata.cmd = ARM_EXIDX_CMD_RESERVED;
michael@0 394 }
michael@0 395
michael@0 396 int ret = handler_->ImproveStackFrame(&edata);
michael@0 397 if (ret < 0) return ret;
michael@0 398 }
michael@0 399 return 0;
michael@0 400
michael@0 401 # undef GET_BUF_U8
michael@0 402 }
michael@0 403
michael@0 404 void ExceptionTableInfo::Start()
michael@0 405 {
michael@0 406 const struct exidx_entry* start
michael@0 407 = reinterpret_cast<const struct exidx_entry*>(mr_exidx_.data());
michael@0 408 const struct exidx_entry* end
michael@0 409 = reinterpret_cast<const struct exidx_entry*>(mr_exidx_.data()
michael@0 410 + mr_exidx_.length());
michael@0 411
michael@0 412 // Iterate over each of the EXIDX entries (pairs of 32-bit words).
michael@0 413 // These occupy the entire .exidx section.
michael@0 414 for (const struct exidx_entry* entry = start; entry < end; ++entry) {
michael@0 415
michael@0 416 // Figure out the code address range that this table entry is
michael@0 417 // associated with.
michael@0 418 uint32_t addr = (reinterpret_cast<char*>(Prel31ToAddr(&entry->addr))
michael@0 419 - mapping_addr_ + loading_addr_) & 0x7fffffff;
michael@0 420 uint32_t next_addr;
michael@0 421 if (entry < end - 1)
michael@0 422 next_addr = (reinterpret_cast<char*>(Prel31ToAddr(&((entry + 1)->addr)))
michael@0 423 - mapping_addr_ + loading_addr_) & 0x7fffffff;
michael@0 424 else {
michael@0 425 // This is the last EXIDX entry in the sequence, so we don't
michael@0 426 // have an address for the start of the next function, to limit
michael@0 427 // this one. Instead use the address of the last byte of the
michael@0 428 // text section associated with this .exidx section, that we
michael@0 429 // have been given. So as to avoid junking up the CFI unwind
michael@0 430 // tables with absurdly large address ranges in the case where
michael@0 431 // text_last_svma_ is wrong, only use the value if it is nonzero
michael@0 432 // and within one page of |addr|. Otherwise assume a length of 1.
michael@0 433 //
michael@0 434 // In some cases, gcc has been observed to finish the exidx
michael@0 435 // section with an entry of length 1 marked CANT_UNWIND,
michael@0 436 // presumably exactly for the purpose of giving a definite
michael@0 437 // length for the last real entry, without having to look at
michael@0 438 // text segment boundaries.
michael@0 439 bool plausible = false;
michael@0 440 next_addr = addr + 1;
michael@0 441 if (text_last_svma_ != 0) {
michael@0 442 uint32_t maybe_next_addr = text_last_svma_ + 1;
michael@0 443 if (maybe_next_addr > addr && maybe_next_addr - addr <= 4096) {
michael@0 444 next_addr = maybe_next_addr;
michael@0 445 plausible = true;
michael@0 446 }
michael@0 447 }
michael@0 448 if (!plausible)
michael@0 449 BPLOG(INFO) << "ExceptionTableInfo: implausible EXIDX last entry size "
michael@0 450 << (int32_t)(text_last_svma_ - addr)
michael@0 451 << "; using 1 instead.";
michael@0 452 }
michael@0 453
michael@0 454 // Extract the unwind info into |buf|. This might fail for
michael@0 455 // various reasons. It involves reading both the .exidx and
michael@0 456 // .extab sections. All accesses to those sections are
michael@0 457 // bounds-checked.
michael@0 458 uint8_t buf[ARM_EXIDX_TABLE_LIMIT];
michael@0 459 size_t buf_used = 0;
michael@0 460 ExExtractResult res = ExtabEntryExtract(entry, buf, sizeof(buf), &buf_used);
michael@0 461 if (res != ExSuccess) {
michael@0 462 // Couldn't extract the unwind info, for some reason. Move on.
michael@0 463 switch (res) {
michael@0 464 case ExInBufOverflow:
michael@0 465 BPLOG(INFO) << "ExtabEntryExtract: .exidx/.extab section overrun";
michael@0 466 break;
michael@0 467 case ExOutBufOverflow:
michael@0 468 BPLOG(INFO) << "ExtabEntryExtract: bytecode buffer overflow";
michael@0 469 break;
michael@0 470 case ExCantUnwind:
michael@0 471 BPLOG(INFO) << "ExtabEntryExtract: function is marked CANT_UNWIND";
michael@0 472 break;
michael@0 473 case ExCantRepresent:
michael@0 474 BPLOG(INFO) << "ExtabEntryExtract: bytecode can't be represented";
michael@0 475 break;
michael@0 476 case ExInvalid:
michael@0 477 BPLOG(INFO) << "ExtabEntryExtract: index table entry is invalid";
michael@0 478 break;
michael@0 479 default:
michael@0 480 BPLOG(INFO) << "ExtabEntryExtract: unknown error: " << (int)res;
michael@0 481 break;
michael@0 482 }
michael@0 483 continue;
michael@0 484 }
michael@0 485
michael@0 486 // Finally, work through the unwind instructions in |buf| and
michael@0 487 // create CFI entries that Breakpad can use. This can also fail.
michael@0 488 // First, add a new stack frame entry, into which ExtabEntryDecode
michael@0 489 // will write the CFI entries.
michael@0 490 handler_->AddStackFrame(addr, next_addr - addr);
michael@0 491 int ret = ExtabEntryDecode(buf, buf_used);
michael@0 492 if (ret < 0) {
michael@0 493 handler_->DeleteStackFrame();
michael@0 494 BPLOG(INFO) << "ExtabEntryDecode: failed with error code: " << ret;
michael@0 495 continue;
michael@0 496 }
michael@0 497 handler_->SubmitStackFrame();
michael@0 498
michael@0 499 } /* iterating over .exidx */
michael@0 500 }
michael@0 501
michael@0 502 } // arm_ex_reader

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