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1 /* -*- Mode: asm; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 4 -*- */ |
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2 /* This Source Code Form is subject to the terms of the Mozilla Public |
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3 * License, v. 2.0. If a copy of the MPL was not distributed with this |
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4 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ |
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5 |
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6 /* This code is for MIPS using the O32 ABI. */ |
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7 |
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8 #ifdef ANDROID |
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9 #include <asm/regdef.h> |
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10 #include <asm/asm.h> |
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11 #include <machine/asm.h> |
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12 #else |
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13 #include <sys/regdef.h> |
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14 #include <sys/asm.h> |
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15 #endif |
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16 |
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17 # NARGSAVE is the argument space in the callers frame, including extra |
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18 # 'shadowed' space for the argument registers. The minimum of 4 |
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19 # argument slots is sometimes predefined in the header files. |
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20 #ifndef NARGSAVE |
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21 #define NARGSAVE 4 |
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22 #endif |
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23 |
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24 #define LOCALSZ 2 /* gp, ra */ |
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25 #define FRAMESZ ((((NARGSAVE+LOCALSZ)*SZREG)+ALSZ)&ALMASK) |
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26 |
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27 #define RAOFF (FRAMESZ - (1*SZREG)) |
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28 #define GPOFF (FRAMESZ - (2*SZREG)) |
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29 |
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30 #define A0OFF (FRAMESZ + (0*SZREG)) |
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31 #define A1OFF (FRAMESZ + (1*SZREG)) |
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32 #define A2OFF (FRAMESZ + (2*SZREG)) |
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33 #define A3OFF (FRAMESZ + (3*SZREG)) |
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34 |
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35 .text |
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36 |
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37 #define STUB_ENTRY(x) \ |
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38 .if x < 10; \ |
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39 .globl _ZN14nsXPTCStubBase5Stub ##x ##Ev; \ |
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40 .type _ZN14nsXPTCStubBase5Stub ##x ##Ev,@function; \ |
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41 .aent _ZN14nsXPTCStubBase5Stub ##x ##Ev,0; \ |
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42 _ZN14nsXPTCStubBase5Stub ##x ##Ev:; \ |
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43 SETUP_GP; \ |
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44 li t0,x; \ |
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45 b sharedstub; \ |
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46 .elseif x < 100; \ |
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47 .globl _ZN14nsXPTCStubBase6Stub ##x ##Ev; \ |
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48 .type _ZN14nsXPTCStubBase6Stub ##x ##Ev,@function; \ |
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49 .aent _ZN14nsXPTCStubBase6Stub ##x ##Ev,0; \ |
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50 _ZN14nsXPTCStubBase6Stub ##x ##Ev:; \ |
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51 SETUP_GP; \ |
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52 li t0,x; \ |
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53 b sharedstub; \ |
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54 .elseif x < 1000; \ |
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55 .globl _ZN14nsXPTCStubBase7Stub ##x ##Ev; \ |
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56 .type _ZN14nsXPTCStubBase7Stub ##x ##Ev,@function; \ |
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57 .aent _ZN14nsXPTCStubBase7Stub ##x ##Ev,0; \ |
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58 _ZN14nsXPTCStubBase7Stub ##x ##Ev:; \ |
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59 SETUP_GP; \ |
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60 li t0,x; \ |
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61 b sharedstub; \ |
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62 .else; \ |
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63 .err; \ |
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64 .endif |
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65 |
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66 # SENTINEL_ENTRY is handled in the cpp file. |
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67 #define SENTINEL_ENTRY(x) |
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68 |
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69 # |
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70 # open a dummy frame for the function entries |
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71 # |
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72 .align 2 |
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73 .type dummy,@function |
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74 .ent dummy, 0 |
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75 .frame sp, FRAMESZ, ra |
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76 dummy: |
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77 SETUP_GP |
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78 |
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79 #include "xptcstubsdef.inc" |
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80 |
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81 sharedstub: |
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82 subu sp, FRAMESZ |
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83 |
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84 # specify the save register mask for gp, ra, a0-a3 |
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85 .mask 0x900000F0, RAOFF-FRAMESZ |
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86 |
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87 sw ra, RAOFF(sp) |
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88 SAVE_GP(GPOFF) |
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89 |
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90 # Micro-optimization: a0 is already loaded, and its slot gets |
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91 # ignored by PrepareAndDispatch, so no need to save it here. |
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92 # sw a0, A0OFF(sp) |
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93 sw a1, A1OFF(sp) |
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94 sw a2, A2OFF(sp) |
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95 sw a3, A3OFF(sp) |
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96 |
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97 la t9, PrepareAndDispatch |
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98 |
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99 # t0 is methodIndex |
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100 move a1, t0 |
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101 # have a2 point to the begin of the argument space on stack |
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102 addiu a2, sp, FRAMESZ |
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103 |
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104 # PrepareAndDispatch(that, methodIndex, args) |
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105 jalr t9 |
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106 |
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107 # Micro-optimization: Using jalr explicitly has the side-effect |
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108 # of not triggering .cprestore. This is ok because we have no |
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109 # gp reference below this point. It also allows better |
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110 # instruction sscheduling. |
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111 # lw gp, GPOFF(fp) |
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112 |
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113 lw ra, RAOFF(sp) |
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114 addiu sp, FRAMESZ |
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115 j ra |
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116 END(dummy) |