1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 1.2 +++ b/media/libopus/silk/arm/macros_armv4.h Wed Dec 31 06:09:35 2014 +0100 1.3 @@ -0,0 +1,103 @@ 1.4 +/*********************************************************************** 1.5 +Copyright (C) 2013 Xiph.Org Foundation and contributors. 1.6 +Redistribution and use in source and binary forms, with or without 1.7 +modification, are permitted provided that the following conditions 1.8 +are met: 1.9 +- Redistributions of source code must retain the above copyright notice, 1.10 +this list of conditions and the following disclaimer. 1.11 +- Redistributions in binary form must reproduce the above copyright 1.12 +notice, this list of conditions and the following disclaimer in the 1.13 +documentation and/or other materials provided with the distribution. 1.14 +- Neither the name of Internet Society, IETF or IETF Trust, nor the 1.15 +names of specific contributors, may be used to endorse or promote 1.16 +products derived from this software without specific prior written 1.17 +permission. 1.18 +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 1.19 +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1.20 +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1.21 +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 1.22 +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 1.23 +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 1.24 +SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 1.25 +INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 1.26 +CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 1.27 +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 1.28 +POSSIBILITY OF SUCH DAMAGE. 1.29 +***********************************************************************/ 1.30 + 1.31 +#ifndef SILK_MACROS_ARMv4_H 1.32 +#define SILK_MACROS_ARMv4_H 1.33 + 1.34 +/* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */ 1.35 +#undef silk_SMULWB 1.36 +static OPUS_INLINE opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b) 1.37 +{ 1.38 + unsigned rd_lo; 1.39 + int rd_hi; 1.40 + __asm__( 1.41 + "#silk_SMULWB\n\t" 1.42 + "smull %0, %1, %2, %3\n\t" 1.43 + : "=&r"(rd_lo), "=&r"(rd_hi) 1.44 + : "%r"(a), "r"(b<<16) 1.45 + ); 1.46 + return rd_hi; 1.47 +} 1.48 +#define silk_SMULWB(a, b) (silk_SMULWB_armv4(a, b)) 1.49 + 1.50 +/* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */ 1.51 +#undef silk_SMLAWB 1.52 +#define silk_SMLAWB(a, b, c) ((a) + silk_SMULWB(b, c)) 1.53 + 1.54 +/* (a32 * (b32 >> 16)) >> 16 */ 1.55 +#undef silk_SMULWT 1.56 +static OPUS_INLINE opus_int32 silk_SMULWT_armv4(opus_int32 a, opus_int32 b) 1.57 +{ 1.58 + unsigned rd_lo; 1.59 + int rd_hi; 1.60 + __asm__( 1.61 + "#silk_SMULWT\n\t" 1.62 + "smull %0, %1, %2, %3\n\t" 1.63 + : "=&r"(rd_lo), "=&r"(rd_hi) 1.64 + : "%r"(a), "r"(b&~0xFFFF) 1.65 + ); 1.66 + return rd_hi; 1.67 +} 1.68 +#define silk_SMULWT(a, b) (silk_SMULWT_armv4(a, b)) 1.69 + 1.70 +/* a32 + (b32 * (c32 >> 16)) >> 16 */ 1.71 +#undef silk_SMLAWT 1.72 +#define silk_SMLAWT(a, b, c) ((a) + silk_SMULWT(b, c)) 1.73 + 1.74 +/* (a32 * b32) >> 16 */ 1.75 +#undef silk_SMULWW 1.76 +static OPUS_INLINE opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b) 1.77 +{ 1.78 + unsigned rd_lo; 1.79 + int rd_hi; 1.80 + __asm__( 1.81 + "#silk_SMULWW\n\t" 1.82 + "smull %0, %1, %2, %3\n\t" 1.83 + : "=&r"(rd_lo), "=&r"(rd_hi) 1.84 + : "%r"(a), "r"(b) 1.85 + ); 1.86 + return (rd_hi<<16)+(rd_lo>>16); 1.87 +} 1.88 +#define silk_SMULWW(a, b) (silk_SMULWW_armv4(a, b)) 1.89 + 1.90 +#undef silk_SMLAWW 1.91 +static OPUS_INLINE opus_int32 silk_SMLAWW_armv4(opus_int32 a, opus_int32 b, 1.92 + opus_int32 c) 1.93 +{ 1.94 + unsigned rd_lo; 1.95 + int rd_hi; 1.96 + __asm__( 1.97 + "#silk_SMLAWW\n\t" 1.98 + "smull %0, %1, %2, %3\n\t" 1.99 + : "=&r"(rd_lo), "=&r"(rd_hi) 1.100 + : "%r"(b), "r"(c) 1.101 + ); 1.102 + return a+(rd_hi<<16)+(rd_lo>>16); 1.103 +} 1.104 +#define silk_SMLAWW(a, b, c) (silk_SMLAWW_armv4(a, b, c)) 1.105 + 1.106 +#endif /* SILK_MACROS_ARMv4_H */