1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/media/libopus/silk/arm/macros_armv5e.h Wed Dec 31 06:09:35 2014 +0100
1.3 @@ -0,0 +1,213 @@
1.4 +/***********************************************************************
1.5 +Copyright (c) 2006-2011, Skype Limited. All rights reserved.
1.6 +Copyright (c) 2013 Parrot
1.7 +Redistribution and use in source and binary forms, with or without
1.8 +modification, are permitted provided that the following conditions
1.9 +are met:
1.10 +- Redistributions of source code must retain the above copyright notice,
1.11 +this list of conditions and the following disclaimer.
1.12 +- Redistributions in binary form must reproduce the above copyright
1.13 +notice, this list of conditions and the following disclaimer in the
1.14 +documentation and/or other materials provided with the distribution.
1.15 +- Neither the name of Internet Society, IETF or IETF Trust, nor the
1.16 +names of specific contributors, may be used to endorse or promote
1.17 +products derived from this software without specific prior written
1.18 +permission.
1.19 +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1.20 +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1.21 +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1.22 +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
1.23 +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1.24 +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
1.25 +SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
1.26 +INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
1.27 +CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
1.28 +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1.29 +POSSIBILITY OF SUCH DAMAGE.
1.30 +***********************************************************************/
1.31 +
1.32 +#ifndef SILK_MACROS_ARMv5E_H
1.33 +#define SILK_MACROS_ARMv5E_H
1.34 +
1.35 +/* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */
1.36 +#undef silk_SMULWB
1.37 +static OPUS_INLINE opus_int32 silk_SMULWB_armv5e(opus_int32 a, opus_int16 b)
1.38 +{
1.39 + int res;
1.40 + __asm__(
1.41 + "#silk_SMULWB\n\t"
1.42 + "smulwb %0, %1, %2\n\t"
1.43 + : "=r"(res)
1.44 + : "r"(a), "r"(b)
1.45 + );
1.46 + return res;
1.47 +}
1.48 +#define silk_SMULWB(a, b) (silk_SMULWB_armv5e(a, b))
1.49 +
1.50 +/* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */
1.51 +#undef silk_SMLAWB
1.52 +static OPUS_INLINE opus_int32 silk_SMLAWB_armv5e(opus_int32 a, opus_int32 b,
1.53 + opus_int16 c)
1.54 +{
1.55 + int res;
1.56 + __asm__(
1.57 + "#silk_SMLAWB\n\t"
1.58 + "smlawb %0, %1, %2, %3\n\t"
1.59 + : "=r"(res)
1.60 + : "r"(b), "r"(c), "r"(a)
1.61 + );
1.62 + return res;
1.63 +}
1.64 +#define silk_SMLAWB(a, b, c) (silk_SMLAWB_armv5e(a, b, c))
1.65 +
1.66 +/* (a32 * (b32 >> 16)) >> 16 */
1.67 +#undef silk_SMULWT
1.68 +static OPUS_INLINE opus_int32 silk_SMULWT_armv5e(opus_int32 a, opus_int32 b)
1.69 +{
1.70 + int res;
1.71 + __asm__(
1.72 + "#silk_SMULWT\n\t"
1.73 + "smulwt %0, %1, %2\n\t"
1.74 + : "=r"(res)
1.75 + : "r"(a), "r"(b)
1.76 + );
1.77 + return res;
1.78 +}
1.79 +#define silk_SMULWT(a, b) (silk_SMULWT_armv5e(a, b))
1.80 +
1.81 +/* a32 + (b32 * (c32 >> 16)) >> 16 */
1.82 +#undef silk_SMLAWT
1.83 +static OPUS_INLINE opus_int32 silk_SMLAWT_armv5e(opus_int32 a, opus_int32 b,
1.84 + opus_int32 c)
1.85 +{
1.86 + int res;
1.87 + __asm__(
1.88 + "#silk_SMLAWT\n\t"
1.89 + "smlawt %0, %1, %2, %3\n\t"
1.90 + : "=r"(res)
1.91 + : "r"(b), "r"(c), "r"(a)
1.92 + );
1.93 + return res;
1.94 +}
1.95 +#define silk_SMLAWT(a, b, c) (silk_SMLAWT_armv5e(a, b, c))
1.96 +
1.97 +/* (opus_int32)((opus_int16)(a3))) * (opus_int32)((opus_int16)(b32)) output have to be 32bit int */
1.98 +#undef silk_SMULBB
1.99 +static OPUS_INLINE opus_int32 silk_SMULBB_armv5e(opus_int32 a, opus_int32 b)
1.100 +{
1.101 + int res;
1.102 + __asm__(
1.103 + "#silk_SMULBB\n\t"
1.104 + "smulbb %0, %1, %2\n\t"
1.105 + : "=r"(res)
1.106 + : "%r"(a), "r"(b)
1.107 + );
1.108 + return res;
1.109 +}
1.110 +#define silk_SMULBB(a, b) (silk_SMULBB_armv5e(a, b))
1.111 +
1.112 +/* a32 + (opus_int32)((opus_int16)(b32)) * (opus_int32)((opus_int16)(c32)) output have to be 32bit int */
1.113 +#undef silk_SMLABB
1.114 +static OPUS_INLINE opus_int32 silk_SMLABB_armv5e(opus_int32 a, opus_int32 b,
1.115 + opus_int32 c)
1.116 +{
1.117 + int res;
1.118 + __asm__(
1.119 + "#silk_SMLABB\n\t"
1.120 + "smlabb %0, %1, %2, %3\n\t"
1.121 + : "=r"(res)
1.122 + : "%r"(b), "r"(c), "r"(a)
1.123 + );
1.124 + return res;
1.125 +}
1.126 +#define silk_SMLABB(a, b, c) (silk_SMLABB_armv5e(a, b, c))
1.127 +
1.128 +/* (opus_int32)((opus_int16)(a32)) * (b32 >> 16) */
1.129 +#undef silk_SMULBT
1.130 +static OPUS_INLINE opus_int32 silk_SMULBT_armv5e(opus_int32 a, opus_int32 b)
1.131 +{
1.132 + int res;
1.133 + __asm__(
1.134 + "#silk_SMULBT\n\t"
1.135 + "smulbt %0, %1, %2\n\t"
1.136 + : "=r"(res)
1.137 + : "r"(a), "r"(b)
1.138 + );
1.139 + return res;
1.140 +}
1.141 +#define silk_SMULBT(a, b) (silk_SMULBT_armv5e(a, b))
1.142 +
1.143 +/* a32 + (opus_int32)((opus_int16)(b32)) * (c32 >> 16) */
1.144 +#undef silk_SMLABT
1.145 +static OPUS_INLINE opus_int32 silk_SMLABT_armv5e(opus_int32 a, opus_int32 b,
1.146 + opus_int32 c)
1.147 +{
1.148 + int res;
1.149 + __asm__(
1.150 + "#silk_SMLABT\n\t"
1.151 + "smlabt %0, %1, %2, %3\n\t"
1.152 + : "=r"(res)
1.153 + : "r"(b), "r"(c), "r"(a)
1.154 + );
1.155 + return res;
1.156 +}
1.157 +#define silk_SMLABT(a, b, c) (silk_SMLABT_armv5e(a, b, c))
1.158 +
1.159 +/* add/subtract with output saturated */
1.160 +#undef silk_ADD_SAT32
1.161 +static OPUS_INLINE opus_int32 silk_ADD_SAT32_armv5e(opus_int32 a, opus_int32 b)
1.162 +{
1.163 + int res;
1.164 + __asm__(
1.165 + "#silk_ADD_SAT32\n\t"
1.166 + "qadd %0, %1, %2\n\t"
1.167 + : "=r"(res)
1.168 + : "%r"(a), "r"(b)
1.169 + );
1.170 + return res;
1.171 +}
1.172 +#define silk_ADD_SAT32(a, b) (silk_ADD_SAT32_armv5e(a, b))
1.173 +
1.174 +#undef silk_SUB_SAT32
1.175 +static OPUS_INLINE opus_int32 silk_SUB_SAT32_armv5e(opus_int32 a, opus_int32 b)
1.176 +{
1.177 + int res;
1.178 + __asm__(
1.179 + "#silk_SUB_SAT32\n\t"
1.180 + "qsub %0, %1, %2\n\t"
1.181 + : "=r"(res)
1.182 + : "r"(a), "r"(b)
1.183 + );
1.184 + return res;
1.185 +}
1.186 +#define silk_SUB_SAT32(a, b) (silk_SUB_SAT32_armv5e(a, b))
1.187 +
1.188 +#undef silk_CLZ16
1.189 +static OPUS_INLINE opus_int32 silk_CLZ16_armv5(opus_int16 in16)
1.190 +{
1.191 + int res;
1.192 + __asm__(
1.193 + "#silk_CLZ16\n\t"
1.194 + "clz %0, %1;\n"
1.195 + : "=r"(res)
1.196 + : "r"(in16<<16|0x8000)
1.197 + );
1.198 + return res;
1.199 +}
1.200 +#define silk_CLZ16(in16) (silk_CLZ16_armv5(in16))
1.201 +
1.202 +#undef silk_CLZ32
1.203 +static OPUS_INLINE opus_int32 silk_CLZ32_armv5(opus_int32 in32)
1.204 +{
1.205 + int res;
1.206 + __asm__(
1.207 + "#silk_CLZ32\n\t"
1.208 + "clz %0, %1\n\t"
1.209 + : "=r"(res)
1.210 + : "r"(in32)
1.211 + );
1.212 + return res;
1.213 +}
1.214 +#define silk_CLZ32(in32) (silk_CLZ32_armv5(in32))
1.215 +
1.216 +#endif /* SILK_MACROS_ARMv5E_H */
