• file
• revisions
• annotate
• diff
• comparison
• raw

js/src/jit/mips/BaselineIC-mips.cpp@6474c204b198 (annotated)

js/src/jit/mips/BaselineIC-mips.cpp

Wed, 31 Dec 2014 06:09:35 +0100

author

Michael Schloh von Bennewitz <michael@schloh.com>

date

Wed, 31 Dec 2014 06:09:35 +0100

changeset 0

6474c204b198

permissions

-rw-r--r--

Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.

michael@0	1	/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
michael@0	2	* vim: set ts=8 sts=4 et sw=4 tw=99:
michael@0	3	* This Source Code Form is subject to the terms of the Mozilla Public
michael@0	4	* License, v. 2.0. If a copy of the MPL was not distributed with this
michael@0	5	* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
michael@0	6
michael@0	7	#include "jsiter.h"
michael@0	8
michael@0	9	#include "jit/BaselineCompiler.h"
michael@0	10	#include "jit/BaselineHelpers.h"
michael@0	11	#include "jit/BaselineIC.h"
michael@0	12	#include "jit/BaselineJIT.h"
michael@0	13	#include "jit/IonLinker.h"
michael@0	14
michael@0	15	#include "jsboolinlines.h"
michael@0	16
michael@0	17	using namespace js;
michael@0	18	using namespace js::jit;
michael@0	19
michael@0	20	namespace js {
michael@0	21	namespace jit {
michael@0	22
michael@0	23	// ICCompare_Int32
michael@0	24
michael@0	25	bool
michael@0	26	ICCompare_Int32::Compiler::generateStubCode(MacroAssembler &masm)
michael@0	27	{
michael@0	28	// Guard that R0 is an integer and R1 is an integer.
michael@0	29	Label failure;
michael@0	30	Label conditionTrue;
michael@0	31	masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
michael@0	32	masm.branchTestInt32(Assembler::NotEqual, R1, &failure);
michael@0	33
michael@0	34	// Compare payload regs of R0 and R1.
michael@0	35	Assembler::Condition cond = JSOpToCondition(op, /* signed = */true);
michael@0	36	masm.ma_cmp_set(R0.payloadReg(), R0.payloadReg(), R1.payloadReg(), cond);
michael@0	37
michael@0	38	masm.tagValue(JSVAL_TYPE_BOOLEAN, R0.payloadReg(), R0);
michael@0	39	EmitReturnFromIC(masm);
michael@0	40
michael@0	41	// Failure case - jump to next stub
michael@0	42	masm.bind(&failure);
michael@0	43	EmitStubGuardFailure(masm);
michael@0	44
michael@0	45	return true;
michael@0	46	}
michael@0	47
michael@0	48	bool
michael@0	49	ICCompare_Double::Compiler::generateStubCode(MacroAssembler &masm)
michael@0	50	{
michael@0	51	Label failure, isNaN;
michael@0	52	masm.ensureDouble(R0, FloatReg0, &failure);
michael@0	53	masm.ensureDouble(R1, FloatReg1, &failure);
michael@0	54
michael@0	55	Register dest = R0.scratchReg();
michael@0	56
michael@0	57	Assembler::DoubleCondition doubleCond = JSOpToDoubleCondition(op);
michael@0	58
michael@0	59	masm.ma_cmp_set_double(dest, FloatReg0, FloatReg1, doubleCond);
michael@0	60
michael@0	61	masm.tagValue(JSVAL_TYPE_BOOLEAN, dest, R0);
michael@0	62	EmitReturnFromIC(masm);
michael@0	63
michael@0	64	// Failure case - jump to next stub
michael@0	65	masm.bind(&failure);
michael@0	66	EmitStubGuardFailure(masm);
michael@0	67	return true;
michael@0	68	}
michael@0	69
michael@0	70	// ICBinaryArith_Int32
michael@0	71
michael@0	72	bool
michael@0	73	ICBinaryArith_Int32::Compiler::generateStubCode(MacroAssembler &masm)
michael@0	74	{
michael@0	75	// Guard that R0 is an integer and R1 is an integer.
michael@0	76	Label failure;
michael@0	77	masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
michael@0	78	masm.branchTestInt32(Assembler::NotEqual, R1, &failure);
michael@0	79
michael@0	80	// Add R0 and R1. Don't need to explicitly unbox, just use R2's payloadReg.
michael@0	81	Register scratchReg = R2.payloadReg();
michael@0	82
michael@0	83	// DIV and MOD need an extra non-volatile ValueOperand to hold R0.
michael@0	84	GeneralRegisterSet savedRegs = availableGeneralRegs(2);
michael@0	85	savedRegs = GeneralRegisterSet::Intersect(GeneralRegisterSet::NonVolatile(), savedRegs);
michael@0	86	ValueOperand savedValue = savedRegs.takeAnyValue();
michael@0	87
michael@0	88	Label goodMul, divTest1, divTest2;
michael@0	89	switch(op_) {
michael@0	90	case JSOP_ADD:
michael@0	91	// We know R0.typeReg() already contains the integer tag. No boxing
michael@0	92	// required.
michael@0	93	masm.ma_addTestOverflow(R0.payloadReg(), R0.payloadReg(), R1.payloadReg(), &failure);
michael@0	94	break;
michael@0	95	case JSOP_SUB:
michael@0	96	masm.ma_subTestOverflow(R0.payloadReg(), R0.payloadReg(), R1.payloadReg(), &failure);
michael@0	97	break;
michael@0	98	case JSOP_MUL: {
michael@0	99	masm.ma_mul_branch_overflow(scratchReg, R0.payloadReg(), R1.payloadReg(), &failure);
michael@0	100
michael@0	101	masm.ma_b(scratchReg, Imm32(0), &goodMul, Assembler::NotEqual, ShortJump);
michael@0	102
michael@0	103	// Result is -0 if operands have different signs.
michael@0	104	masm.as_xor(t8, R0.payloadReg(), R1.payloadReg());
michael@0	105	masm.ma_b(t8, Imm32(0), &failure, Assembler::LessThan, ShortJump);
michael@0	106
michael@0	107	masm.bind(&goodMul);
michael@0	108	masm.move32(scratchReg, R0.payloadReg());
michael@0	109	break;
michael@0	110	}
michael@0	111	case JSOP_DIV:
michael@0	112	case JSOP_MOD: {
michael@0	113	// Check for INT_MIN / -1, it results in a double.
michael@0	114	masm.ma_b(R0.payloadReg(), Imm32(INT_MIN), &divTest1, Assembler::NotEqual, ShortJump);
michael@0	115	masm.ma_b(R1.payloadReg(), Imm32(-1), &failure, Assembler::Equal, ShortJump);
michael@0	116	masm.bind(&divTest1);
michael@0	117
michael@0	118	// Check for division by zero
michael@0	119	masm.ma_b(R1.payloadReg(), Imm32(0), &failure, Assembler::Equal, ShortJump);
michael@0	120
michael@0	121	// Check for 0 / X with X < 0 (results in -0).
michael@0	122	masm.ma_b(R0.payloadReg(), Imm32(0), &divTest2, Assembler::NotEqual, ShortJump);
michael@0	123	masm.ma_b(R1.payloadReg(), Imm32(0), &failure, Assembler::LessThan, ShortJump);
michael@0	124	masm.bind(&divTest2);
michael@0	125
michael@0	126	masm.as_div(R0.payloadReg(), R1.payloadReg());
michael@0	127
michael@0	128	if (op_ == JSOP_DIV) {
michael@0	129	// Result is a double if the remainder != 0.
michael@0	130	masm.as_mfhi(scratchReg);
michael@0	131	masm.ma_b(scratchReg, Imm32(0), &failure, Assembler::NotEqual, ShortJump);
michael@0	132	masm.as_mflo(scratchReg);
michael@0	133	masm.tagValue(JSVAL_TYPE_INT32, scratchReg, R0);
michael@0	134	} else {
michael@0	135	Label done;
michael@0	136	// If X % Y == 0 and X < 0, the result is -0.
michael@0	137	masm.as_mfhi(scratchReg);
michael@0	138	masm.ma_b(scratchReg, Imm32(0), &done, Assembler::NotEqual, ShortJump);
michael@0	139	masm.ma_b(R0.payloadReg(), Imm32(0), &failure, Assembler::LessThan, ShortJump);
michael@0	140	masm.bind(&done);
michael@0	141	masm.tagValue(JSVAL_TYPE_INT32, scratchReg, R0);
michael@0	142	}
michael@0	143	break;
michael@0	144	}
michael@0	145	case JSOP_BITOR:
michael@0	146	masm.ma_or(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
michael@0	147	break;
michael@0	148	case JSOP_BITXOR:
michael@0	149	masm.ma_xor(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
michael@0	150	break;
michael@0	151	case JSOP_BITAND:
michael@0	152	masm.ma_and(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
michael@0	153	break;
michael@0	154	case JSOP_LSH:
michael@0	155	// MIPS will only use 5 lowest bits in R1 as shift offset.
michael@0	156	masm.ma_sll(R0.payloadReg(), R0.payloadReg(), R1.payloadReg());
michael@0	157	break;
michael@0	158	case JSOP_RSH:
michael@0	159	masm.ma_sra(R0.payloadReg(), R0.payloadReg(), R1.payloadReg());
michael@0	160	break;
michael@0	161	case JSOP_URSH:
michael@0	162	masm.ma_srl(scratchReg, R0.payloadReg(), R1.payloadReg());
michael@0	163	if (allowDouble_) {
michael@0	164	Label toUint;
michael@0	165	masm.ma_b(scratchReg, Imm32(0), &toUint, Assembler::LessThan, ShortJump);
michael@0	166
michael@0	167	// Move result and box for return.
michael@0	168	masm.move32(scratchReg, R0.payloadReg());
michael@0	169	EmitReturnFromIC(masm);
michael@0	170
michael@0	171	masm.bind(&toUint);
michael@0	172	masm.convertUInt32ToDouble(scratchReg, FloatReg1);
michael@0	173	masm.boxDouble(FloatReg1, R0);
michael@0	174	} else {
michael@0	175	masm.ma_b(scratchReg, Imm32(0), &failure, Assembler::LessThan, ShortJump);
michael@0	176	// Move result for return.
michael@0	177	masm.move32(scratchReg, R0.payloadReg());
michael@0	178	}
michael@0	179	break;
michael@0	180	default:
michael@0	181	MOZ_ASSUME_UNREACHABLE("Unhandled op for BinaryArith_Int32.");
michael@0	182	}
michael@0	183
michael@0	184	EmitReturnFromIC(masm);
michael@0	185
michael@0	186	// Failure case - jump to next stub
michael@0	187	masm.bind(&failure);
michael@0	188	EmitStubGuardFailure(masm);
michael@0	189
michael@0	190	return true;
michael@0	191	}
michael@0	192
michael@0	193	bool
michael@0	194	ICUnaryArith_Int32::Compiler::generateStubCode(MacroAssembler &masm)
michael@0	195	{
michael@0	196	Label failure;
michael@0	197	masm.branchTestInt32(Assembler::NotEqual, R0, &failure);
michael@0	198
michael@0	199	switch (op) {
michael@0	200	case JSOP_BITNOT:
michael@0	201	masm.not32(R0.payloadReg());
michael@0	202	break;
michael@0	203	case JSOP_NEG:
michael@0	204	// Guard against 0 and MIN_INT, both result in a double.
michael@0	205	masm.branchTest32(Assembler::Zero, R0.payloadReg(), Imm32(INT32_MAX), &failure);
michael@0	206
michael@0	207	masm.neg32(R0.payloadReg());
michael@0	208	break;
michael@0	209	default:
michael@0	210	MOZ_ASSUME_UNREACHABLE("Unexpected op");
michael@0	211	return false;
michael@0	212	}
michael@0	213
michael@0	214	EmitReturnFromIC(masm);
michael@0	215
michael@0	216	masm.bind(&failure);
michael@0	217	EmitStubGuardFailure(masm);
michael@0	218	return true;
michael@0	219	}
michael@0	220
michael@0	221
michael@0	222	} // namespace jit
michael@0	223	} // namespace js