media/libopus/celt/arm/fixed_armv5e.h@6474c204b198 (annotated)
media/libopus/celt/arm/fixed_armv5e.h
Wed, 31 Dec 2014 06:09:35 +0100
- author
- Michael Schloh von Bennewitz <michael@schloh.com>
- date
- Wed, 31 Dec 2014 06:09:35 +0100
- changeset 0
- 6474c204b198
- permissions
- -rw-r--r--
Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.
| michael@0 | 1 | /* Copyright (C) 2007-2009 Xiph.Org Foundation |
| michael@0 | 2 | Copyright (C) 2003-2008 Jean-Marc Valin |
| michael@0 | 3 | Copyright (C) 2007-2008 CSIRO |
| michael@0 | 4 | Copyright (C) 2013 Parrot */ |
| michael@0 | 5 | /* |
| michael@0 | 6 | Redistribution and use in source and binary forms, with or without |
| michael@0 | 7 | modification, are permitted provided that the following conditions |
| michael@0 | 8 | are met: |
| michael@0 | 9 | |
| michael@0 | 10 | - Redistributions of source code must retain the above copyright |
| michael@0 | 11 | notice, this list of conditions and the following disclaimer. |
| michael@0 | 12 | |
| michael@0 | 13 | - Redistributions in binary form must reproduce the above copyright |
| michael@0 | 14 | notice, this list of conditions and the following disclaimer in the |
| michael@0 | 15 | documentation and/or other materials provided with the distribution. |
| michael@0 | 16 | |
| michael@0 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| michael@0 | 18 | ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| michael@0 | 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| michael@0 | 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER |
| michael@0 | 21 | OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| michael@0 | 22 | EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| michael@0 | 23 | PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
| michael@0 | 24 | PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
| michael@0 | 25 | LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
| michael@0 | 26 | NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| michael@0 | 27 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| michael@0 | 28 | */ |
| michael@0 | 29 | |
| michael@0 | 30 | #ifndef FIXED_ARMv5E_H |
| michael@0 | 31 | #define FIXED_ARMv5E_H |
| michael@0 | 32 | |
| michael@0 | 33 | #include "fixed_armv4.h" |
| michael@0 | 34 | |
| michael@0 | 35 | /** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 bits */ |
| michael@0 | 36 | #undef MULT16_32_Q16 |
| michael@0 | 37 | static OPUS_INLINE opus_val32 MULT16_32_Q16_armv5e(opus_val16 a, opus_val32 b) |
| michael@0 | 38 | { |
| michael@0 | 39 | int res; |
| michael@0 | 40 | __asm__( |
| michael@0 | 41 | "#MULT16_32_Q16\n\t" |
| michael@0 | 42 | "smulwb %0, %1, %2\n\t" |
| michael@0 | 43 | : "=r"(res) |
| michael@0 | 44 | : "r"(b),"r"(a) |
| michael@0 | 45 | ); |
| michael@0 | 46 | return res; |
| michael@0 | 47 | } |
| michael@0 | 48 | #define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv5e(a, b)) |
| michael@0 | 49 | |
| michael@0 | 50 | |
| michael@0 | 51 | /** 16x32 multiplication, followed by a 15-bit shift right. Results fits in 32 bits */ |
| michael@0 | 52 | #undef MULT16_32_Q15 |
| michael@0 | 53 | static OPUS_INLINE opus_val32 MULT16_32_Q15_armv5e(opus_val16 a, opus_val32 b) |
| michael@0 | 54 | { |
| michael@0 | 55 | int res; |
| michael@0 | 56 | __asm__( |
| michael@0 | 57 | "#MULT16_32_Q15\n\t" |
| michael@0 | 58 | "smulwb %0, %1, %2\n\t" |
| michael@0 | 59 | : "=r"(res) |
| michael@0 | 60 | : "r"(b), "r"(a) |
| michael@0 | 61 | ); |
| michael@0 | 62 | return res<<1; |
| michael@0 | 63 | } |
| michael@0 | 64 | #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv5e(a, b)) |
| michael@0 | 65 | |
| michael@0 | 66 | |
| michael@0 | 67 | /** 16x32 multiply, followed by a 15-bit shift right and 32-bit add. |
| michael@0 | 68 | b must fit in 31 bits. |
| michael@0 | 69 | Result fits in 32 bits. */ |
| michael@0 | 70 | #undef MAC16_32_Q15 |
| michael@0 | 71 | static OPUS_INLINE opus_val32 MAC16_32_Q15_armv5e(opus_val32 c, opus_val16 a, |
| michael@0 | 72 | opus_val32 b) |
| michael@0 | 73 | { |
| michael@0 | 74 | int res; |
| michael@0 | 75 | __asm__( |
| michael@0 | 76 | "#MAC16_32_Q15\n\t" |
| michael@0 | 77 | "smlawb %0, %1, %2, %3;\n" |
| michael@0 | 78 | : "=r"(res) |
| michael@0 | 79 | : "r"(b<<1), "r"(a), "r"(c) |
| michael@0 | 80 | ); |
| michael@0 | 81 | return res; |
| michael@0 | 82 | } |
| michael@0 | 83 | #define MAC16_32_Q15(c, a, b) (MAC16_32_Q15_armv5e(c, a, b)) |
| michael@0 | 84 | |
| michael@0 | 85 | /** 16x16 multiply-add where the result fits in 32 bits */ |
| michael@0 | 86 | #undef MAC16_16 |
| michael@0 | 87 | static OPUS_INLINE opus_val32 MAC16_16_armv5e(opus_val32 c, opus_val16 a, |
| michael@0 | 88 | opus_val16 b) |
| michael@0 | 89 | { |
| michael@0 | 90 | int res; |
| michael@0 | 91 | __asm__( |
| michael@0 | 92 | "#MAC16_16\n\t" |
| michael@0 | 93 | "smlabb %0, %1, %2, %3;\n" |
| michael@0 | 94 | : "=r"(res) |
| michael@0 | 95 | : "r"(a), "r"(b), "r"(c) |
| michael@0 | 96 | ); |
| michael@0 | 97 | return res; |
| michael@0 | 98 | } |
| michael@0 | 99 | #define MAC16_16(c, a, b) (MAC16_16_armv5e(c, a, b)) |
| michael@0 | 100 | |
| michael@0 | 101 | /** 16x16 multiplication where the result fits in 32 bits */ |
| michael@0 | 102 | #undef MULT16_16 |
| michael@0 | 103 | static OPUS_INLINE opus_val32 MULT16_16_armv5e(opus_val16 a, opus_val16 b) |
| michael@0 | 104 | { |
| michael@0 | 105 | int res; |
| michael@0 | 106 | __asm__( |
| michael@0 | 107 | "#MULT16_16\n\t" |
| michael@0 | 108 | "smulbb %0, %1, %2;\n" |
| michael@0 | 109 | : "=r"(res) |
| michael@0 | 110 | : "r"(a), "r"(b) |
| michael@0 | 111 | ); |
| michael@0 | 112 | return res; |
| michael@0 | 113 | } |
| michael@0 | 114 | #define MULT16_16(a, b) (MULT16_16_armv5e(a, b)) |
| michael@0 | 115 | |
| michael@0 | 116 | #endif |
