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1 /* Copyright (C) 2013 Xiph.Org Foundation and contributors */ |
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2 /* |
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3 Redistribution and use in source and binary forms, with or without |
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4 modification, are permitted provided that the following conditions |
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5 are met: |
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6 |
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7 - Redistributions of source code must retain the above copyright |
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8 notice, this list of conditions and the following disclaimer. |
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9 |
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10 - Redistributions in binary form must reproduce the above copyright |
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11 notice, this list of conditions and the following disclaimer in the |
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12 documentation and/or other materials provided with the distribution. |
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13 |
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14 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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15 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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16 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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17 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER |
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18 OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
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19 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
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20 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
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21 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
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22 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
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23 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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24 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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25 */ |
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26 |
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27 #ifndef FIXED_ARMv4_H |
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28 #define FIXED_ARMv4_H |
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29 |
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30 /** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 bits */ |
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31 #undef MULT16_32_Q16 |
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32 static OPUS_INLINE opus_val32 MULT16_32_Q16_armv4(opus_val16 a, opus_val32 b) |
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33 { |
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34 unsigned rd_lo; |
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35 int rd_hi; |
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36 __asm__( |
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37 "#MULT16_32_Q16\n\t" |
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38 "smull %0, %1, %2, %3\n\t" |
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39 : "=&r"(rd_lo), "=&r"(rd_hi) |
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40 : "%r"(b),"r"(a<<16) |
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41 ); |
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42 return rd_hi; |
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43 } |
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44 #define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv4(a, b)) |
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45 |
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46 |
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47 /** 16x32 multiplication, followed by a 15-bit shift right. Results fits in 32 bits */ |
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48 #undef MULT16_32_Q15 |
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49 static OPUS_INLINE opus_val32 MULT16_32_Q15_armv4(opus_val16 a, opus_val32 b) |
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50 { |
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51 unsigned rd_lo; |
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52 int rd_hi; |
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53 __asm__( |
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54 "#MULT16_32_Q15\n\t" |
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55 "smull %0, %1, %2, %3\n\t" |
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56 : "=&r"(rd_lo), "=&r"(rd_hi) |
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57 : "%r"(b), "r"(a<<16) |
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58 ); |
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59 /*We intentionally don't OR in the high bit of rd_lo for speed.*/ |
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60 return rd_hi<<1; |
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61 } |
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62 #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv4(a, b)) |
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63 |
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64 |
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65 /** 16x32 multiply, followed by a 15-bit shift right and 32-bit add. |
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66 b must fit in 31 bits. |
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67 Result fits in 32 bits. */ |
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68 #undef MAC16_32_Q15 |
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69 #define MAC16_32_Q15(c, a, b) ADD32(c, MULT16_32_Q15(a, b)) |
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70 |
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71 |
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72 /** 32x32 multiplication, followed by a 31-bit shift right. Results fits in 32 bits */ |
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73 #undef MULT32_32_Q31 |
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74 #define MULT32_32_Q31(a,b) (opus_val32)((((opus_int64)(a)) * ((opus_int64)(b)))>>31) |
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75 |
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76 #endif |