1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/media/libopus/celt/arm/fixed_armv4.h Wed Dec 31 06:09:35 2014 +0100
1.3 @@ -0,0 +1,76 @@
1.4 +/* Copyright (C) 2013 Xiph.Org Foundation and contributors */
1.5 +/*
1.6 + Redistribution and use in source and binary forms, with or without
1.7 + modification, are permitted provided that the following conditions
1.8 + are met:
1.9 +
1.10 + - Redistributions of source code must retain the above copyright
1.11 + notice, this list of conditions and the following disclaimer.
1.12 +
1.13 + - Redistributions in binary form must reproduce the above copyright
1.14 + notice, this list of conditions and the following disclaimer in the
1.15 + documentation and/or other materials provided with the distribution.
1.16 +
1.17 + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1.18 + ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1.19 + LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
1.20 + A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
1.21 + OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
1.22 + EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
1.23 + PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
1.24 + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
1.25 + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
1.26 + NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
1.27 + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1.28 +*/
1.29 +
1.30 +#ifndef FIXED_ARMv4_H
1.31 +#define FIXED_ARMv4_H
1.32 +
1.33 +/** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 bits */
1.34 +#undef MULT16_32_Q16
1.35 +static OPUS_INLINE opus_val32 MULT16_32_Q16_armv4(opus_val16 a, opus_val32 b)
1.36 +{
1.37 + unsigned rd_lo;
1.38 + int rd_hi;
1.39 + __asm__(
1.40 + "#MULT16_32_Q16\n\t"
1.41 + "smull %0, %1, %2, %3\n\t"
1.42 + : "=&r"(rd_lo), "=&r"(rd_hi)
1.43 + : "%r"(b),"r"(a<<16)
1.44 + );
1.45 + return rd_hi;
1.46 +}
1.47 +#define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv4(a, b))
1.48 +
1.49 +
1.50 +/** 16x32 multiplication, followed by a 15-bit shift right. Results fits in 32 bits */
1.51 +#undef MULT16_32_Q15
1.52 +static OPUS_INLINE opus_val32 MULT16_32_Q15_armv4(opus_val16 a, opus_val32 b)
1.53 +{
1.54 + unsigned rd_lo;
1.55 + int rd_hi;
1.56 + __asm__(
1.57 + "#MULT16_32_Q15\n\t"
1.58 + "smull %0, %1, %2, %3\n\t"
1.59 + : "=&r"(rd_lo), "=&r"(rd_hi)
1.60 + : "%r"(b), "r"(a<<16)
1.61 + );
1.62 + /*We intentionally don't OR in the high bit of rd_lo for speed.*/
1.63 + return rd_hi<<1;
1.64 +}
1.65 +#define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv4(a, b))
1.66 +
1.67 +
1.68 +/** 16x32 multiply, followed by a 15-bit shift right and 32-bit add.
1.69 + b must fit in 31 bits.
1.70 + Result fits in 32 bits. */
1.71 +#undef MAC16_32_Q15
1.72 +#define MAC16_32_Q15(c, a, b) ADD32(c, MULT16_32_Q15(a, b))
1.73 +
1.74 +
1.75 +/** 32x32 multiplication, followed by a 31-bit shift right. Results fits in 32 bits */
1.76 +#undef MULT32_32_Q31
1.77 +#define MULT32_32_Q31(a,b) (opus_val32)((((opus_int64)(a)) * ((opus_int64)(b)))>>31)
1.78 +
1.79 +#endif
