media/libopus/celt/arm/fixed_armv4.h@6474c204b198 (annotated)
media/libopus/celt/arm/fixed_armv4.h
Wed, 31 Dec 2014 06:09:35 +0100
- author
- Michael Schloh von Bennewitz <michael@schloh.com>
- date
- Wed, 31 Dec 2014 06:09:35 +0100
- changeset 0
- 6474c204b198
- permissions
- -rw-r--r--
Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.
| michael@0 | 1 | /* Copyright (C) 2013 Xiph.Org Foundation and contributors */ |
| michael@0 | 2 | /* |
| michael@0 | 3 | Redistribution and use in source and binary forms, with or without |
| michael@0 | 4 | modification, are permitted provided that the following conditions |
| michael@0 | 5 | are met: |
| michael@0 | 6 | |
| michael@0 | 7 | - Redistributions of source code must retain the above copyright |
| michael@0 | 8 | notice, this list of conditions and the following disclaimer. |
| michael@0 | 9 | |
| michael@0 | 10 | - Redistributions in binary form must reproduce the above copyright |
| michael@0 | 11 | notice, this list of conditions and the following disclaimer in the |
| michael@0 | 12 | documentation and/or other materials provided with the distribution. |
| michael@0 | 13 | |
| michael@0 | 14 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| michael@0 | 15 | ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| michael@0 | 16 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| michael@0 | 17 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER |
| michael@0 | 18 | OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| michael@0 | 19 | EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| michael@0 | 20 | PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
| michael@0 | 21 | PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
| michael@0 | 22 | LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
| michael@0 | 23 | NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| michael@0 | 24 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| michael@0 | 25 | */ |
| michael@0 | 26 | |
| michael@0 | 27 | #ifndef FIXED_ARMv4_H |
| michael@0 | 28 | #define FIXED_ARMv4_H |
| michael@0 | 29 | |
| michael@0 | 30 | /** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 bits */ |
| michael@0 | 31 | #undef MULT16_32_Q16 |
| michael@0 | 32 | static OPUS_INLINE opus_val32 MULT16_32_Q16_armv4(opus_val16 a, opus_val32 b) |
| michael@0 | 33 | { |
| michael@0 | 34 | unsigned rd_lo; |
| michael@0 | 35 | int rd_hi; |
| michael@0 | 36 | __asm__( |
| michael@0 | 37 | "#MULT16_32_Q16\n\t" |
| michael@0 | 38 | "smull %0, %1, %2, %3\n\t" |
| michael@0 | 39 | : "=&r"(rd_lo), "=&r"(rd_hi) |
| michael@0 | 40 | : "%r"(b),"r"(a<<16) |
| michael@0 | 41 | ); |
| michael@0 | 42 | return rd_hi; |
| michael@0 | 43 | } |
| michael@0 | 44 | #define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv4(a, b)) |
| michael@0 | 45 | |
| michael@0 | 46 | |
| michael@0 | 47 | /** 16x32 multiplication, followed by a 15-bit shift right. Results fits in 32 bits */ |
| michael@0 | 48 | #undef MULT16_32_Q15 |
| michael@0 | 49 | static OPUS_INLINE opus_val32 MULT16_32_Q15_armv4(opus_val16 a, opus_val32 b) |
| michael@0 | 50 | { |
| michael@0 | 51 | unsigned rd_lo; |
| michael@0 | 52 | int rd_hi; |
| michael@0 | 53 | __asm__( |
| michael@0 | 54 | "#MULT16_32_Q15\n\t" |
| michael@0 | 55 | "smull %0, %1, %2, %3\n\t" |
| michael@0 | 56 | : "=&r"(rd_lo), "=&r"(rd_hi) |
| michael@0 | 57 | : "%r"(b), "r"(a<<16) |
| michael@0 | 58 | ); |
| michael@0 | 59 | /*We intentionally don't OR in the high bit of rd_lo for speed.*/ |
| michael@0 | 60 | return rd_hi<<1; |
| michael@0 | 61 | } |
| michael@0 | 62 | #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv4(a, b)) |
| michael@0 | 63 | |
| michael@0 | 64 | |
| michael@0 | 65 | /** 16x32 multiply, followed by a 15-bit shift right and 32-bit add. |
| michael@0 | 66 | b must fit in 31 bits. |
| michael@0 | 67 | Result fits in 32 bits. */ |
| michael@0 | 68 | #undef MAC16_32_Q15 |
| michael@0 | 69 | #define MAC16_32_Q15(c, a, b) ADD32(c, MULT16_32_Q15(a, b)) |
| michael@0 | 70 | |
| michael@0 | 71 | |
| michael@0 | 72 | /** 32x32 multiplication, followed by a 31-bit shift right. Results fits in 32 bits */ |
| michael@0 | 73 | #undef MULT32_32_Q31 |
| michael@0 | 74 | #define MULT32_32_Q31(a,b) (opus_val32)((((opus_int64)(a)) * ((opus_int64)(b)))>>31) |
| michael@0 | 75 | |
| michael@0 | 76 | #endif |
