Wed, 31 Dec 2014 06:09:35 +0100
Cloned upstream origin tor-browser at tor-browser-31.3.0esr-4.5-1-build1
revision ID fc1c9ff7c1b2defdbc039f12214767608f46423f for hacking purpose.
michael@0 | 1 | // Copyright (c) 2012 The Chromium Authors. All rights reserved. |
michael@0 | 2 | // Use of this source code is governed by a BSD-style license that can be |
michael@0 | 3 | // found in the LICENSE file. |
michael@0 | 4 | |
michael@0 | 5 | // Definition of MiniDisassembler. |
michael@0 | 6 | |
michael@0 | 7 | #ifndef SANDBOX_SRC_SIDESTEP_MINI_DISASSEMBLER_H__ |
michael@0 | 8 | #define SANDBOX_SRC_SIDESTEP_MINI_DISASSEMBLER_H__ |
michael@0 | 9 | |
michael@0 | 10 | #include "sandbox/win/src/sidestep/mini_disassembler_types.h" |
michael@0 | 11 | |
michael@0 | 12 | namespace sidestep { |
michael@0 | 13 | |
michael@0 | 14 | // This small disassembler is very limited |
michael@0 | 15 | // in its functionality, and in fact does only the bare minimum required by the |
michael@0 | 16 | // preamble patching utility. It may be useful for other purposes, however. |
michael@0 | 17 | // |
michael@0 | 18 | // The limitations include at least the following: |
michael@0 | 19 | // -# No support for coprocessor opcodes, MMX, etc. |
michael@0 | 20 | // -# No machine-readable identification of opcodes or decoding of |
michael@0 | 21 | // assembly parameters. The name of the opcode (as a string) is given, |
michael@0 | 22 | // however, to aid debugging. |
michael@0 | 23 | // |
michael@0 | 24 | // You may ask what this little disassembler actually does, then? The answer is |
michael@0 | 25 | // that it does the following, which is exactly what the patching utility needs: |
michael@0 | 26 | // -# Indicates if opcode is a jump (any kind) or a return (any kind) |
michael@0 | 27 | // because this is important for the patching utility to determine if |
michael@0 | 28 | // a function is too short or there are jumps too early in it for it |
michael@0 | 29 | // to be preamble patched. |
michael@0 | 30 | // -# The opcode length is always calculated, so that the patching utility |
michael@0 | 31 | // can figure out where the next instruction starts, and whether it |
michael@0 | 32 | // already has enough instructions to replace with the absolute jump |
michael@0 | 33 | // to the patching code. |
michael@0 | 34 | // |
michael@0 | 35 | // The usage is quite simple; just create a MiniDisassembler and use its |
michael@0 | 36 | // Disassemble() method. |
michael@0 | 37 | // |
michael@0 | 38 | // If you would like to extend this disassembler, please refer to the |
michael@0 | 39 | // IA-32 Intel Architecture Software Developer's Manual Volume 2: |
michael@0 | 40 | // Instruction Set Reference for information about operand decoding |
michael@0 | 41 | // etc. |
michael@0 | 42 | class MiniDisassembler { |
michael@0 | 43 | public: |
michael@0 | 44 | |
michael@0 | 45 | // Creates a new instance and sets defaults. |
michael@0 | 46 | // |
michael@0 | 47 | // operand_default_32_bits: If true, the default operand size is |
michael@0 | 48 | // set to 32 bits, which is the default under Win32. Otherwise it is 16 bits. |
michael@0 | 49 | // address_default_32_bits: If true, the default address size is |
michael@0 | 50 | // set to 32 bits, which is the default under Win32. Otherwise it is 16 bits. |
michael@0 | 51 | MiniDisassembler(bool operand_default_32_bits, |
michael@0 | 52 | bool address_default_32_bits); |
michael@0 | 53 | |
michael@0 | 54 | // Equivalent to MiniDisassembler(true, true); |
michael@0 | 55 | MiniDisassembler(); |
michael@0 | 56 | |
michael@0 | 57 | // Attempts to disassemble a single instruction starting from the |
michael@0 | 58 | // address in memory it is pointed to. |
michael@0 | 59 | // |
michael@0 | 60 | // start: Address where disassembly should start. |
michael@0 | 61 | // instruction_bytes: Variable that will be incremented by |
michael@0 | 62 | // the length in bytes of the instruction. |
michael@0 | 63 | // Returns enItJump, enItReturn or enItGeneric on success. enItUnknown |
michael@0 | 64 | // if unable to disassemble, enItUnused if this seems to be an unused |
michael@0 | 65 | // opcode. In the last two (error) cases, cbInstruction will be set |
michael@0 | 66 | // to 0xffffffff. |
michael@0 | 67 | // |
michael@0 | 68 | // Postcondition: This instance of the disassembler is ready to be used again, |
michael@0 | 69 | // with unchanged defaults from creation time. |
michael@0 | 70 | InstructionType Disassemble(unsigned char* start, |
michael@0 | 71 | unsigned int* instruction_bytes); |
michael@0 | 72 | |
michael@0 | 73 | private: |
michael@0 | 74 | |
michael@0 | 75 | // Makes the disassembler ready for reuse. |
michael@0 | 76 | void Initialize(); |
michael@0 | 77 | |
michael@0 | 78 | // Sets the flags for address and operand sizes. |
michael@0 | 79 | // Returns Number of prefix bytes. |
michael@0 | 80 | InstructionType ProcessPrefixes(unsigned char* start, unsigned int* size); |
michael@0 | 81 | |
michael@0 | 82 | // Sets the flag for whether we have ModR/M, and increments |
michael@0 | 83 | // operand_bytes_ if any are specifies by the opcode directly. |
michael@0 | 84 | // Returns Number of opcode bytes. |
michael@0 | 85 | InstructionType ProcessOpcode(unsigned char* start, |
michael@0 | 86 | unsigned int table, |
michael@0 | 87 | unsigned int* size); |
michael@0 | 88 | |
michael@0 | 89 | // Checks the type of the supplied operand. Increments |
michael@0 | 90 | // operand_bytes_ if it directly indicates an immediate etc. |
michael@0 | 91 | // operand. Asserts have_modrm_ if the operand specifies |
michael@0 | 92 | // a ModR/M byte. |
michael@0 | 93 | bool ProcessOperand(int flag_operand); |
michael@0 | 94 | |
michael@0 | 95 | // Increments operand_bytes_ by size specified by ModR/M and |
michael@0 | 96 | // by SIB if present. |
michael@0 | 97 | // Returns 0 in case of error, 1 if there is just a ModR/M byte, |
michael@0 | 98 | // 2 if there is a ModR/M byte and a SIB byte. |
michael@0 | 99 | bool ProcessModrm(unsigned char* start, unsigned int* size); |
michael@0 | 100 | |
michael@0 | 101 | // Processes the SIB byte that it is pointed to. |
michael@0 | 102 | // start: Pointer to the SIB byte. |
michael@0 | 103 | // mod: The mod field from the ModR/M byte. |
michael@0 | 104 | // Returns 1 to indicate success (indicates 1 SIB byte) |
michael@0 | 105 | bool ProcessSib(unsigned char* start, unsigned char mod, unsigned int* size); |
michael@0 | 106 | |
michael@0 | 107 | // The instruction type we have decoded from the opcode. |
michael@0 | 108 | InstructionType instruction_type_; |
michael@0 | 109 | |
michael@0 | 110 | // Counts the number of bytes that is occupied by operands in |
michael@0 | 111 | // the current instruction (note: we don't care about how large |
michael@0 | 112 | // operands stored in registers etc. are). |
michael@0 | 113 | unsigned int operand_bytes_; |
michael@0 | 114 | |
michael@0 | 115 | // True iff there is a ModR/M byte in this instruction. |
michael@0 | 116 | bool have_modrm_; |
michael@0 | 117 | |
michael@0 | 118 | // True iff we need to decode the ModR/M byte (sometimes it just |
michael@0 | 119 | // points to a register, we can tell by the addressing mode). |
michael@0 | 120 | bool should_decode_modrm_; |
michael@0 | 121 | |
michael@0 | 122 | // Current operand size is 32 bits if true, 16 bits if false. |
michael@0 | 123 | bool operand_is_32_bits_; |
michael@0 | 124 | |
michael@0 | 125 | // Default operand size is 32 bits if true, 16 bits if false. |
michael@0 | 126 | bool operand_default_is_32_bits_; |
michael@0 | 127 | |
michael@0 | 128 | // Current address size is 32 bits if true, 16 bits if false. |
michael@0 | 129 | bool address_is_32_bits_; |
michael@0 | 130 | |
michael@0 | 131 | // Default address size is 32 bits if true, 16 bits if false. |
michael@0 | 132 | bool address_default_is_32_bits_; |
michael@0 | 133 | |
michael@0 | 134 | // Huge big opcode table based on the IA-32 manual, defined |
michael@0 | 135 | // in Ia32OpcodeMap.cpp |
michael@0 | 136 | static const OpcodeTable s_ia32_opcode_map_[]; |
michael@0 | 137 | |
michael@0 | 138 | // Somewhat smaller table to help with decoding ModR/M bytes |
michael@0 | 139 | // when 16-bit addressing mode is being used. Defined in |
michael@0 | 140 | // Ia32ModrmMap.cpp |
michael@0 | 141 | static const ModrmEntry s_ia16_modrm_map_[]; |
michael@0 | 142 | |
michael@0 | 143 | // Somewhat smaller table to help with decoding ModR/M bytes |
michael@0 | 144 | // when 32-bit addressing mode is being used. Defined in |
michael@0 | 145 | // Ia32ModrmMap.cpp |
michael@0 | 146 | static const ModrmEntry s_ia32_modrm_map_[]; |
michael@0 | 147 | |
michael@0 | 148 | // Indicators of whether we got certain prefixes that certain |
michael@0 | 149 | // silly Intel instructions depend on in nonstandard ways for |
michael@0 | 150 | // their behaviors. |
michael@0 | 151 | bool got_f2_prefix_, got_f3_prefix_, got_66_prefix_; |
michael@0 | 152 | }; |
michael@0 | 153 | |
michael@0 | 154 | }; // namespace sidestep |
michael@0 | 155 | |
michael@0 | 156 | #endif // SANDBOX_SRC_SIDESTEP_MINI_DISASSEMBLER_H__ |